{"id":"https://openalex.org/W4409356242","doi":"https://doi.org/10.1109/tcsi.2025.3554894","title":"A Power-Efficient Active-RC Filter Using Passive Integrator and OTA With Push-Pull Output","display_name":"A Power-Efficient Active-RC Filter Using Passive Integrator and OTA With Push-Pull Output","publication_year":2025,"publication_date":"2025-04-11","ids":{"openalex":"https://openalex.org/W4409356242","doi":"https://doi.org/10.1109/tcsi.2025.3554894"},"language":"en","primary_location":{"id":"doi:10.1109/tcsi.2025.3554894","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tcsi.2025.3554894","pdf_url":null,"source":{"id":"https://openalex.org/S116977442","display_name":"IEEE Transactions on Circuits and Systems I Regular Papers","issn_l":"1549-8328","issn":["1549-8328","1558-0806"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Circuits and Systems I: Regular Papers","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5023180065","display_name":"Liangbo Lei","orcid":"https://orcid.org/0009-0002-0675-4711"},"institutions":[{"id":"https://openalex.org/I24943067","display_name":"Fudan University","ror":"https://ror.org/013q1eq08","country_code":"CN","type":"education","lineage":["https://openalex.org/I24943067"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Liangbo Lei","raw_affiliation_strings":["State Key Laboratory of Integrated Chips and Systems, Fudan University, Shanghai, China"],"raw_orcid":"https://orcid.org/0009-0002-0675-4711","affiliations":[{"raw_affiliation_string":"State Key Laboratory of Integrated Chips and Systems, Fudan University, Shanghai, China","institution_ids":["https://openalex.org/I24943067"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5051368557","display_name":"Cong Tao","orcid":"https://orcid.org/0000-0001-7402-1427"},"institutions":[{"id":"https://openalex.org/I24943067","display_name":"Fudan University","ror":"https://ror.org/013q1eq08","country_code":"CN","type":"education","lineage":["https://openalex.org/I24943067"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Cong Tao","raw_affiliation_strings":["State Key Laboratory of Integrated Chips and Systems, Fudan University, Shanghai, China"],"raw_orcid":"https://orcid.org/0000-0001-7402-1427","affiliations":[{"raw_affiliation_string":"State Key Laboratory of Integrated Chips and Systems, Fudan University, Shanghai, China","institution_ids":["https://openalex.org/I24943067"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5100325084","display_name":"Zhipeng Chen","orcid":"https://orcid.org/0000-0002-8330-0070"},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Zhipeng Chen","raw_affiliation_strings":["Integrated Silicon Solution, Inc., Shanghai, China","Integrated Silicon Solution, Inc, Shanghai, China"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Integrated Silicon Solution, Inc., Shanghai, China","institution_ids":[]},{"raw_affiliation_string":"Integrated Silicon Solution, Inc, Shanghai, China","institution_ids":[]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5082092557","display_name":"Zhiliang Hong","orcid":"https://orcid.org/0000-0002-9968-5964"},"institutions":[{"id":"https://openalex.org/I24943067","display_name":"Fudan University","ror":"https://ror.org/013q1eq08","country_code":"CN","type":"education","lineage":["https://openalex.org/I24943067"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Zhiliang Hong","raw_affiliation_strings":["State Key Laboratory of Integrated Chips and Systems, Fudan University, Shanghai, China"],"raw_orcid":"https://orcid.org/0000-0002-9968-5964","affiliations":[{"raw_affiliation_string":"State Key Laboratory of Integrated Chips and Systems, Fudan University, Shanghai, China","institution_ids":["https://openalex.org/I24943067"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5101872560","display_name":"Yumei Huang","orcid":"https://orcid.org/0009-0009-6376-5362"},"institutions":[{"id":"https://openalex.org/I24943067","display_name":"Fudan University","ror":"https://ror.org/013q1eq08","country_code":"CN","type":"education","lineage":["https://openalex.org/I24943067"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Yumei Huang","raw_affiliation_strings":["State Key Laboratory of Integrated Chips and Systems, Fudan University, Shanghai, China"],"raw_orcid":"https://orcid.org/0009-0009-6376-5362","affiliations":[{"raw_affiliation_string":"State Key Laboratory of Integrated Chips and Systems, Fudan University, Shanghai, China","institution_ids":["https://openalex.org/I24943067"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":1.2668,"has_fulltext":false,"cited_by_count":3,"citation_normalized_percentile":{"value":0.77287337,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":94,"max":97},"biblio":{"volume":"72","issue":"10","first_page":"5314","last_page":"5324"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":0.9911999702453613,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":0.9911999702453613,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11233","display_name":"Advanced Adaptive Filtering Techniques","score":0.9634000062942505,"subfield":{"id":"https://openalex.org/subfields/2206","display_name":"Computational Mechanics"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11034","display_name":"Digital Filter Design and Implementation","score":0.9426000118255615,"subfield":{"id":"https://openalex.org/subfields/1711","display_name":"Signal Processing"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/passive-integrator-circuit","display_name":"Passive integrator circuit","score":0.8036803007125854},{"id":"https://openalex.org/keywords/integrator","display_name":"Integrator","score":0.6894397735595703},{"id":"https://openalex.org/keywords/active-filter","display_name":"Active filter","score":0.6523653268814087},{"id":"https://openalex.org/keywords/rc-circuit","display_name":"RC circuit","score":0.6286525726318359},{"id":"https://openalex.org/keywords/active-power-filter","display_name":"Active power filter","score":0.5637013912200928},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.5193780064582825},{"id":"https://openalex.org/keywords/control-theory","display_name":"Control theory (sociology)","score":0.517493486404419},{"id":"https://openalex.org/keywords/power","display_name":"Power (physics)","score":0.4951569139957428},{"id":"https://openalex.org/keywords/electronic-filter","display_name":"Electronic filter","score":0.48391157388687134},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.3823765516281128},{"id":"https://openalex.org/keywords/capacitor","display_name":"Capacitor","score":0.3630814552307129},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.34731507301330566},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.34446239471435547},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.28479641675949097},{"id":"https://openalex.org/keywords/physics","display_name":"Physics","score":0.24161484837532043}],"concepts":[{"id":"https://openalex.org/C30839866","wikidata":"https://www.wikidata.org/wiki/Q918242","display_name":"Passive integrator circuit","level":5,"score":0.8036803007125854},{"id":"https://openalex.org/C79518650","wikidata":"https://www.wikidata.org/wiki/Q2081431","display_name":"Integrator","level":3,"score":0.6894397735595703},{"id":"https://openalex.org/C85899133","wikidata":"https://www.wikidata.org/wiki/Q557211","display_name":"Active filter","level":3,"score":0.6523653268814087},{"id":"https://openalex.org/C39394816","wikidata":"https://www.wikidata.org/wiki/Q939318","display_name":"RC circuit","level":4,"score":0.6286525726318359},{"id":"https://openalex.org/C2779187506","wikidata":"https://www.wikidata.org/wiki/Q41705698","display_name":"Active power filter","level":4,"score":0.5637013912200928},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.5193780064582825},{"id":"https://openalex.org/C47446073","wikidata":"https://www.wikidata.org/wiki/Q5165890","display_name":"Control theory (sociology)","level":3,"score":0.517493486404419},{"id":"https://openalex.org/C163258240","wikidata":"https://www.wikidata.org/wiki/Q25342","display_name":"Power (physics)","level":2,"score":0.4951569139957428},{"id":"https://openalex.org/C132237922","wikidata":"https://www.wikidata.org/wiki/Q327754","display_name":"Electronic filter","level":3,"score":0.48391157388687134},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.3823765516281128},{"id":"https://openalex.org/C52192207","wikidata":"https://www.wikidata.org/wiki/Q5322","display_name":"Capacitor","level":3,"score":0.3630814552307129},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.34731507301330566},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.34446239471435547},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.28479641675949097},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.24161484837532043},{"id":"https://openalex.org/C2775924081","wikidata":"https://www.wikidata.org/wiki/Q55608371","display_name":"Control (management)","level":2,"score":0.0},{"id":"https://openalex.org/C62520636","wikidata":"https://www.wikidata.org/wiki/Q944","display_name":"Quantum mechanics","level":1,"score":0.0},{"id":"https://openalex.org/C154945302","wikidata":"https://www.wikidata.org/wiki/Q11660","display_name":"Artificial intelligence","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/tcsi.2025.3554894","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tcsi.2025.3554894","pdf_url":null,"source":{"id":"https://openalex.org/S116977442","display_name":"IEEE Transactions on Circuits and Systems I Regular Papers","issn_l":"1549-8328","issn":["1549-8328","1558-0806"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Circuits and Systems I: Regular Papers","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[{"id":"https://metadata.un.org/sdg/7","display_name":"Affordable and clean energy","score":0.8500000238418579}],"awards":[],"funders":[{"id":"https://openalex.org/F4320335777","display_name":"National Key Research and Development Program of China","ror":null}],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":19,"referenced_works":["https://openalex.org/W1984573608","https://openalex.org/W2059035241","https://openalex.org/W2092704120","https://openalex.org/W2097055154","https://openalex.org/W2116789050","https://openalex.org/W2128011143","https://openalex.org/W2129000887","https://openalex.org/W2130061011","https://openalex.org/W2130268035","https://openalex.org/W2160672717","https://openalex.org/W2610244659","https://openalex.org/W2790891514","https://openalex.org/W2898904368","https://openalex.org/W3025472386","https://openalex.org/W3042423334","https://openalex.org/W3127948392","https://openalex.org/W3135223395","https://openalex.org/W3180157116","https://openalex.org/W4308089795"],"related_works":["https://openalex.org/W2374133148","https://openalex.org/W2060783231","https://openalex.org/W2360244026","https://openalex.org/W2359614600","https://openalex.org/W2508450896","https://openalex.org/W2172010072","https://openalex.org/W2053025779","https://openalex.org/W2938216921","https://openalex.org/W2355491156","https://openalex.org/W2386693386"],"abstract_inverted_index":{"This":[0],"paper":[1],"presents":[2],"a":[3,22,44,51,100],"power-efficient":[4],"fourth-order,":[5],"50-MHz":[6,101],"active-RC":[7],"filter":[8,70],"with":[9,50],"high":[10],"dynamic":[11],"range":[12],"(DR).":[13],"Unlike":[14],"conventional":[15],"Tow-Thomas":[16],"biquads,":[17],"the":[18,26,58,68],"proposed":[19,69],"design":[20],"employs":[21],"passive":[23],"integrator":[24,42],"as":[25],"second":[27],"pole":[28],"to":[29],"reduce":[30],"power":[31],"consumption,":[32],"enhance":[33],"noise":[34,91],"performance,":[35],"and":[36,56,86],"facilitate":[37],"frequency":[38],"compensation.":[39],"The":[40],"active":[41],"features":[43],"two-stage":[45],"operational":[46],"transconductance":[47],"amplifier":[48],"(OTA)":[49],"push-pull":[52],"output,":[53],"ensuring":[54],"linearity":[55],"reducing":[57],"OTA\u2019s":[59],"gain":[60],"requirements.":[61],"Fabricated":[62],"in":[63],"standard":[64],"0.18-\u03bcm":[65],"CMOS":[66],"technology,":[67],"achieves":[71],"an":[72,87],"in-band":[73],"(IB)":[74],"input":[75],"third-order":[76],"intercept":[77],"point":[78],"(IIP3)":[79],"of":[80,92],"+29.9":[81],"dBm":[82],"at":[83],"30":[84],"MHz":[85],"input-referred":[88],"IB":[89],"integrated":[90],"163.8":[93],"\u03bcVRMS,":[94],"while":[95],"consuming":[96],"5.4":[97],"mW":[98],"for":[99],"bandwidth.":[102]},"counts_by_year":[{"year":2026,"cited_by_count":1},{"year":2025,"cited_by_count":2}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}
