{"id":"https://openalex.org/W4406523023","doi":"https://doi.org/10.1109/tcsi.2025.3529018","title":"Design and Analysis of a Type-II Sampling PLL With Automatic Frequency and Phase Calibrations Achieving 0.62- <i>\u03bc</i> s Locking Time","display_name":"Design and Analysis of a Type-II Sampling PLL With Automatic Frequency and Phase Calibrations Achieving 0.62- <i>\u03bc</i> s Locking Time","publication_year":2025,"publication_date":"2025-01-17","ids":{"openalex":"https://openalex.org/W4406523023","doi":"https://doi.org/10.1109/tcsi.2025.3529018"},"language":"en","primary_location":{"id":"doi:10.1109/tcsi.2025.3529018","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tcsi.2025.3529018","pdf_url":null,"source":{"id":"https://openalex.org/S116977442","display_name":"IEEE Transactions on Circuits and Systems I Regular Papers","issn_l":"1549-8328","issn":["1549-8328","1558-0806"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Circuits and Systems I: Regular Papers","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5029861765","display_name":"Jian Yang","orcid":null},"institutions":[{"id":"https://openalex.org/I204512498","display_name":"University of Macau","ror":"https://ror.org/01r4q9n85","country_code":"MO","type":"education","lineage":["https://openalex.org/I204512498"]},{"id":"https://openalex.org/I4210119392","display_name":"Institute of Microelectronics","ror":"https://ror.org/02s6gs133","country_code":"CN","type":"facility","lineage":["https://openalex.org/I19820366","https://openalex.org/I4210119392"]}],"countries":["CN","MO"],"is_corresponding":false,"raw_author_name":"Jian Yang","raw_affiliation_strings":["State-Key Laboratory of Analog and Mixed-Signal VLSI, the Institute of Microelectronics, the Faculty of Science and Technology, and, Department of ECE, University of Macau, Macau, China","the Faculty of Science and Technology, and the Department of ECE, State-Key Laboratory of Analog and Mixed-Signal VLSI, the Institute of Microelectronics, University of Macau, Macau, China"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"State-Key Laboratory of Analog and Mixed-Signal VLSI, the Institute of Microelectronics, the Faculty of Science and Technology, and, Department of ECE, University of Macau, Macau, China","institution_ids":["https://openalex.org/I204512498"]},{"raw_affiliation_string":"the Faculty of Science and Technology, and the Department of ECE, State-Key Laboratory of Analog and Mixed-Signal VLSI, the Institute of Microelectronics, University of Macau, Macau, China","institution_ids":["https://openalex.org/I204512498","https://openalex.org/I4210119392"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5108575617","display_name":"Tailong Xu","orcid":null},"institutions":[{"id":"https://openalex.org/I39774598","display_name":"Hefei University","ror":"https://ror.org/01f5rdf64","country_code":"CN","type":"education","lineage":["https://openalex.org/I39774598"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Tailong Xu","raw_affiliation_strings":["Department of Electronic Information Engineering, School of Advanced Manufacturing Engineering, Hefei University, Hefei, Anhui, China"],"raw_orcid":"https://orcid.org/0000-0003-1672-5412","affiliations":[{"raw_affiliation_string":"Department of Electronic Information Engineering, School of Advanced Manufacturing Engineering, Hefei University, Hefei, Anhui, China","institution_ids":["https://openalex.org/I39774598"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5062261926","display_name":"Xi Meng","orcid":"https://orcid.org/0000-0002-2320-5012"},"institutions":[{"id":"https://openalex.org/I204512498","display_name":"University of Macau","ror":"https://ror.org/01r4q9n85","country_code":"MO","type":"education","lineage":["https://openalex.org/I204512498"]},{"id":"https://openalex.org/I4210119392","display_name":"Institute of Microelectronics","ror":"https://ror.org/02s6gs133","country_code":"CN","type":"facility","lineage":["https://openalex.org/I19820366","https://openalex.org/I4210119392"]}],"countries":["CN","MO"],"is_corresponding":false,"raw_author_name":"Xi Meng","raw_affiliation_strings":["State-Key Laboratory of Analog and Mixed-Signal VLSI, the Institute of Microelectronics, the Faculty of Science and Technology, and, Department of ECE, University of Macau, Macau, China","the Faculty of Science and Technology, and the Department of Electrical and Computer Engineering (ECE), State-Key Laboratory of Analog and Mixed-Signal VLSI, the Institute of Microelectronics, University of Macau, Macau, China"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"State-Key Laboratory of Analog and Mixed-Signal VLSI, the Institute of Microelectronics, the Faculty of Science and Technology, and, Department of ECE, University of Macau, Macau, China","institution_ids":["https://openalex.org/I204512498"]},{"raw_affiliation_string":"the Faculty of Science and Technology, and the Department of Electrical and Computer Engineering (ECE), State-Key Laboratory of Analog and Mixed-Signal VLSI, the Institute of Microelectronics, University of Macau, Macau, China","institution_ids":["https://openalex.org/I204512498","https://openalex.org/I4210119392"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5008436188","display_name":"Zhenghao Li","orcid":"https://orcid.org/0000-0003-0954-6053"},"institutions":[{"id":"https://openalex.org/I3045169105","display_name":"Southern University of Science and Technology","ror":"https://ror.org/049tv2d57","country_code":"CN","type":"education","lineage":["https://openalex.org/I3045169105"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Zhenghao Li","raw_affiliation_strings":["School of Microelectronics and the Engineering Research Center of Integrated Circuits for Next-Generation Communications, Ministry of Education, Southern University of Science and Technology, Shenzhen, China","Ministry of Education, School of Microelectronics and the Engineering Research Center of Integrated Circuits for Next-Generation Communications, Southern University of Science and Technology, Shenzhen, China"],"raw_orcid":"https://orcid.org/0000-0003-0954-6053","affiliations":[{"raw_affiliation_string":"School of Microelectronics and the Engineering Research Center of Integrated Circuits for Next-Generation Communications, Ministry of Education, Southern University of Science and Technology, Shenzhen, China","institution_ids":["https://openalex.org/I3045169105"]},{"raw_affiliation_string":"Ministry of Education, School of Microelectronics and the Engineering Research Center of Integrated Circuits for Next-Generation Communications, Southern University of Science and Technology, Shenzhen, China","institution_ids":["https://openalex.org/I3045169105"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5006541988","display_name":"Jun Yin","orcid":"https://orcid.org/0000-0002-4195-4551"},"institutions":[{"id":"https://openalex.org/I204512498","display_name":"University of Macau","ror":"https://ror.org/01r4q9n85","country_code":"MO","type":"education","lineage":["https://openalex.org/I204512498"]},{"id":"https://openalex.org/I4210119392","display_name":"Institute of Microelectronics","ror":"https://ror.org/02s6gs133","country_code":"CN","type":"facility","lineage":["https://openalex.org/I19820366","https://openalex.org/I4210119392"]}],"countries":["CN","MO"],"is_corresponding":false,"raw_author_name":"Jun Yin","raw_affiliation_strings":["State-Key Laboratory of Analog and Mixed-Signal VLSI, the Institute of Microelectronics, the Faculty of Science and Technology, and, Department of ECE, University of Macau, Macau, China","the Faculty of Science and Technology, and the Department of ECE, State-Key Laboratory of Analog and Mixed-Signal VLSI, the Institute of Microelectronics, University of Macau, Macau, China"],"raw_orcid":"https://orcid.org/0000-0002-4195-4551","affiliations":[{"raw_affiliation_string":"State-Key Laboratory of Analog and Mixed-Signal VLSI, the Institute of Microelectronics, the Faculty of Science and Technology, and, Department of ECE, University of Macau, Macau, China","institution_ids":["https://openalex.org/I204512498"]},{"raw_affiliation_string":"the Faculty of Science and Technology, and the Department of ECE, State-Key Laboratory of Analog and Mixed-Signal VLSI, the Institute of Microelectronics, University of Macau, Macau, China","institution_ids":["https://openalex.org/I204512498","https://openalex.org/I4210119392"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5106943352","display_name":"Rui P. Martins","orcid":"https://orcid.org/0000-0003-2821-648X"},"institutions":[{"id":"https://openalex.org/I204512498","display_name":"University of Macau","ror":"https://ror.org/01r4q9n85","country_code":"MO","type":"education","lineage":["https://openalex.org/I204512498"]}],"countries":["MO"],"is_corresponding":false,"raw_author_name":"Rui P. Martins","raw_affiliation_strings":["Department of ECE, Faculty of Science and Technology, State Key Laboratory of Analog and Mixed-Signal VLSI, University of Macau, Taipa, Macau, China"],"raw_orcid":"https://orcid.org/0000-0003-2821-648X","affiliations":[{"raw_affiliation_string":"Department of ECE, Faculty of Science and Technology, State Key Laboratory of Analog and Mixed-Signal VLSI, University of Macau, Taipa, Macau, China","institution_ids":["https://openalex.org/I204512498"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5058845450","display_name":"Pui\u2010In Mak","orcid":"https://orcid.org/0000-0002-3579-8740"},"institutions":[{"id":"https://openalex.org/I204512498","display_name":"University of Macau","ror":"https://ror.org/01r4q9n85","country_code":"MO","type":"education","lineage":["https://openalex.org/I204512498"]},{"id":"https://openalex.org/I4210119392","display_name":"Institute of Microelectronics","ror":"https://ror.org/02s6gs133","country_code":"CN","type":"facility","lineage":["https://openalex.org/I19820366","https://openalex.org/I4210119392"]}],"countries":["CN","MO"],"is_corresponding":false,"raw_author_name":"Pui-In Mak","raw_affiliation_strings":["State-Key Laboratory of Analog and Mixed-Signal VLSI, the Institute of Microelectronics, the Faculty of Science and Technology, and, Department of ECE, University of Macau, Macau, China","the Faculty of Science and Technology, and the Department of ECE, State-Key Laboratory of Analog and Mixed-Signal VLSI, the Institute of Microelectronics, University of Macau, Macau, China"],"raw_orcid":"https://orcid.org/0000-0002-3579-8740","affiliations":[{"raw_affiliation_string":"State-Key Laboratory of Analog and Mixed-Signal VLSI, the Institute of Microelectronics, the Faculty of Science and Technology, and, Department of ECE, University of Macau, Macau, China","institution_ids":["https://openalex.org/I204512498"]},{"raw_affiliation_string":"the Faculty of Science and Technology, and the Department of ECE, State-Key Laboratory of Analog and Mixed-Signal VLSI, the Institute of Microelectronics, University of Macau, Macau, China","institution_ids":["https://openalex.org/I204512498","https://openalex.org/I4210119392"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5037098941","display_name":"Quan Pan","orcid":"https://orcid.org/0000-0001-8704-4505"},"institutions":[{"id":"https://openalex.org/I3045169105","display_name":"Southern University of Science and Technology","ror":"https://ror.org/049tv2d57","country_code":"CN","type":"education","lineage":["https://openalex.org/I3045169105"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Quan Pan","raw_affiliation_strings":["School of Microelectronics and the Engineering Research Center of Integrated Circuits for Next-Generation Communications, Ministry of Education, Southern University of Science and Technology, Shenzhen, China","Ministry of Education, School of Microelectronics and the Engineering Research Center of Integrated Circuits for Next-Generation Communications, Southern University of Science and Technology, Shenzhen, China"],"raw_orcid":"https://orcid.org/0000-0001-8704-4505","affiliations":[{"raw_affiliation_string":"School of Microelectronics and the Engineering Research Center of Integrated Circuits for Next-Generation Communications, Ministry of Education, Southern University of Science and Technology, Shenzhen, China","institution_ids":["https://openalex.org/I3045169105"]},{"raw_affiliation_string":"Ministry of Education, School of Microelectronics and the Engineering Research Center of Integrated Circuits for Next-Generation Communications, Southern University of Science and Technology, Shenzhen, China","institution_ids":["https://openalex.org/I3045169105"]}]}],"institutions":[],"countries_distinct_count":2,"institutions_distinct_count":4,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":1.5965,"has_fulltext":false,"cited_by_count":5,"citation_normalized_percentile":{"value":0.81156436,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":95,"max":99},"biblio":{"volume":"72","issue":"9","first_page":"4584","last_page":"4596"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11417","display_name":"Advancements in PLL and VCO Technologies","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11417","display_name":"Advancements in PLL and VCO Technologies","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10299","display_name":"Photonic and Optical Devices","score":0.9957000017166138,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11429","display_name":"Semiconductor Lasers and Optical Devices","score":0.9939000010490417,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/phase-locked-loop","display_name":"Phase-locked loop","score":0.8496896624565125},{"id":"https://openalex.org/keywords/phase","display_name":"Phase (matter)","score":0.518971860408783},{"id":"https://openalex.org/keywords/sampling","display_name":"Sampling (signal processing)","score":0.5086222887039185},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.49451515078544617},{"id":"https://openalex.org/keywords/pll-multibit","display_name":"PLL multibit","score":0.43177488446235657},{"id":"https://openalex.org/keywords/transfer-function","display_name":"Transfer function","score":0.41127851605415344},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.41119492053985596},{"id":"https://openalex.org/keywords/control-theory","display_name":"Control theory (sociology)","score":0.3779504597187042},{"id":"https://openalex.org/keywords/phase-noise","display_name":"Phase noise","score":0.3498806357383728},{"id":"https://openalex.org/keywords/physics","display_name":"Physics","score":0.2924952507019043},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.2740209698677063},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.2729206681251526},{"id":"https://openalex.org/keywords/telecommunications","display_name":"Telecommunications","score":0.1695776879787445},{"id":"https://openalex.org/keywords/detector","display_name":"Detector","score":0.10190397500991821},{"id":"https://openalex.org/keywords/control","display_name":"Control (management)","score":0.08784642815589905}],"concepts":[{"id":"https://openalex.org/C12707504","wikidata":"https://www.wikidata.org/wiki/Q52637","display_name":"Phase-locked loop","level":3,"score":0.8496896624565125},{"id":"https://openalex.org/C44280652","wikidata":"https://www.wikidata.org/wiki/Q104837","display_name":"Phase (matter)","level":2,"score":0.518971860408783},{"id":"https://openalex.org/C140779682","wikidata":"https://www.wikidata.org/wiki/Q210868","display_name":"Sampling (signal processing)","level":3,"score":0.5086222887039185},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.49451515078544617},{"id":"https://openalex.org/C77881186","wikidata":"https://www.wikidata.org/wiki/Q7119642","display_name":"PLL multibit","level":4,"score":0.43177488446235657},{"id":"https://openalex.org/C81299745","wikidata":"https://www.wikidata.org/wiki/Q334269","display_name":"Transfer function","level":2,"score":0.41127851605415344},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.41119492053985596},{"id":"https://openalex.org/C47446073","wikidata":"https://www.wikidata.org/wiki/Q5165890","display_name":"Control theory (sociology)","level":3,"score":0.3779504597187042},{"id":"https://openalex.org/C89631360","wikidata":"https://www.wikidata.org/wiki/Q1428766","display_name":"Phase noise","level":2,"score":0.3498806357383728},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.2924952507019043},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.2740209698677063},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.2729206681251526},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.1695776879787445},{"id":"https://openalex.org/C94915269","wikidata":"https://www.wikidata.org/wiki/Q1834857","display_name":"Detector","level":2,"score":0.10190397500991821},{"id":"https://openalex.org/C2775924081","wikidata":"https://www.wikidata.org/wiki/Q55608371","display_name":"Control (management)","level":2,"score":0.08784642815589905},{"id":"https://openalex.org/C62520636","wikidata":"https://www.wikidata.org/wiki/Q944","display_name":"Quantum mechanics","level":1,"score":0.0},{"id":"https://openalex.org/C154945302","wikidata":"https://www.wikidata.org/wiki/Q11660","display_name":"Artificial intelligence","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/tcsi.2025.3529018","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tcsi.2025.3529018","pdf_url":null,"source":{"id":"https://openalex.org/S116977442","display_name":"IEEE Transactions on Circuits and Systems I Regular Papers","issn_l":"1549-8328","issn":["1549-8328","1558-0806"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Circuits and Systems I: Regular Papers","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[{"score":0.4300000071525574,"id":"https://metadata.un.org/sdg/7","display_name":"Affordable and clean energy"}],"awards":[{"id":"https://openalex.org/G3029784206","display_name":null,"funder_award_id":"MYRG-GRG2024-00298-IME","funder_id":"https://openalex.org/F4320333714","funder_display_name":"Cave Science and Technology Research Fund"},{"id":"https://openalex.org/G6618723763","display_name":null,"funder_award_id":"0045/2020/AMJ","funder_id":"https://openalex.org/F4320321655","funder_display_name":"Science and Technology Development Fund"}],"funders":[{"id":"https://openalex.org/F4320321655","display_name":"Science and Technology Development Fund","ror":"https://ror.org/044vr6g03"},{"id":"https://openalex.org/F4320333714","display_name":"Cave Science and Technology Research Fund","ror":null}],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":34,"referenced_works":["https://openalex.org/W1544882865","https://openalex.org/W1975256196","https://openalex.org/W2124140800","https://openalex.org/W2133079932","https://openalex.org/W2137958855","https://openalex.org/W2217616241","https://openalex.org/W2559073178","https://openalex.org/W2565866967","https://openalex.org/W2900413946","https://openalex.org/W2913416661","https://openalex.org/W2921886179","https://openalex.org/W2953919570","https://openalex.org/W2956242243","https://openalex.org/W2996590588","https://openalex.org/W3000264207","https://openalex.org/W3018467755","https://openalex.org/W3028280451","https://openalex.org/W3033534174","https://openalex.org/W3040994238","https://openalex.org/W3094095022","https://openalex.org/W3094824205","https://openalex.org/W3095086756","https://openalex.org/W3176167732","https://openalex.org/W3181177329","https://openalex.org/W3183913092","https://openalex.org/W3214302083","https://openalex.org/W4248108322","https://openalex.org/W4293812167","https://openalex.org/W4310050303","https://openalex.org/W4376132517","https://openalex.org/W4390026059","https://openalex.org/W4392746218","https://openalex.org/W4393170803","https://openalex.org/W4396918192"],"related_works":["https://openalex.org/W1576949837","https://openalex.org/W2104055211","https://openalex.org/W2498262093","https://openalex.org/W2474043983","https://openalex.org/W2544336511","https://openalex.org/W2566880546","https://openalex.org/W2078513307","https://openalex.org/W1978186604","https://openalex.org/W2144737022","https://openalex.org/W2124954209"],"abstract_inverted_index":{"This":[0,106],"paper":[1,107],"presents":[2],"a":[3,16,37,90,111,146,163,171,220],"type-II":[4],"sampling":[5],"phase-locked":[6],"loop":[7,39],"(SPLL)":[8],"that":[9],"accelerates":[10,31],"the":[11,32,42,47,53,73,77,101,115,119,124,127,132,135,139,158,198],"locking":[12,63,172],"process":[13],"by":[14,35,71],"exploiting":[15],"time-to-digital":[17],"converter":[18],"(TDC)":[19],"based":[20,130],"automatic":[21],"frequency":[22,33,62,121],"and":[23,126,203,208,214],"phase":[24,44,59],"calibration":[25],"(AFPC)":[26],"technique.":[27],"The":[28,57,85],"proposed":[29,86],"AFPC":[30,87,116],"acquisition":[34],"using":[36,162],"type-I":[38],"to":[40,46,100,110,219],"map":[41],"quantized":[43],"error":[45,60],"switched-capacitor":[48],"(SC)":[49],"control":[50],"word":[51],"of":[52,76,103,123,134,138,149,167,174,211,230],"voltage-controlled":[54],"oscillator":[55],"(VCO).":[56],"subsequent":[58],"after":[61],"is":[64,98],"swiftly":[65],"reduced":[66],"within":[67],"one":[68],"TDC":[69,104,128],"resolution":[70],"adjusting":[72],"division":[74],"ratio":[75],"multi-modulus":[78],"divider":[79],"(MMD)":[80],"with":[81,145],"little":[82],"hardware":[83],"expenditure.":[84],"can":[88],"guarantee":[89],"fast-locking":[91],"time":[92,173],"at":[93,190],"different":[94],"initial":[95],"frequencies,":[96],"which":[97],"insensitive":[99],"variation":[102],"resolution.":[105],"also":[108],"contributes":[109],"design":[112],"strategy":[113],"for":[114],"loop,":[117],"e.g.,":[118],"required":[120],"step":[122],"SC":[125],"resolution,":[129],"on":[131],"analysis":[133],"lock-in":[136],"range":[137],"SPLL.":[140],"Fabricated":[141],"in":[142],"28-nm":[143],"CMOS":[144],"core":[147],"area":[148],"0.15":[150],"mm<inline-formula":[151],"xmlns:mml=\"http://www.w3.org/1998/Math/MathML\"":[152,176,183,224],"xmlns:xlink=\"http://www.w3.org/1999/xlink\">":[153,177,184,225],"<tex-math":[154,178,185,226],"notation=\"LaTeX\">$^{\\mathbf":[155],"{2}}$":[156],"</tex-math></inline-formula>,":[157],"6.0-to-6.9GHz":[159],"SPLL":[160,199],"prototype":[161],"reference":[164],"(REF)":[165],"clock":[166],"100":[168],"MHz":[169],"achieves":[170],"<inline-formula":[175],"notation=\"LaTeX\">$0.62~\\mu":[179],"$":[180],"</tex-math></inline-formula>s":[181],"(<inline-formula":[182],"notation=\"LaTeX\">$62{T}":[186],"_{\\mathbf":[187],"{REF}}$":[188],"</tex-math></inline-formula>)":[189,229],"an":[191,205],"880-MHz":[192],"hopping":[193],"frequency.":[194],"At":[195],"6.5":[196],"GHz,":[197],"consumes":[200],"4.6":[201],"mW":[202],"measures":[204],"RMS":[206],"jitter":[207,221],"REF":[209],"spur":[210],"99":[212],"fs":[213],"\u201371.6":[215],"dBc,":[216],"respectively,":[217],"corresponding":[218],"figure-of-merit":[222],"(FoM<inline-formula":[223],"notation=\"LaTeX\">$_{\\mathbf":[227],"{jitter}}$":[228],"\u2013253.5":[231],"dB.":[232]},"counts_by_year":[{"year":2026,"cited_by_count":3},{"year":2025,"cited_by_count":2}],"updated_date":"2026-07-22T07:51:19.307946","created_date":"2025-01-18T00:00:00"}
