{"id":"https://openalex.org/W4406387821","doi":"https://doi.org/10.1109/tcsi.2025.3526593","title":"A Single-Channel 8-bit 1.6-GS/s Alternate-Comparator SAR ADC With Dither-Based Background Offset Calibration in 28-nm CMOS","display_name":"A Single-Channel 8-bit 1.6-GS/s Alternate-Comparator SAR ADC With Dither-Based Background Offset Calibration in 28-nm CMOS","publication_year":2025,"publication_date":"2025-01-15","ids":{"openalex":"https://openalex.org/W4406387821","doi":"https://doi.org/10.1109/tcsi.2025.3526593"},"language":"en","primary_location":{"id":"doi:10.1109/tcsi.2025.3526593","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tcsi.2025.3526593","pdf_url":null,"source":{"id":"https://openalex.org/S116977442","display_name":"IEEE Transactions on Circuits and Systems I Regular Papers","issn_l":"1549-8328","issn":["1549-8328","1558-0806"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Circuits and Systems I: Regular Papers","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":null,"display_name":"Peng Wang","orcid":"https://orcid.org/0000-0002-2631-971X"},"institutions":[{"id":"https://openalex.org/I99065089","display_name":"Tsinghua University","ror":"https://ror.org/03cve4549","country_code":"CN","type":"education","lineage":["https://openalex.org/I99065089"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Peng Wang","raw_affiliation_strings":["School of Integrated Circuits, Tsinghua University, Beijing, China"],"raw_orcid":"https://orcid.org/0000-0002-2631-971X","affiliations":[{"raw_affiliation_string":"School of Integrated Circuits, Tsinghua University, Beijing, China","institution_ids":["https://openalex.org/I99065089"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5084959547","display_name":"Fule Li","orcid":"https://orcid.org/0000-0002-7341-7240"},"institutions":[{"id":"https://openalex.org/I99065089","display_name":"Tsinghua University","ror":"https://ror.org/03cve4549","country_code":"CN","type":"education","lineage":["https://openalex.org/I99065089"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Fule Li","raw_affiliation_strings":["School of Integrated Circuits, Tsinghua University, Beijing, China"],"raw_orcid":"https://orcid.org/0000-0002-7341-7240","affiliations":[{"raw_affiliation_string":"School of Integrated Circuits, Tsinghua University, Beijing, China","institution_ids":["https://openalex.org/I99065089"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5100356864","display_name":"Zhihua Wang","orcid":"https://orcid.org/0000-0001-6567-0759"},"institutions":[{"id":"https://openalex.org/I99065089","display_name":"Tsinghua University","ror":"https://ror.org/03cve4549","country_code":"CN","type":"education","lineage":["https://openalex.org/I99065089"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Zhihua Wang","raw_affiliation_strings":["School of Integrated Circuits, Tsinghua University, Beijing, China"],"raw_orcid":"https://orcid.org/0000-0001-6567-0759","affiliations":[{"raw_affiliation_string":"School of Integrated Circuits, Tsinghua University, Beijing, China","institution_ids":["https://openalex.org/I99065089"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":[],"corresponding_institution_ids":["https://openalex.org/I99065089"],"apc_list":null,"apc_paid":null,"fwci":3.637,"has_fulltext":false,"cited_by_count":11,"citation_normalized_percentile":{"value":0.93042221,"is_in_top_1_percent":false,"is_in_top_10_percent":true},"cited_by_percentile_year":{"min":98,"max":99},"biblio":{"volume":"72","issue":"9","first_page":"4527","last_page":"4538"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11992","display_name":"CCD and CMOS Imaging Sensors","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10558","display_name":"Advancements in Semiconductor Devices and Circuit Design","score":0.9983000159263611,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/comparator","display_name":"Comparator","score":0.8215959668159485},{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.7210779190063477},{"id":"https://openalex.org/keywords/successive-approximation-adc","display_name":"Successive approximation ADC","score":0.7013334631919861},{"id":"https://openalex.org/keywords/dither","display_name":"Dither","score":0.7003402709960938},{"id":"https://openalex.org/keywords/offset","display_name":"Offset (computer science)","score":0.6522080898284912},{"id":"https://openalex.org/keywords/12-bit","display_name":"12-bit","score":0.5330278873443604},{"id":"https://openalex.org/keywords/bit","display_name":"Bit (key)","score":0.5054428577423096},{"id":"https://openalex.org/keywords/calibration","display_name":"Calibration","score":0.5004305839538574},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.49594125151634216},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.39671826362609863},{"id":"https://openalex.org/keywords/physics","display_name":"Physics","score":0.29457810521125793},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.29069411754608154},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.2191230058670044},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.18358907103538513},{"id":"https://openalex.org/keywords/noise-shaping","display_name":"Noise shaping","score":0.13526788353919983}],"concepts":[{"id":"https://openalex.org/C155745195","wikidata":"https://www.wikidata.org/wiki/Q1164179","display_name":"Comparator","level":3,"score":0.8215959668159485},{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.7210779190063477},{"id":"https://openalex.org/C60154766","wikidata":"https://www.wikidata.org/wiki/Q2650458","display_name":"Successive approximation ADC","level":4,"score":0.7013334631919861},{"id":"https://openalex.org/C70451592","wikidata":"https://www.wikidata.org/wiki/Q376493","display_name":"Dither","level":3,"score":0.7003402709960938},{"id":"https://openalex.org/C175291020","wikidata":"https://www.wikidata.org/wiki/Q1156822","display_name":"Offset (computer science)","level":2,"score":0.6522080898284912},{"id":"https://openalex.org/C2776310492","wikidata":"https://www.wikidata.org/wiki/Q3271420","display_name":"12-bit","level":3,"score":0.5330278873443604},{"id":"https://openalex.org/C117011727","wikidata":"https://www.wikidata.org/wiki/Q1278488","display_name":"Bit (key)","level":2,"score":0.5054428577423096},{"id":"https://openalex.org/C165838908","wikidata":"https://www.wikidata.org/wiki/Q736777","display_name":"Calibration","level":2,"score":0.5004305839538574},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.49594125151634216},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.39671826362609863},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.29457810521125793},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.29069411754608154},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.2191230058670044},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.18358907103538513},{"id":"https://openalex.org/C9083635","wikidata":"https://www.wikidata.org/wiki/Q2133535","display_name":"Noise shaping","level":2,"score":0.13526788353919983},{"id":"https://openalex.org/C38652104","wikidata":"https://www.wikidata.org/wiki/Q3510521","display_name":"Computer security","level":1,"score":0.0},{"id":"https://openalex.org/C62520636","wikidata":"https://www.wikidata.org/wiki/Q944","display_name":"Quantum mechanics","level":1,"score":0.0},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/tcsi.2025.3526593","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tcsi.2025.3526593","pdf_url":null,"source":{"id":"https://openalex.org/S116977442","display_name":"IEEE Transactions on Circuits and Systems I Regular Papers","issn_l":"1549-8328","issn":["1549-8328","1558-0806"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Circuits and Systems I: Regular Papers","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[{"id":"https://metadata.un.org/sdg/7","score":0.7099999785423279,"display_name":"Affordable and clean energy"}],"awards":[{"id":"https://openalex.org/G7362554169","display_name":null,"funder_award_id":"2021YFB2206600","funder_id":"https://openalex.org/F4320327808","funder_display_name":"Yunnan Key Research and Development Program"}],"funders":[{"id":"https://openalex.org/F4320327808","display_name":"Yunnan Key Research and Development Program","ror":null}],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":32,"referenced_works":["https://openalex.org/W2005378264","https://openalex.org/W2028400820","https://openalex.org/W2051102950","https://openalex.org/W2068164598","https://openalex.org/W2089267425","https://openalex.org/W2147723118","https://openalex.org/W2296644030","https://openalex.org/W2343222450","https://openalex.org/W2592547566","https://openalex.org/W2592800647","https://openalex.org/W2594509431","https://openalex.org/W2806888435","https://openalex.org/W2942938695","https://openalex.org/W3000203975","https://openalex.org/W3134124940","https://openalex.org/W3135750548","https://openalex.org/W3158079039","https://openalex.org/W3208872830","https://openalex.org/W4220687916","https://openalex.org/W4234604932","https://openalex.org/W4286571698","https://openalex.org/W4288057941","https://openalex.org/W4293143561","https://openalex.org/W4360605377","https://openalex.org/W4360605767","https://openalex.org/W4360606417","https://openalex.org/W4376131421","https://openalex.org/W4392745718","https://openalex.org/W4392745749","https://openalex.org/W4392745780","https://openalex.org/W4392746201","https://openalex.org/W4396918393"],"related_works":["https://openalex.org/W2278942241","https://openalex.org/W1977749038","https://openalex.org/W1995865860","https://openalex.org/W1641489184","https://openalex.org/W3004044036","https://openalex.org/W2792167570","https://openalex.org/W2290076986","https://openalex.org/W4206173322","https://openalex.org/W4312326809","https://openalex.org/W2368405386"],"abstract_inverted_index":{"This":[0],"paper":[1],"presents":[2],"an":[3],"8-bit":[4,96,117],"1.6GS/s":[5],"successive-approximation-register":[6],"analog-to-digital":[7],"converter":[8,75],"(SAR":[9],"ADC)":[10],"with":[11],"alternate":[12],"comparators.":[13],"To":[14],"enhance":[15],"dynamic":[16,141],"performance":[17],"and":[18,26,72,110,127],"speed,":[19],"a":[20,27,69,73,80,85,94,121,162],"dither-based":[21],"background":[22,35],"relative":[23,48],"offset":[24,49,152],"calibration":[25,59],"fast":[28,64],"SAR":[29,65,97,118],"logic":[30,71],"are":[31,91],"proposed.":[32],"In":[33],"the":[34,37,44,47,56,105,124,139],"calibration,":[36],"least":[38],"significant":[39],"bit":[40,87],"(LSB)":[41],"can":[42],"indicate":[43],"polarity":[45],"of":[46,165],"between":[50],"comparators":[51],"after":[52,151],"injecting":[53],"dither":[54],"into":[55],"input,":[57,123],"facilitating":[58],"without":[60],"extra":[61],"phase.":[62],"The":[63],"logic,":[66,78],"which":[67],"includes":[68],"trigger":[70],"digital-to-analog":[74],"(DAC)":[76],"control":[77],"features":[79],"3-logic-gate":[81],"delay,":[82],"resulting":[83],"in":[84,99],"reduced":[86],"duration.":[88],"These":[89],"techniques":[90],"validated":[92],"by":[93],"prototype":[95],"ADC":[98],"28":[100],"nm":[101],"CMOS":[102],"technology,":[103],"exhibiting":[104],"highest":[106],"speed":[107],"(1.6":[108],"GS/s)":[109],"smallest":[111],"area":[112],"(0.0008":[113],"mm2)":[114],"among":[115],"single-channel":[116],"ADC.":[119],"With":[120],"Nyquist":[122],"measured":[125],"signal-to-noise":[126],"distortion":[128],"ratio":[129],"(SNDR)":[130],"improves":[131,144],"from":[132,145,158],"31.6":[133],"dB":[134,147,150],"to":[135,148],"43.6":[136],"dB,":[137],"while":[138],"spurious-free":[140],"range":[142],"(SFDR)":[143],"38.7":[146],"58.3":[149],"calibration.":[153],"It":[154],"consumes":[155],"5.73":[156],"mW":[157],"1-V":[159],"supply,":[160],"yielding":[161],"Walden":[163],"FoM":[164],"29.0":[166],"fJ/conv-step.":[167]},"counts_by_year":[{"year":2026,"cited_by_count":6},{"year":2025,"cited_by_count":5}],"updated_date":"2026-07-29T09:40:50.615796","created_date":"2025-10-10T00:00:00"}
