{"id":"https://openalex.org/W4405974323","doi":"https://doi.org/10.1109/tcsi.2024.3522351","title":"TrIM, Triangular Input Movement Systolic Array for Convolutional Neural Networks: Architecture and Hardware Implementation","display_name":"TrIM, Triangular Input Movement Systolic Array for Convolutional Neural Networks: Architecture and Hardware Implementation","publication_year":2025,"publication_date":"2025-01-01","ids":{"openalex":"https://openalex.org/W4405974323","doi":"https://doi.org/10.1109/tcsi.2024.3522351"},"language":"en","primary_location":{"id":"doi:10.1109/tcsi.2024.3522351","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tcsi.2024.3522351","pdf_url":null,"source":{"id":"https://openalex.org/S116977442","display_name":"IEEE Transactions on Circuits and Systems I Regular Papers","issn_l":"1549-8328","issn":["1549-8328","1558-0806"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Circuits and Systems I: Regular Papers","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5087153969","display_name":"Cristian Sestito","orcid":"https://orcid.org/0000-0002-7731-0002"},"institutions":[{"id":"https://openalex.org/I4210087927","display_name":"National Microelectronics Institute","ror":"https://ror.org/003ck6433","country_code":"GB","type":"nonprofit","lineage":["https://openalex.org/I4210087927"]}],"countries":["GB"],"is_corresponding":false,"raw_author_name":"Cristian Sestito","raw_affiliation_strings":["Centre for Electronics Frontiers, Institute for Integrated Micro and Nano Systems, School of Engineering, The University of Edinburgh, Edinburgh, U.K","Institute for Integrated Micro and Nano Systems, School of Engineering, Centre for Electronics Frontiers, The University of Edinburgh, Edinburgh, U.K"],"raw_orcid":"https://orcid.org/0000-0002-7731-0002","affiliations":[{"raw_affiliation_string":"Centre for Electronics Frontiers, Institute for Integrated Micro and Nano Systems, School of Engineering, The University of Edinburgh, Edinburgh, U.K","institution_ids":["https://openalex.org/I4210087927"]},{"raw_affiliation_string":"Institute for Integrated Micro and Nano Systems, School of Engineering, Centre for Electronics Frontiers, The University of Edinburgh, Edinburgh, U.K","institution_ids":["https://openalex.org/I4210087927"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5072040326","display_name":"Shady Agwa","orcid":"https://orcid.org/0000-0002-6678-6283"},"institutions":[{"id":"https://openalex.org/I4210087927","display_name":"National Microelectronics Institute","ror":"https://ror.org/003ck6433","country_code":"GB","type":"nonprofit","lineage":["https://openalex.org/I4210087927"]}],"countries":["GB"],"is_corresponding":false,"raw_author_name":"Shady Agwa","raw_affiliation_strings":["Centre for Electronics Frontiers, Institute for Integrated Micro and Nano Systems, School of Engineering, The University of Edinburgh, Edinburgh, U.K","Institute for Integrated Micro and Nano Systems, School of Engineering, Centre for Electronics Frontiers, The University of Edinburgh, Edinburgh, U.K"],"raw_orcid":"https://orcid.org/0000-0002-6678-6283","affiliations":[{"raw_affiliation_string":"Centre for Electronics Frontiers, Institute for Integrated Micro and Nano Systems, School of Engineering, The University of Edinburgh, Edinburgh, U.K","institution_ids":["https://openalex.org/I4210087927"]},{"raw_affiliation_string":"Institute for Integrated Micro and Nano Systems, School of Engineering, Centre for Electronics Frontiers, The University of Edinburgh, Edinburgh, U.K","institution_ids":["https://openalex.org/I4210087927"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5088089733","display_name":"Themis Prodromakis","orcid":"https://orcid.org/0000-0002-6267-6909"},"institutions":[{"id":"https://openalex.org/I4210087927","display_name":"National Microelectronics Institute","ror":"https://ror.org/003ck6433","country_code":"GB","type":"nonprofit","lineage":["https://openalex.org/I4210087927"]}],"countries":["GB"],"is_corresponding":false,"raw_author_name":"Themis Prodromakis","raw_affiliation_strings":["Centre for Electronics Frontiers, Institute for Integrated Micro and Nano Systems, School of Engineering, The University of Edinburgh, Edinburgh, U.K","Institute for Integrated Micro and Nano Systems, School of Engineering, Centre for Electronics Frontiers, The University of Edinburgh, Edinburgh, U.K"],"raw_orcid":"https://orcid.org/0000-0002-6267-6909","affiliations":[{"raw_affiliation_string":"Centre for Electronics Frontiers, Institute for Integrated Micro and Nano Systems, School of Engineering, The University of Edinburgh, Edinburgh, U.K","institution_ids":["https://openalex.org/I4210087927"]},{"raw_affiliation_string":"Institute for Integrated Micro and Nano Systems, School of Engineering, Centre for Electronics Frontiers, The University of Edinburgh, Edinburgh, U.K","institution_ids":["https://openalex.org/I4210087927"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":[],"corresponding_institution_ids":["https://openalex.org/I4210087927"],"apc_list":{"value":2645,"currency":"USD","value_usd":2645},"apc_paid":null,"fwci":1.846,"has_fulltext":false,"cited_by_count":4,"citation_normalized_percentile":{"value":0.83320185,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":95,"max":98},"biblio":{"volume":"72","issue":"5","first_page":"2263","last_page":"2273"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10036","display_name":"Advanced Neural Network Applications","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/1707","display_name":"Computer Vision and Pattern Recognition"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10036","display_name":"Advanced Neural Network Applications","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/1707","display_name":"Computer Vision and Pattern Recognition"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10502","display_name":"Advanced Memory and Neural Computing","score":0.9983000159263611,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9976999759674072,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.6865290999412537},{"id":"https://openalex.org/keywords/systolic-array","display_name":"Systolic array","score":0.6728602647781372},{"id":"https://openalex.org/keywords/convolutional-neural-network","display_name":"Convolutional neural network","score":0.6299833655357361},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.6089513301849365},{"id":"https://openalex.org/keywords/dataflow","display_name":"Dataflow","score":0.571668267250061},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.5616304278373718},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.43860578536987305},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.313662588596344},{"id":"https://openalex.org/keywords/very-large-scale-integration","display_name":"Very-large-scale integration","score":0.2128165364265442},{"id":"https://openalex.org/keywords/artificial-intelligence","display_name":"Artificial intelligence","score":0.20034584403038025}],"concepts":[{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.6865290999412537},{"id":"https://openalex.org/C150741067","wikidata":"https://www.wikidata.org/wiki/Q2377218","display_name":"Systolic array","level":3,"score":0.6728602647781372},{"id":"https://openalex.org/C81363708","wikidata":"https://www.wikidata.org/wiki/Q17084460","display_name":"Convolutional neural network","level":2,"score":0.6299833655357361},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.6089513301849365},{"id":"https://openalex.org/C96324660","wikidata":"https://www.wikidata.org/wiki/Q205446","display_name":"Dataflow","level":2,"score":0.571668267250061},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.5616304278373718},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.43860578536987305},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.313662588596344},{"id":"https://openalex.org/C14580979","wikidata":"https://www.wikidata.org/wiki/Q876049","display_name":"Very-large-scale integration","level":2,"score":0.2128165364265442},{"id":"https://openalex.org/C154945302","wikidata":"https://www.wikidata.org/wiki/Q11660","display_name":"Artificial intelligence","level":1,"score":0.20034584403038025}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/tcsi.2024.3522351","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tcsi.2024.3522351","pdf_url":null,"source":{"id":"https://openalex.org/S116977442","display_name":"IEEE Transactions on Circuits and Systems I Regular Papers","issn_l":"1549-8328","issn":["1549-8328","1558-0806"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Circuits and Systems I: Regular Papers","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":29,"referenced_works":["https://openalex.org/W1999085092","https://openalex.org/W2289252105","https://openalex.org/W2604319603","https://openalex.org/W2606722458","https://openalex.org/W2767644592","https://openalex.org/W2807091852","https://openalex.org/W2906043559","https://openalex.org/W2942898010","https://openalex.org/W3008653537","https://openalex.org/W3015537910","https://openalex.org/W3022013598","https://openalex.org/W3114929349","https://openalex.org/W3158458703","https://openalex.org/W3168997536","https://openalex.org/W3217357178","https://openalex.org/W4221072574","https://openalex.org/W4310362310","https://openalex.org/W4320712936","https://openalex.org/W4327807785","https://openalex.org/W4367663018","https://openalex.org/W4381050415","https://openalex.org/W4382203333","https://openalex.org/W4387164726","https://openalex.org/W4387886174","https://openalex.org/W4390771525","https://openalex.org/W6637151318","https://openalex.org/W6637373629","https://openalex.org/W6684191040","https://openalex.org/W6875623817"],"related_works":["https://openalex.org/W2293118914","https://openalex.org/W2998381397","https://openalex.org/W4236419692","https://openalex.org/W2171015181","https://openalex.org/W3167919718","https://openalex.org/W4251718783","https://openalex.org/W4239447582","https://openalex.org/W2999668243","https://openalex.org/W2347854075","https://openalex.org/W2132614232"],"abstract_inverted_index":{"Modern":[0],"hardware":[1,115],"architectures":[2,42],"for":[3,117],"Convolutional":[4],"Neural":[5],"Networks":[6],"(CNNs),":[7],"other":[8,55,176],"than":[9,175],"targeting":[10],"high":[11],"performance,":[12],"aim":[13],"at":[14],"dissipating":[15],"limited":[16],"energy.":[17],"Reducing":[18],"the":[19,24,28,35,65,92,122,135],"data":[20,58],"movement":[21,85],"cost":[22],"between":[23],"computing":[25],"cores":[26],"and":[27,68,88,137,167],"memory":[29,95,165],"is":[30,124],"a":[31,83,113,120,127,143,153],"way":[32],"to":[33,43,56,90,104,133],"mitigate":[34],"energy":[36],"consumption.":[37],"Systolic":[38],"arrays":[39],"are":[40],"suitable":[41],"achieve":[44],"this":[45,109],"objective:":[46],"they":[47],"use":[48],"multiple":[49],"processing":[50],"elements":[51],"that":[52],"communicate":[53],"each":[54],"maximize":[57],"utilization,":[59],"based":[60,81],"on":[61,82],"proper":[62],"dataflows":[63],"like":[64],"weight":[66],"stationary":[67,156],"row":[69,155],"stationary.":[70],"Motivated":[71],"by":[72,97],"this,":[73],"we":[74,111],"have":[75],"proposed":[76],"TrIM,":[77],"an":[78],"innovative":[79],"dataflow":[80],"triangular":[84],"of":[86,94,100,146,164],"inputs,":[87],"capable":[89],"reduce":[91],"number":[93],"accesses":[96],"one":[98],"order":[99],"magnitude":[101],"when":[102],"compared":[103],"state-of-the-art":[105,154],"systolic":[106,157],"arrays.":[107],"In":[108],"paper,":[110],"present":[112],"TrIM-based":[114],"architecture":[116,141],"CNNs.":[118,139],"As":[119],"showcase,":[121],"accelerator":[123],"implemented":[125],"onto":[126],"Field":[128],"Programmable":[129],"Gate":[130],"Array":[131],"(FPGA)":[132],"execute":[134],"VGG-16":[136],"AlexNet":[138],"The":[140],"achieves":[142],"peak":[144],"throughput":[145],"453.6":[147],"Giga":[148],"Operations":[149],"per":[150],"Second,":[151],"outperforming":[152],"array":[158],"up":[159,169],"to$\\sim":[160],"3":[161],"\\times$in":[162],"terms":[163],"accesses,":[166],"being":[168],"to$":[170],"\\sim":[171],"11.9":[172],"\\times$more":[173],"energy-efficient":[174],"FPGA":[177],"accelerators.":[178]},"counts_by_year":[{"year":2026,"cited_by_count":2},{"year":2025,"cited_by_count":2}],"updated_date":"2026-08-21T09:56:20.448147","created_date":"2025-10-10T00:00:00"}