{"id":"https://openalex.org/W4403936675","doi":"https://doi.org/10.1109/tcsi.2024.3486936","title":"Reconciliation of Statistical Approaches to Predicting Nonlinearity-Induced Spurs in Fractional-<i>N</i> Frequency Synthesizers","display_name":"Reconciliation of Statistical Approaches to Predicting Nonlinearity-Induced Spurs in Fractional-<i>N</i> Frequency Synthesizers","publication_year":2024,"publication_date":"2024-10-31","ids":{"openalex":"https://openalex.org/W4403936675","doi":"https://doi.org/10.1109/tcsi.2024.3486936"},"language":"en","primary_location":{"id":"doi:10.1109/tcsi.2024.3486936","is_oa":true,"landing_page_url":"https://doi.org/10.1109/tcsi.2024.3486936","pdf_url":null,"source":{"id":"https://openalex.org/S116977442","display_name":"IEEE Transactions on Circuits and Systems I Regular Papers","issn_l":"1549-8328","issn":["1549-8328","1558-0806"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":"cc-by","license_id":"https://openalex.org/licenses/cc-by","version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Circuits and Systems I: Regular Papers","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":true,"oa_status":"hybrid","oa_url":"https://doi.org/10.1109/tcsi.2024.3486936","any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5100311062","display_name":"Lu Xu","orcid":"https://orcid.org/0009-0005-0841-1001"},"institutions":[{"id":"https://openalex.org/I100930933","display_name":"University College Dublin","ror":"https://ror.org/05m7pjf47","country_code":"IE","type":"education","lineage":["https://openalex.org/I100930933"]}],"countries":["IE"],"is_corresponding":true,"raw_author_name":"Xu Lu","raw_affiliation_strings":["School of Electrical and Electronic Engineering, and the Microelectronic Circuits Centre Ireland, University College Dublin, Dublin 4, Ireland"],"affiliations":[{"raw_affiliation_string":"School of Electrical and Electronic Engineering, and the Microelectronic Circuits Centre Ireland, University College Dublin, Dublin 4, Ireland","institution_ids":["https://openalex.org/I100930933"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5058028927","display_name":"Michael Peter Kennedy","orcid":"https://orcid.org/0000-0003-3242-1056"},"institutions":[{"id":"https://openalex.org/I100930933","display_name":"University College Dublin","ror":"https://ror.org/05m7pjf47","country_code":"IE","type":"education","lineage":["https://openalex.org/I100930933"]}],"countries":["IE"],"is_corresponding":false,"raw_author_name":"Michael Peter Kennedy","raw_affiliation_strings":["School of Electrical and Electronic Engineering, and the Microelectronic Circuits Centre Ireland, University College Dublin, Dublin 4, Ireland"],"affiliations":[{"raw_affiliation_string":"School of Electrical and Electronic Engineering, and the Microelectronic Circuits Centre Ireland, University College Dublin, Dublin 4, Ireland","institution_ids":["https://openalex.org/I100930933"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":2,"corresponding_author_ids":["https://openalex.org/A5100311062"],"corresponding_institution_ids":["https://openalex.org/I100930933"],"apc_list":null,"apc_paid":null,"fwci":2.0926,"has_fulltext":false,"cited_by_count":6,"citation_normalized_percentile":{"value":0.87688559,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":94,"max":98},"biblio":{"volume":"72","issue":"5","first_page":"2075","last_page":"2088"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10791","display_name":"Advanced Control Systems Optimization","score":0.890500009059906,"subfield":{"id":"https://openalex.org/subfields/2207","display_name":"Control and Systems Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10791","display_name":"Advanced Control Systems Optimization","score":0.890500009059906,"subfield":{"id":"https://openalex.org/subfields/2207","display_name":"Control and Systems Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11081","display_name":"Advanced Control Systems Design","score":0.8682000041007996,"subfield":{"id":"https://openalex.org/subfields/2207","display_name":"Control and Systems Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10876","display_name":"Fault Detection and Control Systems","score":0.8428999781608582,"subfield":{"id":"https://openalex.org/subfields/2207","display_name":"Control and Systems Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/nonlinear-system","display_name":"Nonlinear system","score":0.5438746213912964},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.49959397315979004},{"id":"https://openalex.org/keywords/frequency-synthesizer","display_name":"Frequency synthesizer","score":0.4605078101158142},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.37124574184417725},{"id":"https://openalex.org/keywords/mathematics","display_name":"Mathematics","score":0.36832118034362793},{"id":"https://openalex.org/keywords/topology","display_name":"Topology (electrical circuits)","score":0.3642221987247467},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.32853955030441284},{"id":"https://openalex.org/keywords/physics","display_name":"Physics","score":0.31091418862342834},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.24676832556724548},{"id":"https://openalex.org/keywords/phase-locked-loop","display_name":"Phase-locked loop","score":0.20854294300079346},{"id":"https://openalex.org/keywords/phase-noise","display_name":"Phase noise","score":0.19445312023162842}],"concepts":[{"id":"https://openalex.org/C158622935","wikidata":"https://www.wikidata.org/wiki/Q660848","display_name":"Nonlinear system","level":2,"score":0.5438746213912964},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.49959397315979004},{"id":"https://openalex.org/C182099602","wikidata":"https://www.wikidata.org/wiki/Q2660678","display_name":"Frequency synthesizer","level":4,"score":0.4605078101158142},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.37124574184417725},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.36832118034362793},{"id":"https://openalex.org/C184720557","wikidata":"https://www.wikidata.org/wiki/Q7825049","display_name":"Topology (electrical circuits)","level":2,"score":0.3642221987247467},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.32853955030441284},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.31091418862342834},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.24676832556724548},{"id":"https://openalex.org/C12707504","wikidata":"https://www.wikidata.org/wiki/Q52637","display_name":"Phase-locked loop","level":3,"score":0.20854294300079346},{"id":"https://openalex.org/C89631360","wikidata":"https://www.wikidata.org/wiki/Q1428766","display_name":"Phase noise","level":2,"score":0.19445312023162842},{"id":"https://openalex.org/C62520636","wikidata":"https://www.wikidata.org/wiki/Q944","display_name":"Quantum mechanics","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/tcsi.2024.3486936","is_oa":true,"landing_page_url":"https://doi.org/10.1109/tcsi.2024.3486936","pdf_url":null,"source":{"id":"https://openalex.org/S116977442","display_name":"IEEE Transactions on Circuits and Systems I Regular Papers","issn_l":"1549-8328","issn":["1549-8328","1558-0806"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":"cc-by","license_id":"https://openalex.org/licenses/cc-by","version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Circuits and Systems I: Regular Papers","raw_type":"journal-article"}],"best_oa_location":{"id":"doi:10.1109/tcsi.2024.3486936","is_oa":true,"landing_page_url":"https://doi.org/10.1109/tcsi.2024.3486936","pdf_url":null,"source":{"id":"https://openalex.org/S116977442","display_name":"IEEE Transactions on Circuits and Systems I Regular Papers","issn_l":"1549-8328","issn":["1549-8328","1558-0806"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":"cc-by","license_id":"https://openalex.org/licenses/cc-by","version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Circuits and Systems I: Regular Papers","raw_type":"journal-article"},"sustainable_development_goals":[{"score":0.7099999785423279,"display_name":"Reduced inequalities","id":"https://metadata.un.org/sdg/10"}],"awards":[{"id":"https://openalex.org/G2604199617","display_name":null,"funder_award_id":"20/FFP-A/8371","funder_id":"https://openalex.org/F4320320847","funder_display_name":"Science Foundation Ireland"},{"id":"https://openalex.org/G500045321","display_name":null,"funder_award_id":"18/CRT/6049","funder_id":"https://openalex.org/F4320320847","funder_display_name":"Science Foundation Ireland"}],"funders":[{"id":"https://openalex.org/F4320320847","display_name":"Science Foundation Ireland","ror":"https://ror.org/0271asj38"}],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":33,"referenced_works":["https://openalex.org/W76047383","https://openalex.org/W371546939","https://openalex.org/W1500373038","https://openalex.org/W1591892647","https://openalex.org/W1966226491","https://openalex.org/W1983278401","https://openalex.org/W1983424317","https://openalex.org/W2004740176","https://openalex.org/W2018704819","https://openalex.org/W2019647239","https://openalex.org/W2024591372","https://openalex.org/W2025591491","https://openalex.org/W2030258400","https://openalex.org/W2067936044","https://openalex.org/W2091853556","https://openalex.org/W2103369810","https://openalex.org/W2117873004","https://openalex.org/W2157470323","https://openalex.org/W2160017795","https://openalex.org/W2351554567","https://openalex.org/W2490257604","https://openalex.org/W2501462716","https://openalex.org/W2792189667","https://openalex.org/W2801062342","https://openalex.org/W2960457490","https://openalex.org/W3000836004","https://openalex.org/W3139122155","https://openalex.org/W3193709960","https://openalex.org/W4207074682","https://openalex.org/W4290989745","https://openalex.org/W4390693391","https://openalex.org/W4401878749","https://openalex.org/W6635822493"],"related_works":["https://openalex.org/W2748952813","https://openalex.org/W2166555237","https://openalex.org/W2622028395","https://openalex.org/W1485954471","https://openalex.org/W2358931555","https://openalex.org/W2115817193","https://openalex.org/W2357707916","https://openalex.org/W4381233057","https://openalex.org/W2617097589","https://openalex.org/W2128272971"],"abstract_inverted_index":{"Fractional-N":[0],"frequency":[1],"synthesizers":[2],"based":[3],"on":[4],"phase-locked":[5],"loops":[6],"exhibit":[7],"spurious":[8,81],"tones":[9],"(spurs)":[10],"that":[11,45],"result":[12],"from":[13],"interactions":[14],"between":[15,107],"the":[16,20,26,37,40,64,84,105,108,113,118,125],"accumulated":[17],"output":[18],"of":[19,30,39,73,117,128],"divider":[21,41],"controller":[22,42],"and":[23,67,83,95,111,115],"nonlinearity":[24,51,88],"in":[25,63],"loop.":[27],"A":[28],"number":[29],"methods":[31],"have":[32],"been":[33],"proposed":[34],"to":[35,79,123],"modify":[36],"statistics":[38],"signal":[43],"so":[44],"interaction":[46],"with":[47,77],"a":[48],"memoryless":[49],"polynomial":[50],"does":[52],"not":[53],"induce":[54],"spurs.":[55],"This":[56],"tutorial":[57],"paper":[58],"reconciles":[59],"two":[60,109],"principal":[61],"concepts":[62,110],"literature:":[65],"Familier":[66],"Galton\u2019s":[68],"mathematically":[69],"rigorous":[70],"fundamental":[71],"limitation":[72],"DC-free":[74],"quantization":[75],"noise":[76,89],"respect":[78],"nonlinearity-induced":[80],"tones,":[82],"heretofore":[85],"empirical":[86],"periodic":[87],"function":[90],"which":[91],"has":[92],"provided":[93],"intuition":[94],"insight,":[96],"as":[97,99,120],"well":[98],"inspiring":[100],"further":[101],"innovation.":[102],"It":[103],"demonstrates":[104],"connection":[106],"highlights":[112],"strengths":[114],"limitations":[116],"PNN":[119],"it":[121],"relates":[122],"predicting":[124],"spur":[126],"performance":[127],"fractional-N":[129],"PLLs.":[130]},"counts_by_year":[{"year":2025,"cited_by_count":4},{"year":2024,"cited_by_count":2}],"updated_date":"2025-12-27T23:08:20.325037","created_date":"2024-11-01T00:00:00"}
