{"id":"https://openalex.org/W4401210315","doi":"https://doi.org/10.1109/tcsi.2024.3434706","title":"Layer-Wise Mixed-Modes CNN Processing Architecture With Double-Stationary Dataflow and Dimension-Reshape Strategy","display_name":"Layer-Wise Mixed-Modes CNN Processing Architecture With Double-Stationary Dataflow and Dimension-Reshape Strategy","publication_year":2024,"publication_date":"2024-08-01","ids":{"openalex":"https://openalex.org/W4401210315","doi":"https://doi.org/10.1109/tcsi.2024.3434706"},"language":"en","primary_location":{"id":"doi:10.1109/tcsi.2024.3434706","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tcsi.2024.3434706","pdf_url":null,"source":{"id":"https://openalex.org/S116977442","display_name":"IEEE Transactions on Circuits and Systems I Regular Papers","issn_l":"1549-8328","issn":["1549-8328","1558-0806"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Circuits and Systems I: Regular Papers","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5100461621","display_name":"Bo Liu","orcid":"https://orcid.org/0000-0002-0894-1054"},"institutions":[{"id":"https://openalex.org/I76569877","display_name":"Southeast University","ror":"https://ror.org/04ct4d772","country_code":"CN","type":"education","lineage":["https://openalex.org/I76569877"]}],"countries":["CN"],"is_corresponding":true,"raw_author_name":"Bo Liu","raw_affiliation_strings":["National ASIC System Engineering Center, School of Integrated Circuits, Southeast University, Nanjing, China"],"affiliations":[{"raw_affiliation_string":"National ASIC System Engineering Center, School of Integrated Circuits, Southeast University, Nanjing, China","institution_ids":["https://openalex.org/I76569877"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5001643051","display_name":"Xinxiang Huang","orcid":"https://orcid.org/0009-0008-9375-216X"},"institutions":[{"id":"https://openalex.org/I76569877","display_name":"Southeast University","ror":"https://ror.org/04ct4d772","country_code":"CN","type":"education","lineage":["https://openalex.org/I76569877"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Xinxiang Huang","raw_affiliation_strings":["National ASIC System Engineering Center, School of Integrated Circuits, Southeast University, Nanjing, China"],"affiliations":[{"raw_affiliation_string":"National ASIC System Engineering Center, School of Integrated Circuits, Southeast University, Nanjing, China","institution_ids":["https://openalex.org/I76569877"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5088633393","display_name":"Yang Zhang","orcid":"https://orcid.org/0009-0005-1455-5749"},"institutions":[{"id":"https://openalex.org/I76569877","display_name":"Southeast University","ror":"https://ror.org/04ct4d772","country_code":"CN","type":"education","lineage":["https://openalex.org/I76569877"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Yang Zhang","raw_affiliation_strings":["National ASIC System Engineering Center, School of Integrated Circuits, Southeast University, Nanjing, China"],"affiliations":[{"raw_affiliation_string":"National ASIC System Engineering Center, School of Integrated Circuits, Southeast University, Nanjing, China","institution_ids":["https://openalex.org/I76569877"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5112355319","display_name":"Guang Yang","orcid":"https://orcid.org/0000-0001-8061-742X"},"institutions":[{"id":"https://openalex.org/I76569877","display_name":"Southeast University","ror":"https://ror.org/04ct4d772","country_code":"CN","type":"education","lineage":["https://openalex.org/I76569877"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Guang Yang","raw_affiliation_strings":["National ASIC System Engineering Center, School of Integrated Circuits, Southeast University, Nanjing, China"],"affiliations":[{"raw_affiliation_string":"National ASIC System Engineering Center, School of Integrated Circuits, Southeast University, Nanjing, China","institution_ids":["https://openalex.org/I76569877"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5101192841","display_name":"Han Yan","orcid":"https://orcid.org/0009-0004-6738-8510"},"institutions":[{"id":"https://openalex.org/I76569877","display_name":"Southeast University","ror":"https://ror.org/04ct4d772","country_code":"CN","type":"education","lineage":["https://openalex.org/I76569877"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Han Yan","raw_affiliation_strings":["National ASIC System Engineering Center, School of Integrated Circuits, Southeast University, Nanjing, China"],"affiliations":[{"raw_affiliation_string":"National ASIC System Engineering Center, School of Integrated Circuits, Southeast University, Nanjing, China","institution_ids":["https://openalex.org/I76569877"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5101228383","display_name":"Chen Zhang","orcid":"https://orcid.org/0009-0000-1312-422X"},"institutions":[{"id":"https://openalex.org/I76569877","display_name":"Southeast University","ror":"https://ror.org/04ct4d772","country_code":"CN","type":"education","lineage":["https://openalex.org/I76569877"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Chen Zhang","raw_affiliation_strings":["National ASIC System Engineering Center, School of Integrated Circuits, Southeast University, Nanjing, China"],"affiliations":[{"raw_affiliation_string":"National ASIC System Engineering Center, School of Integrated Circuits, Southeast University, Nanjing, China","institution_ids":["https://openalex.org/I76569877"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5049284191","display_name":"Z. Y. Li","orcid":null},"institutions":[{"id":"https://openalex.org/I76569877","display_name":"Southeast University","ror":"https://ror.org/04ct4d772","country_code":"CN","type":"education","lineage":["https://openalex.org/I76569877"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Zejv Li","raw_affiliation_strings":["National ASIC System Engineering Center, School of Integrated Circuits, Southeast University, Nanjing, China"],"affiliations":[{"raw_affiliation_string":"National ASIC System Engineering Center, School of Integrated Circuits, Southeast University, Nanjing, China","institution_ids":["https://openalex.org/I76569877"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5113373779","display_name":"Yuanhao Wang","orcid":null},"institutions":[{"id":"https://openalex.org/I76569877","display_name":"Southeast University","ror":"https://ror.org/04ct4d772","country_code":"CN","type":"education","lineage":["https://openalex.org/I76569877"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Yuanhao Wang","raw_affiliation_strings":["National ASIC System Engineering Center, School of Integrated Circuits, Southeast University, Nanjing, China"],"affiliations":[{"raw_affiliation_string":"National ASIC System Engineering Center, School of Integrated Circuits, Southeast University, Nanjing, China","institution_ids":["https://openalex.org/I76569877"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5079498326","display_name":"Hao Cai","orcid":"https://orcid.org/0000-0001-9794-8049"},"institutions":[{"id":"https://openalex.org/I76569877","display_name":"Southeast University","ror":"https://ror.org/04ct4d772","country_code":"CN","type":"education","lineage":["https://openalex.org/I76569877"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Hao Cai","raw_affiliation_strings":["National ASIC System Engineering Center, School of Integrated Circuits, Southeast University, Nanjing, China"],"affiliations":[{"raw_affiliation_string":"National ASIC System Engineering Center, School of Integrated Circuits, Southeast University, Nanjing, China","institution_ids":["https://openalex.org/I76569877"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":9,"corresponding_author_ids":["https://openalex.org/A5100461621"],"corresponding_institution_ids":["https://openalex.org/I76569877"],"apc_list":null,"apc_paid":null,"fwci":1.4614,"has_fulltext":false,"cited_by_count":7,"citation_normalized_percentile":{"value":0.82132755,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":98,"max":99},"biblio":{"volume":"71","issue":"10","first_page":"4652","last_page":"4664"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11992","display_name":"CCD and CMOS Imaging Sensors","score":0.9771999716758728,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11992","display_name":"CCD and CMOS Imaging Sensors","score":0.9771999716758728,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10502","display_name":"Advanced Memory and Neural Computing","score":0.9747999906539917,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10036","display_name":"Advanced Neural Network Applications","score":0.9735000133514404,"subfield":{"id":"https://openalex.org/subfields/1707","display_name":"Computer Vision and Pattern Recognition"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/dataflow","display_name":"Dataflow","score":0.8361952304840088},{"id":"https://openalex.org/keywords/dimension","display_name":"Dimension (graph theory)","score":0.701352596282959},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.6280650496482849},{"id":"https://openalex.org/keywords/architecture","display_name":"Architecture","score":0.5397705435752869},{"id":"https://openalex.org/keywords/dataflow-architecture","display_name":"Dataflow architecture","score":0.49367937445640564},{"id":"https://openalex.org/keywords/layer","display_name":"Layer (electronics)","score":0.41749435663223267},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.4092812240123749},{"id":"https://openalex.org/keywords/arithmetic","display_name":"Arithmetic","score":0.3860968351364136},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.3685552775859833},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.3391486704349518},{"id":"https://openalex.org/keywords/theoretical-computer-science","display_name":"Theoretical computer science","score":0.33070483803749084},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.32426297664642334},{"id":"https://openalex.org/keywords/mathematics","display_name":"Mathematics","score":0.22112709283828735},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.16826379299163818},{"id":"https://openalex.org/keywords/pure-mathematics","display_name":"Pure mathematics","score":0.0934872031211853}],"concepts":[{"id":"https://openalex.org/C96324660","wikidata":"https://www.wikidata.org/wiki/Q205446","display_name":"Dataflow","level":2,"score":0.8361952304840088},{"id":"https://openalex.org/C33676613","wikidata":"https://www.wikidata.org/wiki/Q13415176","display_name":"Dimension (graph theory)","level":2,"score":0.701352596282959},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.6280650496482849},{"id":"https://openalex.org/C123657996","wikidata":"https://www.wikidata.org/wiki/Q12271","display_name":"Architecture","level":2,"score":0.5397705435752869},{"id":"https://openalex.org/C176727019","wikidata":"https://www.wikidata.org/wiki/Q1172415","display_name":"Dataflow architecture","level":3,"score":0.49367937445640564},{"id":"https://openalex.org/C2779227376","wikidata":"https://www.wikidata.org/wiki/Q6505497","display_name":"Layer (electronics)","level":2,"score":0.41749435663223267},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.4092812240123749},{"id":"https://openalex.org/C94375191","wikidata":"https://www.wikidata.org/wiki/Q11205","display_name":"Arithmetic","level":1,"score":0.3860968351364136},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.3685552775859833},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.3391486704349518},{"id":"https://openalex.org/C80444323","wikidata":"https://www.wikidata.org/wiki/Q2878974","display_name":"Theoretical computer science","level":1,"score":0.33070483803749084},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.32426297664642334},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.22112709283828735},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.16826379299163818},{"id":"https://openalex.org/C202444582","wikidata":"https://www.wikidata.org/wiki/Q837863","display_name":"Pure mathematics","level":1,"score":0.0934872031211853},{"id":"https://openalex.org/C185592680","wikidata":"https://www.wikidata.org/wiki/Q2329","display_name":"Chemistry","level":0,"score":0.0},{"id":"https://openalex.org/C142362112","wikidata":"https://www.wikidata.org/wiki/Q735","display_name":"Art","level":0,"score":0.0},{"id":"https://openalex.org/C178790620","wikidata":"https://www.wikidata.org/wiki/Q11351","display_name":"Organic chemistry","level":1,"score":0.0},{"id":"https://openalex.org/C153349607","wikidata":"https://www.wikidata.org/wiki/Q36649","display_name":"Visual arts","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/tcsi.2024.3434706","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tcsi.2024.3434706","pdf_url":null,"source":{"id":"https://openalex.org/S116977442","display_name":"IEEE Transactions on Circuits and Systems I Regular Papers","issn_l":"1549-8328","issn":["1549-8328","1558-0806"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Circuits and Systems I: Regular Papers","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[{"id":"https://openalex.org/G120510889","display_name":null,"funder_award_id":"2023YFB4403103","funder_id":"https://openalex.org/F4320335777","funder_display_name":"National Key Research and Development Program of China"}],"funders":[{"id":"https://openalex.org/F4320335777","display_name":"National Key Research and Development Program of China","ror":null}],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":48,"referenced_works":["https://openalex.org/W2040530489","https://openalex.org/W2087670726","https://openalex.org/W2102915015","https://openalex.org/W2111013824","https://openalex.org/W2139701372","https://openalex.org/W2160342152","https://openalex.org/W2194775991","https://openalex.org/W2289252105","https://openalex.org/W2570467259","https://openalex.org/W2606722458","https://openalex.org/W2612076670","https://openalex.org/W2767864757","https://openalex.org/W2884983013","https://openalex.org/W2891525613","https://openalex.org/W2945146780","https://openalex.org/W2963163009","https://openalex.org/W2971734772","https://openalex.org/W3009178428","https://openalex.org/W3011748007","https://openalex.org/W3027308717","https://openalex.org/W3034039317","https://openalex.org/W3083485280","https://openalex.org/W3088208024","https://openalex.org/W3113827151","https://openalex.org/W3124497898","https://openalex.org/W3127333742","https://openalex.org/W3174620891","https://openalex.org/W3212935296","https://openalex.org/W4206337665","https://openalex.org/W4247470470","https://openalex.org/W4249697915","https://openalex.org/W4285250061","https://openalex.org/W4285507310","https://openalex.org/W4287849833","https://openalex.org/W4308090433","https://openalex.org/W4310936523","https://openalex.org/W4313377427","https://openalex.org/W4323913931","https://openalex.org/W4360605374","https://openalex.org/W4360605392","https://openalex.org/W4384947612","https://openalex.org/W4385832274","https://openalex.org/W4386306971","https://openalex.org/W4387789586","https://openalex.org/W6637373629","https://openalex.org/W6731608545","https://openalex.org/W6770425567","https://openalex.org/W6839459920"],"related_works":["https://openalex.org/W2564598376","https://openalex.org/W1484403103","https://openalex.org/W2584408851","https://openalex.org/W2115158825","https://openalex.org/W2101960124","https://openalex.org/W4377693460","https://openalex.org/W2783505431","https://openalex.org/W2033683327","https://openalex.org/W2521947294","https://openalex.org/W4236419692"],"abstract_inverted_index":{"With":[0],"the":[1,11,27,60,67,90,133,146,151,164,240],"development":[2],"of":[3,29,135,153,207,229],"convolutional":[4],"neural":[5,30,38],"networks":[6],"(CNN)":[7],"across":[8],"various":[9],"domains,":[10],"growth":[12],"in":[13,26,42,132,157],"network":[14,39],"structure":[15],"complexity":[16],"and":[17,49,104,155,179,192,210,215,222],"computational":[18,47,177],"load":[19],"has":[20],"increasingly":[21],"become":[22],"a":[23,44,55,70,96,105,117,167,180,188],"research":[24,36],"focus":[25],"deployment":[28],"networks.":[31],"The":[32,137],"key":[33],"to":[34,58,110,148,159,174,186],"current":[35],"on":[37,93,123,197],"accelerators":[40],"lies":[41],"striking":[43],"balance":[45,61],"between":[46],"accuracy":[48],"energy":[50,205],"efficiency.":[51],"This":[52,114],"paper":[53,115],"proposes":[54],"software-hardware":[56],"co-design":[57],"strike":[59],"for":[62,84,100,213],"CNN":[63,91],"edge":[64],"applications.":[65],"On":[66,163],"hardware":[68],"side,":[69,166],"3-dimensional":[71],"tensor":[72],"engine":[73],"(3D-TE),":[74],"achieved":[75],"with":[76,218],"reconfigurable":[77],"Tensor":[78],"Processing":[79],"Units":[80],"(TPUs),":[81],"is":[82,172,184],"introduced":[83],"efficient":[85],"convolution":[86],"computation.":[87],"We":[88],"optimize":[89],"dataflow":[92,108],"3D-TE":[94],"using":[95],"dimension":[97],"reshaping":[98],"method":[99],"feature":[101],"maps":[102],"rearrangement,":[103],"double":[106],"stationary":[107],"scheduling":[109],"reduce":[111,175],"memory":[112],"access.":[113],"adopts":[116],"configurable":[118,143],"approximate":[119],"multiplier":[120],"design":[121],"based":[122,128],"Boolean":[124],"Matrix":[125],"Factorization":[126],"(BMF)":[127],"logic":[129],"synthesis":[130],"applied":[131],"architecture":[134],"TPU.":[136],"proposed":[138,185],"3D-TE,":[139],"characterized":[140],"by":[141],"its":[142],"precision,":[144],"enables":[145],"TPUs":[147],"dynamically":[149],"adapt":[150],"bitwidth":[152],"features":[154],"weights":[156],"response":[158],"varying":[160],"precision":[161,170],"requirements.":[162],"software":[165],"hessian-guided":[168],"layer":[169],"mapping":[171],"adopted":[173],"unnecessary":[176],"overhead,":[178],"progressive":[181],"re-training":[182],"approach":[183],"enable":[187],"better":[189],"approximation":[190],"configuration":[191],"higher":[193],"power":[194],"reduction.":[195],"Fabricated":[196],"28-nm":[198],"CMOS,":[199],"this":[200],"work":[201],"achieves":[202],"an":[203,227],"optimized":[204],"efficiency":[206],"14.9":[208],"TOPS/W":[209,212],"12.1":[211],"ResNet56":[214],"MobileNetV2":[216],"respectively,":[217],"0.6V":[219],"supply":[220],"voltage":[221],"150MHz":[223],"clock":[224],"frequency,":[225],"representing":[226],"improvement":[228],"<inline-formula":[230],"xmlns:mml=\"http://www.w3.org/1998/Math/MathML\"":[231],"xmlns:xlink=\"http://www.w3.org/1999/xlink\">":[232],"<tex-math":[233],"notation=\"LaTeX\">$1.33\\times":[234],"\\sim":[235],"8.28\\times":[236],"$":[237],"</tex-math></inline-formula>":[238],"over":[239],"state-of-the-art":[241],"works.":[242]},"counts_by_year":[{"year":2025,"cited_by_count":7}],"updated_date":"2026-03-27T05:58:40.876381","created_date":"2025-10-10T00:00:00"}