{"id":"https://openalex.org/W4392007377","doi":"https://doi.org/10.1109/tcsi.2024.3362822","title":"NeuroSim V1.4: Extending Technology Support for Digital Compute-in-Memory Toward 1nm Node","display_name":"NeuroSim V1.4: Extending Technology Support for Digital Compute-in-Memory Toward 1nm Node","publication_year":2024,"publication_date":"2024-02-21","ids":{"openalex":"https://openalex.org/W4392007377","doi":"https://doi.org/10.1109/tcsi.2024.3362822"},"language":"en","primary_location":{"id":"doi:10.1109/tcsi.2024.3362822","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tcsi.2024.3362822","pdf_url":null,"source":{"id":"https://openalex.org/S116977442","display_name":"IEEE Transactions on Circuits and Systems I Regular Papers","issn_l":"1549-8328","issn":["1549-8328","1558-0806"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Circuits and Systems I: Regular Papers","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5044101951","display_name":"Junmo Lee","orcid":"https://orcid.org/0000-0001-6092-6436"},"institutions":[{"id":"https://openalex.org/I130701444","display_name":"Georgia Institute of Technology","ror":"https://ror.org/01zkghx44","country_code":"US","type":"education","lineage":["https://openalex.org/I130701444"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Junmo Lee","raw_affiliation_strings":["Department of Electrical and Computer Engineering, Georgia Institute of Technology, Atlanta, GA, USA"],"raw_orcid":"https://orcid.org/0000-0001-6092-6436","affiliations":[{"raw_affiliation_string":"Department of Electrical and Computer Engineering, Georgia Institute of Technology, Atlanta, GA, USA","institution_ids":["https://openalex.org/I130701444"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5072117537","display_name":"Anni Lu","orcid":"https://orcid.org/0000-0002-4415-0866"},"institutions":[{"id":"https://openalex.org/I130701444","display_name":"Georgia Institute of Technology","ror":"https://ror.org/01zkghx44","country_code":"US","type":"education","lineage":["https://openalex.org/I130701444"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Anni Lu","raw_affiliation_strings":["Department of Electrical and Computer Engineering, Georgia Institute of Technology, Atlanta, GA, USA"],"raw_orcid":"https://orcid.org/0000-0002-4415-0866","affiliations":[{"raw_affiliation_string":"Department of Electrical and Computer Engineering, Georgia Institute of Technology, Atlanta, GA, USA","institution_ids":["https://openalex.org/I130701444"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5101936941","display_name":"Wantong Li","orcid":"https://orcid.org/0000-0002-8288-393X"},"institutions":[{"id":"https://openalex.org/I130701444","display_name":"Georgia Institute of Technology","ror":"https://ror.org/01zkghx44","country_code":"US","type":"education","lineage":["https://openalex.org/I130701444"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Wantong Li","raw_affiliation_strings":["Department of Electrical and Computer Engineering, Georgia Institute of Technology, Atlanta, GA, USA"],"raw_orcid":"https://orcid.org/0000-0002-8288-393X","affiliations":[{"raw_affiliation_string":"Department of Electrical and Computer Engineering, Georgia Institute of Technology, Atlanta, GA, USA","institution_ids":["https://openalex.org/I130701444"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5054894631","display_name":"Shimeng Yu","orcid":"https://orcid.org/0000-0002-0068-3652"},"institutions":[{"id":"https://openalex.org/I130701444","display_name":"Georgia Institute of Technology","ror":"https://ror.org/01zkghx44","country_code":"US","type":"education","lineage":["https://openalex.org/I130701444"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Shimeng Yu","raw_affiliation_strings":["Department of Electrical and Computer Engineering, Georgia Institute of Technology, Atlanta, GA, USA"],"raw_orcid":"https://orcid.org/0000-0002-0068-3652","affiliations":[{"raw_affiliation_string":"Department of Electrical and Computer Engineering, Georgia Institute of Technology, Atlanta, GA, USA","institution_ids":["https://openalex.org/I130701444"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":[],"corresponding_institution_ids":["https://openalex.org/I130701444"],"apc_list":{"value":2645,"currency":"USD","value_usd":2645},"apc_paid":null,"fwci":4.8203,"has_fulltext":false,"cited_by_count":39,"citation_normalized_percentile":{"value":0.96070831,"is_in_top_1_percent":false,"is_in_top_10_percent":true},"cited_by_percentile_year":{"min":94,"max":100},"biblio":{"volume":"71","issue":"4","first_page":"1733","last_page":"1744"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10502","display_name":"Advanced Memory and Neural Computing","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10502","display_name":"Advanced Memory and Neural Computing","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T12808","display_name":"Ferroelectric and Negative Capacitance Devices","score":0.9980999827384949,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11992","display_name":"CCD and CMOS Imaging Sensors","score":0.9965000152587891,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/node","display_name":"Node (physics)","score":0.6825716495513916},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.49387627840042114},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.17311489582061768}],"concepts":[{"id":"https://openalex.org/C62611344","wikidata":"https://www.wikidata.org/wiki/Q1062658","display_name":"Node (physics)","level":2,"score":0.6825716495513916},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.49387627840042114},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.17311489582061768},{"id":"https://openalex.org/C66938386","wikidata":"https://www.wikidata.org/wiki/Q633538","display_name":"Structural engineering","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/tcsi.2024.3362822","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tcsi.2024.3362822","pdf_url":null,"source":{"id":"https://openalex.org/S116977442","display_name":"IEEE Transactions on Circuits and Systems I Regular Papers","issn_l":"1549-8328","issn":["1549-8328","1558-0806"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Circuits and Systems I: Regular Papers","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[{"id":"https://openalex.org/F4320332180","display_name":"Defense Advanced Research Projects Agency","ror":"https://ror.org/02caytj08"},{"id":"https://openalex.org/F4320332195","display_name":"Samsung","ror":"https://ror.org/04w3jy968"}],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":44,"referenced_works":["https://openalex.org/W1501165253","https://openalex.org/W1518236483","https://openalex.org/W1526481341","https://openalex.org/W1974833918","https://openalex.org/W1984711740","https://openalex.org/W2034089924","https://openalex.org/W2098868381","https://openalex.org/W2135407913","https://openalex.org/W2583675180","https://openalex.org/W2744406216","https://openalex.org/W2786668094","https://openalex.org/W2787475303","https://openalex.org/W2787759178","https://openalex.org/W2791186466","https://openalex.org/W2899004836","https://openalex.org/W2921329602","https://openalex.org/W2921386757","https://openalex.org/W2997869757","https://openalex.org/W3005619596","https://openalex.org/W3013000486","https://openalex.org/W3015432327","https://openalex.org/W3045216746","https://openalex.org/W3067903889","https://openalex.org/W3103339143","https://openalex.org/W3119933723","https://openalex.org/W3134195144","https://openalex.org/W3134526034","https://openalex.org/W3137731892","https://openalex.org/W3155456425","https://openalex.org/W3176511209","https://openalex.org/W3194056411","https://openalex.org/W3204960448","https://openalex.org/W4220655405","https://openalex.org/W4220922172","https://openalex.org/W4221038786","https://openalex.org/W4286375111","https://openalex.org/W4286571878","https://openalex.org/W4286571888","https://openalex.org/W4289536809","https://openalex.org/W4292261931","https://openalex.org/W4317792994","https://openalex.org/W4360605745","https://openalex.org/W4376134047","https://openalex.org/W6760185003"],"related_works":["https://openalex.org/W2748952813","https://openalex.org/W2390279801","https://openalex.org/W2358668433","https://openalex.org/W2376932109","https://openalex.org/W2001405890","https://openalex.org/W2382290278","https://openalex.org/W2478288626","https://openalex.org/W4391913857","https://openalex.org/W2350741829","https://openalex.org/W2530322880"],"abstract_inverted_index":{"Over":[0],"the":[1,12,31,60,64,68,80,90,95,117,132,151],"past":[2],"decade,":[3],"numerous":[4],"compute-in-memory":[5],"(CIM)":[6],"platforms":[7],"have":[8],"been":[9,23],"proposed":[10],"in":[11,30,94,150],"literature.":[13],"While":[14],"emerging":[15],"non-volatile":[16],"memory":[17,50],"based":[18,45],"analog":[19],"CIM":[20,43,102],"(ACIM)":[21],"has":[22],"widely":[24],"studied,":[25],"its":[26],"silicon":[27],"demonstrations":[28],"are":[29,148],"mature":[32],"legacy":[33],"node":[34,70],"(22":[35],"nm":[36,72,113,159,177,182],"or":[37,73],"above).":[38],"As":[39],"an":[40],"alternative,":[41],"digital":[42],"(DCIM)":[44],"on":[46],"static":[47],"random":[48],"access":[49],"(SRAM)":[51],"is":[52],"recently":[53],"drawing":[54],"significant":[55],"attention,":[56],"as":[57,140,190],"it":[58],"enjoys":[59],"scaling":[61,155],"benefits":[62],"with":[63],"logic":[65],"process":[66],"to":[67,84,111,157,162],"leading-edge":[69],"(5":[71],"below),":[74],"and":[75,123,131,180,192],"does":[76],"not":[77],"suffer":[78],"from":[79],"accuracy":[81],"loss":[82],"due":[83],"process/voltage/temperature":[85],"(PVT)":[86],"variations.":[87],"To":[88],"assess":[89],"potential":[91],"of":[92,172],"DCIM":[93,161],"future,":[96],"we":[97],"release":[98],"NeuroSim":[99],"V1.4,":[100],"a":[101],"benchmark":[103],"framework,":[104],"which":[105],"supports":[106],"advanced":[107],"technology":[108,118,137],"nodes":[109],"down":[110,156],"1":[112,158],"node.":[114],"We":[115],"project":[116],"parameters":[119],"(standard":[120],"cell,":[121],"transistor":[122],"interconnect)":[124],"using":[125],"TCAD":[126],"device":[127],"simulations,":[128],"interconnect":[129],"modeling,":[130],"available":[133],"industry/IRDS":[134],"roadmaps.":[135],"State-of-the-art":[136],"trends":[138],"such":[139,189],"fin-depopulation,":[141],"buried":[142],"power":[143],"rail,":[144],"stacked":[145],"nanosheet,":[146],"etc":[147],"captured":[149],"updated":[152],"parameters.":[153],"Technology":[154],"enables":[160],"achieve":[163],"1.4$\\sim":[164],"1.8\\times":[165],"$and":[166],"44.1$\\sim":[167],"63.1\\times":[168],"$higher":[169],"system-level":[170],"figure":[171],"merit":[173],"than":[174],"state-of-the-art":[175],"7":[176],"SRAM-based":[178],"ACIM":[179],"22":[181],"RRAM-based":[183],"ACIM,":[184],"respectively,":[185],"for":[186],"representative":[187],"workloads":[188],"ResNet18":[191],"ResNet34":[193],"inference.":[194]},"counts_by_year":[{"year":2026,"cited_by_count":15},{"year":2025,"cited_by_count":22},{"year":2024,"cited_by_count":2}],"updated_date":"2026-08-21T09:56:20.448147","created_date":"2025-10-10T00:00:00"}
