{"id":"https://openalex.org/W4390480641","doi":"https://doi.org/10.1109/tcsi.2023.3347447","title":"Fast FPGA Prototyping to Explore and Compare New SPWM Strategies","display_name":"Fast FPGA Prototyping to Explore and Compare New SPWM Strategies","publication_year":2024,"publication_date":"2024-01-01","ids":{"openalex":"https://openalex.org/W4390480641","doi":"https://doi.org/10.1109/tcsi.2023.3347447"},"language":"en","primary_location":{"id":"doi:10.1109/tcsi.2023.3347447","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tcsi.2023.3347447","pdf_url":null,"source":{"id":"https://openalex.org/S116977442","display_name":"IEEE Transactions on Circuits and Systems I Regular Papers","issn_l":"1549-8328","issn":["1549-8328","1558-0806"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Circuits and Systems I: Regular Papers","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":true,"oa_status":"green","oa_url":"http://hdl.handle.net/10396/27282","any_repository_has_fulltext":true},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5044133858","display_name":"Sergio R. Geninatti","orcid":"https://orcid.org/0000-0003-0857-9400"},"institutions":[{"id":"https://openalex.org/I4141589","display_name":"National University of Rosario","ror":"https://ror.org/02tphfq59","country_code":"AR","type":"education","lineage":["https://openalex.org/I4141589"]}],"countries":["AR"],"is_corresponding":false,"raw_author_name":"Sergio R. Geninatti","raw_affiliation_strings":["Electronic Department, Universidad Nacional de Rosario, Rosario, Argentina"],"raw_orcid":"https://orcid.org/0000-0002-6331-4627","affiliations":[{"raw_affiliation_string":"Electronic Department, Universidad Nacional de Rosario, Rosario, Argentina","institution_ids":["https://openalex.org/I4141589"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5018267244","display_name":"Manuel Ort\u00edz-L\u00f3pez","orcid":"https://orcid.org/0000-0001-8312-1729"},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Manuel Ortiz-L\u00f3pez","raw_affiliation_strings":["Department of Electronic and Computer Engineering, Universidad de C&#x00F3;rdoba, C&#x00F3;rdoba, Spain"],"raw_orcid":"https://orcid.org/0000-0001-8312-1729","affiliations":[{"raw_affiliation_string":"Department of Electronic and Computer Engineering, Universidad de C&#x00F3;rdoba, C&#x00F3;rdoba, Spain","institution_ids":[]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5052486222","display_name":"Francisco J. Quiles-Latorre","orcid":"https://orcid.org/0000-0002-2180-2497"},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Fco. Javier Quiles-Latorre","raw_affiliation_strings":["Department of Electronic and Computer Engineering, Universidad de C&#x00F3;rdoba, C&#x00F3;rdoba, Spain"],"raw_orcid":"https://orcid.org/0000-0002-2180-2497","affiliations":[{"raw_affiliation_string":"Department of Electronic and Computer Engineering, Universidad de C&#x00F3;rdoba, C&#x00F3;rdoba, Spain","institution_ids":[]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5068147000","display_name":"Tom\u00e1s Morales-Leal","orcid":"https://orcid.org/0000-0002-0089-9832"},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Tom\u00e1s Morales-Leal","raw_affiliation_strings":["Department of Electrical Engineering and Automation, Universidad de C&#x00F3;rdoba, C&#x00F3;rdoba, Spain"],"raw_orcid":"https://orcid.org/0000-0002-0089-9832","affiliations":[{"raw_affiliation_string":"Department of Electrical Engineering and Automation, Universidad de C&#x00F3;rdoba, C&#x00F3;rdoba, Spain","institution_ids":[]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5058807147","display_name":"Andr\u00e9s Gersnoviez","orcid":"https://orcid.org/0000-0002-5515-2584"},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Andr\u00e9s Gersnoviez","raw_affiliation_strings":["Department of Electronic and Computer Engineering, Universidad de C&#x00F3;rdoba, C&#x00F3;rdoba, Spain"],"raw_orcid":"https://orcid.org/0000-0002-5515-2584","affiliations":[{"raw_affiliation_string":"Department of Electronic and Computer Engineering, Universidad de C&#x00F3;rdoba, C&#x00F3;rdoba, Spain","institution_ids":[]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5030694268","display_name":"Antonio Moreno\u2010Mu\u00f1oz","orcid":"https://orcid.org/0000-0002-7298-3902"},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Antonio Moreno-Mu\u00f1oz","raw_affiliation_strings":["Department of Electronic and Computer Engineering, Universidad de C&#x00F3;rdoba, C&#x00F3;rdoba, Spain"],"raw_orcid":"https://orcid.org/0000-0002-7298-3902","affiliations":[{"raw_affiliation_string":"Department of Electronic and Computer Engineering, Universidad de C&#x00F3;rdoba, C&#x00F3;rdoba, Spain","institution_ids":[]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":0.1731,"has_fulltext":false,"cited_by_count":1,"citation_normalized_percentile":{"value":0.42075067,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":91,"max":95},"biblio":{"volume":"71","issue":"3","first_page":"1208","last_page":"1221"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11444","display_name":"Electromagnetic Compatibility and Noise Suppression","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11444","display_name":"Electromagnetic Compatibility and Noise Suppression","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11417","display_name":"Advancements in PLL and VCO Technologies","score":0.9983999729156494,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9958000183105469,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/vhdl","display_name":"VHDL","score":0.8327658176422119},{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.6936038732528687},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.649409294128418},{"id":"https://openalex.org/keywords/pulse-width-modulation","display_name":"Pulse-width modulation","score":0.6241637468338013},{"id":"https://openalex.org/keywords/harmonics","display_name":"Harmonics","score":0.571071982383728},{"id":"https://openalex.org/keywords/test-bench","display_name":"Test bench","score":0.5414900779724121},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.4198402762413025},{"id":"https://openalex.org/keywords/computer-engineering","display_name":"Computer engineering","score":0.3499715328216553},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.3181130886077881},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.1982431411743164},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.1107344925403595},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.0958743691444397}],"concepts":[{"id":"https://openalex.org/C36941000","wikidata":"https://www.wikidata.org/wiki/Q209455","display_name":"VHDL","level":3,"score":0.8327658176422119},{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.6936038732528687},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.649409294128418},{"id":"https://openalex.org/C92746544","wikidata":"https://www.wikidata.org/wiki/Q585184","display_name":"Pulse-width modulation","level":3,"score":0.6241637468338013},{"id":"https://openalex.org/C188414643","wikidata":"https://www.wikidata.org/wiki/Q3001183","display_name":"Harmonics","level":3,"score":0.571071982383728},{"id":"https://openalex.org/C2776266606","wikidata":"https://www.wikidata.org/wiki/Q476482","display_name":"Test bench","level":2,"score":0.5414900779724121},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.4198402762413025},{"id":"https://openalex.org/C113775141","wikidata":"https://www.wikidata.org/wiki/Q428691","display_name":"Computer engineering","level":1,"score":0.3499715328216553},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.3181130886077881},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.1982431411743164},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.1107344925403595},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.0958743691444397}],"mesh":[],"locations_count":2,"locations":[{"id":"doi:10.1109/tcsi.2023.3347447","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tcsi.2023.3347447","pdf_url":null,"source":{"id":"https://openalex.org/S116977442","display_name":"IEEE Transactions on Circuits and Systems I Regular Papers","issn_l":"1549-8328","issn":["1549-8328","1558-0806"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Circuits and Systems I: Regular Papers","raw_type":"journal-article"},{"id":"pmh:oai:helvia.uco.es:10396/27282","is_oa":true,"landing_page_url":"http://hdl.handle.net/10396/27282","pdf_url":null,"source":{"id":"https://openalex.org/S4306401816","display_name":"Universidad de C\u00f3rdoba Insitutional Repository (Universidad de C\u00f3rdoba)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/I4210163269","host_organization_name":"Universidad Paccioli de C\u00f3rdoba","host_organization_lineage":["https://openalex.org/I4210163269"],"host_organization_lineage_names":[],"type":"repository"},"license":"cc-by-nc-nd","license_id":"https://openalex.org/licenses/cc-by-nc-nd","version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"IEEE Transactions on Circuits and Systems I: Regular Papers","raw_type":"info:eu-repo/semantics/article"}],"best_oa_location":{"id":"pmh:oai:helvia.uco.es:10396/27282","is_oa":true,"landing_page_url":"http://hdl.handle.net/10396/27282","pdf_url":null,"source":{"id":"https://openalex.org/S4306401816","display_name":"Universidad de C\u00f3rdoba Insitutional Repository (Universidad de C\u00f3rdoba)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/I4210163269","host_organization_name":"Universidad Paccioli de C\u00f3rdoba","host_organization_lineage":["https://openalex.org/I4210163269"],"host_organization_lineage_names":[],"type":"repository"},"license":"cc-by-nc-nd","license_id":"https://openalex.org/licenses/cc-by-nc-nd","version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"IEEE Transactions on Circuits and Systems I: Regular Papers","raw_type":"info:eu-repo/semantics/article"},"sustainable_development_goals":[],"awards":[],"funders":[{"id":"https://openalex.org/F4320325299","display_name":"Universidad de C\u00f3rdoba","ror":"https://ror.org/05yc77b46"}],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":23,"referenced_works":["https://openalex.org/W1909951863","https://openalex.org/W1935697641","https://openalex.org/W1980866041","https://openalex.org/W2098222699","https://openalex.org/W2130117251","https://openalex.org/W2130491144","https://openalex.org/W2151568428","https://openalex.org/W2164794185","https://openalex.org/W2345116371","https://openalex.org/W2490591956","https://openalex.org/W2519984558","https://openalex.org/W2790227958","https://openalex.org/W2887791624","https://openalex.org/W2944043782","https://openalex.org/W2988660269","https://openalex.org/W2998045500","https://openalex.org/W3022819153","https://openalex.org/W3095545912","https://openalex.org/W3113682735","https://openalex.org/W3146561073","https://openalex.org/W3170390931","https://openalex.org/W4255216959","https://openalex.org/W4383551324"],"related_works":["https://openalex.org/W2370517014","https://openalex.org/W2039242888","https://openalex.org/W2383333355","https://openalex.org/W2515867587","https://openalex.org/W2144353363","https://openalex.org/W1838021708","https://openalex.org/W2389325540","https://openalex.org/W3011158618","https://openalex.org/W4387812417","https://openalex.org/W4230273324"],"abstract_inverted_index":{"This":[0],"study":[1],"presents":[2],"a":[3,14,33,66,113,148,191],"Flexible":[4],"Test":[5],"Bench":[6],"(FTB)":[7],"implemented":[8,214],"with":[9],"FPGA":[10],"that":[11,19,152,204],"synthesises":[12],"of":[13,17,27,45,91,97,127,142,156,179,184],"large":[15],"number":[16,90],"strategies":[18],"apply":[20],"\u201cSpread":[21],"Spectrum\u201d":[22],"to":[23,54,59,103,117,120,146,188],"reduce":[24],"the":[25,28,46,89,104,121,125,130,143,154,160,174,180,195,200,205,213],"energy":[26],"fundamental":[29],"harmonics":[30],"present":[31,198],"in":[32,76,109,190,199],"conventional":[34],"Pulse":[35],"Width":[36],"Modulation":[37],"(PWM).":[38],"The":[39,71,140],"FTB":[40,72,186],"not":[41],"only":[42],"incorporates":[43],"most":[44,131],"known":[47],"spread":[48,105,134],"spectrum":[49,106,135],"techniques":[50,158,215],"but":[51],"also":[52],"allows":[53,153],"combine":[55],"them":[56,98],"and":[57,88,124,167,176,208],"even":[58],"easily":[60],"create":[61],"new":[62],"ones,":[63],"thus":[64],"providing":[65],"highly":[67],"flexible":[68],"test":[69],"bench.":[70],"has":[73],"been":[74],"described":[75],"standard":[77],"VHDL,":[78],"so":[79,203],"it":[80],"can":[81,99],"be":[82,100],"synthesised":[83],"using":[84],"any":[85],"synthesis":[86],"tool,":[87],"logical":[92],"resources":[93],"used":[94,210],"by":[95],"each":[96,138],"determined":[101],"according":[102,119],"strategy":[107,136],"configured":[108],"its":[110],"registers.":[111],"Therefore,":[112],"tool":[114],"is":[115,145,187],"available":[116],"choose,":[118],"spectral":[122],"response":[123],"consumption":[126],"logic":[128],"resources,":[129],"suitable":[132],"PWM":[133],"for":[137],"application.":[139],"particularity":[141],"proposal":[144],"have":[147],"unique":[149],"hardware":[150],"platform":[151],"comparison":[155],"different":[157],"under":[159],"same":[161],"physical":[162,168],"implementation":[163,202],"conditions":[164],"since":[165],"geometry":[166],"location":[169],"are":[170],"important":[171],"when":[172],"evaluating":[173],"conducted":[175],"radiated":[177],"emission":[178],"circuits.":[181],"Another":[182],"objective":[183],"our":[185],"solve":[189],"unified":[192],"way":[193],"all":[194,212],"numerical":[196,206],"aspects":[197],"FPGA-based":[201],"ranges":[207],"roundings":[209],"affect":[211],"equally.":[216]},"counts_by_year":[{"year":2025,"cited_by_count":1}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}
