{"id":"https://openalex.org/W4386560980","doi":"https://doi.org/10.1109/tcsi.2023.3308781","title":"A Continuous-Output-Current Buck-Boost Converter Without Right-Half-Plane-Zero (RHPZ)","display_name":"A Continuous-Output-Current Buck-Boost Converter Without Right-Half-Plane-Zero (RHPZ)","publication_year":2023,"publication_date":"2023-09-08","ids":{"openalex":"https://openalex.org/W4386560980","doi":"https://doi.org/10.1109/tcsi.2023.3308781"},"language":"en","primary_location":{"id":"doi:10.1109/tcsi.2023.3308781","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tcsi.2023.3308781","pdf_url":null,"source":{"id":"https://openalex.org/S116977442","display_name":"IEEE Transactions on Circuits and Systems I Regular Papers","issn_l":"1549-8328","issn":["1549-8328","1558-0806"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Circuits and Systems I: Regular Papers","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5084168920","display_name":"Caolei Pan","orcid":"https://orcid.org/0009-0009-0593-2345"},"institutions":[{"id":"https://openalex.org/I204512498","display_name":"University of Macau","ror":"https://ror.org/01r4q9n85","country_code":"MO","type":"education","lineage":["https://openalex.org/I204512498"]},{"id":"https://openalex.org/I3045169105","display_name":"Southern University of Science and Technology","ror":"https://ror.org/049tv2d57","country_code":"CN","type":"education","lineage":["https://openalex.org/I3045169105"]},{"id":"https://openalex.org/I4210119392","display_name":"Institute of Microelectronics","ror":"https://ror.org/02s6gs133","country_code":"CN","type":"facility","lineage":["https://openalex.org/I19820366","https://openalex.org/I4210119392"]}],"countries":["CN","MO"],"is_corresponding":true,"raw_author_name":"Caolei Pan","raw_affiliation_strings":["School of Microelectronics, Southern University of Science and Technology, Shenzhen, China","State Key Laboratory of Analog and Mixed-Signal VLSI, University of Macau, Macau, China","Department of Electrical and Computer Engineering, Faculty of Science and Technology, University of Macau, Macau, China","Institute of Microelectronics, University of Macau, Macau, China"],"raw_orcid":"https://orcid.org/0009-0009-0593-2345","affiliations":[{"raw_affiliation_string":"School of Microelectronics, Southern University of Science and Technology, Shenzhen, China","institution_ids":["https://openalex.org/I3045169105"]},{"raw_affiliation_string":"State Key Laboratory of Analog and Mixed-Signal VLSI, University of Macau, Macau, China","institution_ids":["https://openalex.org/I204512498"]},{"raw_affiliation_string":"Department of Electrical and Computer Engineering, Faculty of Science and Technology, University of Macau, Macau, China","institution_ids":["https://openalex.org/I204512498"]},{"raw_affiliation_string":"Institute of Microelectronics, University of Macau, Macau, China","institution_ids":["https://openalex.org/I4210119392","https://openalex.org/I204512498"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5029241233","display_name":"Chenchang Zhan","orcid":"https://orcid.org/0000-0002-4878-4655"},"institutions":[{"id":"https://openalex.org/I3045169105","display_name":"Southern University of Science and Technology","ror":"https://ror.org/049tv2d57","country_code":"CN","type":"education","lineage":["https://openalex.org/I3045169105"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Chenchang Zhan","raw_affiliation_strings":["School of Microelectronics, Southern University of Science and Technology, Shenzhen, China","Ministry of Education, Engineering Research Center of Integrated Circuits for Next-Generation Communications, Shenzhen, China"],"raw_orcid":"https://orcid.org/0000-0002-4878-4655","affiliations":[{"raw_affiliation_string":"School of Microelectronics, Southern University of Science and Technology, Shenzhen, China","institution_ids":["https://openalex.org/I3045169105"]},{"raw_affiliation_string":"Ministry of Education, Engineering Research Center of Integrated Circuits for Next-Generation Communications, Shenzhen, China","institution_ids":[]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5106943352","display_name":"Rui P. Martins","orcid":"https://orcid.org/0000-0003-2821-648X"},"institutions":[{"id":"https://openalex.org/I204512498","display_name":"University of Macau","ror":"https://ror.org/01r4q9n85","country_code":"MO","type":"education","lineage":["https://openalex.org/I204512498"]},{"id":"https://openalex.org/I4210119392","display_name":"Institute of Microelectronics","ror":"https://ror.org/02s6gs133","country_code":"CN","type":"facility","lineage":["https://openalex.org/I19820366","https://openalex.org/I4210119392"]}],"countries":["CN","MO"],"is_corresponding":false,"raw_author_name":"Rui P. Martins","raw_affiliation_strings":["State Key Laboratory of Analog and Mixed-Signal VLSI, University of Macau, Macau, China","Institute of Microelectronics, University of Macau, Macau, China","Department of Electrical and Computer Engineering, Faculty of Science and Technology, University of Macau, Macau, China"],"raw_orcid":"https://orcid.org/0000-0003-2821-648X","affiliations":[{"raw_affiliation_string":"State Key Laboratory of Analog and Mixed-Signal VLSI, University of Macau, Macau, China","institution_ids":["https://openalex.org/I204512498"]},{"raw_affiliation_string":"Institute of Microelectronics, University of Macau, Macau, China","institution_ids":["https://openalex.org/I4210119392","https://openalex.org/I204512498"]},{"raw_affiliation_string":"Department of Electrical and Computer Engineering, Faculty of Science and Technology, University of Macau, Macau, China","institution_ids":["https://openalex.org/I204512498"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5043052453","display_name":"Chi\u2010Seng Lam","orcid":"https://orcid.org/0000-0003-3669-6743"},"institutions":[{"id":"https://openalex.org/I204512498","display_name":"University of Macau","ror":"https://ror.org/01r4q9n85","country_code":"MO","type":"education","lineage":["https://openalex.org/I204512498"]},{"id":"https://openalex.org/I4210119392","display_name":"Institute of Microelectronics","ror":"https://ror.org/02s6gs133","country_code":"CN","type":"facility","lineage":["https://openalex.org/I19820366","https://openalex.org/I4210119392"]}],"countries":["CN","MO"],"is_corresponding":false,"raw_author_name":"Chi-Seng Lam","raw_affiliation_strings":["State Key Laboratory of Analog and Mixed-Signal VLSI, University of Macau, Macau, China","Institute of Microelectronics, University of Macau, Macau, China","Department of Electrical and Computer Engineering, Faculty of Science and Technology, University of Macau, Macau, China"],"raw_orcid":"https://orcid.org/0000-0003-3669-6743","affiliations":[{"raw_affiliation_string":"State Key Laboratory of Analog and Mixed-Signal VLSI, University of Macau, Macau, China","institution_ids":["https://openalex.org/I204512498"]},{"raw_affiliation_string":"Institute of Microelectronics, University of Macau, Macau, China","institution_ids":["https://openalex.org/I4210119392","https://openalex.org/I204512498"]},{"raw_affiliation_string":"Department of Electrical and Computer Engineering, Faculty of Science and Technology, University of Macau, Macau, China","institution_ids":["https://openalex.org/I204512498"]}]}],"institutions":[],"countries_distinct_count":2,"institutions_distinct_count":4,"corresponding_author_ids":["https://openalex.org/A5084168920"],"corresponding_institution_ids":["https://openalex.org/I204512498","https://openalex.org/I3045169105","https://openalex.org/I4210119392"],"apc_list":null,"apc_paid":null,"fwci":1.6608,"has_fulltext":false,"cited_by_count":13,"citation_normalized_percentile":{"value":0.84113996,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":90,"max":99},"biblio":{"volume":"70","issue":"12","first_page":"4719","last_page":"4728"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10175","display_name":"Advanced DC-DC Converters","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10175","display_name":"Advanced DC-DC Converters","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10228","display_name":"Multilevel Inverters and Converters","score":0.9975000023841858,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10361","display_name":"Silicon Carbide Semiconductor Technologies","score":0.992900013923645,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/capacitor","display_name":"Capacitor","score":0.5728166103363037},{"id":"https://openalex.org/keywords/zero","display_name":"Zero (linguistics)","score":0.47345229983329773},{"id":"https://openalex.org/keywords/topology","display_name":"Topology (electrical circuits)","score":0.4132130742073059},{"id":"https://openalex.org/keywords/mathematics","display_name":"Mathematics","score":0.3985916078090668},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.3730466365814209},{"id":"https://openalex.org/keywords/discrete-mathematics","display_name":"Discrete mathematics","score":0.32549041509628296},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.2678713798522949},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.20008042454719543},{"id":"https://openalex.org/keywords/combinatorics","display_name":"Combinatorics","score":0.18910878896713257},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.13035231828689575}],"concepts":[{"id":"https://openalex.org/C52192207","wikidata":"https://www.wikidata.org/wiki/Q5322","display_name":"Capacitor","level":3,"score":0.5728166103363037},{"id":"https://openalex.org/C2780813799","wikidata":"https://www.wikidata.org/wiki/Q3274237","display_name":"Zero (linguistics)","level":2,"score":0.47345229983329773},{"id":"https://openalex.org/C184720557","wikidata":"https://www.wikidata.org/wiki/Q7825049","display_name":"Topology (electrical circuits)","level":2,"score":0.4132130742073059},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.3985916078090668},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.3730466365814209},{"id":"https://openalex.org/C118615104","wikidata":"https://www.wikidata.org/wiki/Q121416","display_name":"Discrete mathematics","level":1,"score":0.32549041509628296},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.2678713798522949},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.20008042454719543},{"id":"https://openalex.org/C114614502","wikidata":"https://www.wikidata.org/wiki/Q76592","display_name":"Combinatorics","level":1,"score":0.18910878896713257},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.13035231828689575},{"id":"https://openalex.org/C41895202","wikidata":"https://www.wikidata.org/wiki/Q8162","display_name":"Linguistics","level":1,"score":0.0},{"id":"https://openalex.org/C138885662","wikidata":"https://www.wikidata.org/wiki/Q5891","display_name":"Philosophy","level":0,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/tcsi.2023.3308781","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tcsi.2023.3308781","pdf_url":null,"source":{"id":"https://openalex.org/S116977442","display_name":"IEEE Transactions on Circuits and Systems I Regular Papers","issn_l":"1549-8328","issn":["1549-8328","1558-0806"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Circuits and Systems I: Regular Papers","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[{"score":0.75,"display_name":"Affordable and clean energy","id":"https://metadata.un.org/sdg/7"}],"awards":[{"id":"https://openalex.org/G1348689333","display_name":null,"funder_award_id":"JCYJ20220530115217040","funder_id":"https://openalex.org/F4320326705","funder_display_name":"Science, Technology and Innovation Commission of Shenzhen Municipality"},{"id":"https://openalex.org/G1906504188","display_name":null,"funder_award_id":"JCYJ20200109141225025","funder_id":"https://openalex.org/F4320326705","funder_display_name":"Science, Technology and Innovation Commission of Shenzhen Municipality"},{"id":"https://openalex.org/G3899903877","display_name":null,"funder_award_id":"MYRG2018-00020-AMSV","funder_id":"https://openalex.org/F4320322841","funder_display_name":"Universidade de Macau"},{"id":"https://openalex.org/G5722861511","display_name":null,"funder_award_id":"SGDX20201103093601011","funder_id":"https://openalex.org/F4320326705","funder_display_name":"Science, Technology and Innovation Commission of Shenzhen Municipality"},{"id":"https://openalex.org/G7689007569","display_name":null,"funder_award_id":"62174080","funder_id":"https://openalex.org/F4320321001","funder_display_name":"National Natural Science Foundation of China"},{"id":"https://openalex.org/G8581169053","display_name":null,"funder_award_id":"MYRG2020-00056-IME","funder_id":"https://openalex.org/F4320322841","funder_display_name":"Universidade de Macau"},{"id":"https://openalex.org/G8836723782","display_name":null,"funder_award_id":"MYRG2022-00172-IME","funder_id":"https://openalex.org/F4320322841","funder_display_name":"Universidade de Macau"}],"funders":[{"id":"https://openalex.org/F4320321001","display_name":"National Natural Science Foundation of China","ror":"https://ror.org/01h0zpd94"},{"id":"https://openalex.org/F4320322841","display_name":"Universidade de Macau","ror":"https://ror.org/01r4q9n85"},{"id":"https://openalex.org/F4320326705","display_name":"Science, Technology and Innovation Commission of Shenzhen Municipality","ror":null}],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":15,"referenced_works":["https://openalex.org/W2147822042","https://openalex.org/W2284058816","https://openalex.org/W2594291011","https://openalex.org/W2739513644","https://openalex.org/W2793909808","https://openalex.org/W2941207325","https://openalex.org/W2954472113","https://openalex.org/W2985407235","https://openalex.org/W3015909866","https://openalex.org/W3040985911","https://openalex.org/W3082668511","https://openalex.org/W3158157832","https://openalex.org/W3164867970","https://openalex.org/W3209464224","https://openalex.org/W4280516764"],"related_works":["https://openalex.org/W4391375266","https://openalex.org/W2051487156","https://openalex.org/W2073681303","https://openalex.org/W4398198689","https://openalex.org/W2354365353","https://openalex.org/W1988437325","https://openalex.org/W2811287415","https://openalex.org/W2354835317","https://openalex.org/W2130152888","https://openalex.org/W2003918017"],"abstract_inverted_index":{"This":[0],"paper":[1],"presents":[2],"a":[3,10,71,89,115,128,137,174,213,223,227],"high-efficiency":[4],"continuous-output-current":[5],"buck-boost":[6,12],"(COCBB)":[7],"converter":[8,77,221],"with":[9,212],"single":[11],"mode":[13],"operation.":[14],"The":[15,204],"proposed":[16,75],"COCBB":[17,76],"comprises":[18],"one":[19,32],"flying":[20,72],"capacitor":[21],"(":[22,35,48],"<inline-formula":[23,36,49,58,95,155,195],"xmlns:mml=\"http://www.w3.org/1998/Math/MathML\"":[24,37,50,59,96,156,196],"xmlns:xlink=\"http://www.w3.org/1999/xlink\">":[25,38,51,60,97,157,197],"<tex-math":[26,39,52,61,98,158,198],"notation=\"LaTeX\">$\\mathbf":[27,40,53,62,99],"{C}_{\\mathbf":[28],"{F}}$":[29],"</tex-math></inline-formula>":[30,42,56,65,101,161,201],"),":[31,43],"power":[33,46,80],"inductor":[34,81],"{L}$":[41],"and":[44,123,145,182,202,226,232],"five":[45],"switches":[47],"{S}_{\\mathbf":[54,63],"{1}}$":[55],"to":[57,82,135,177],"{5}}$":[64],").":[66],"With":[67,106],"the":[68,74,107,112,142,163,190,220],"help":[69],"of":[70,94,170,186,216,230],"capacitor,":[73],"allows":[78],"its":[79],"continuously":[83],"deliver":[84],"output":[85,109,117,168,206],"current":[86,110,215,228],"while":[87],"achieving":[88],"wide":[90],"conversion":[91],"ratio":[92],"range":[93,181],"{D/(1-D)}$":[100],",":[102],"without":[103],"right-half-plane-zero":[104],"(RHPZ).":[105],"continuous":[108],"delivery,":[111],"circuit":[113],"exhibits":[114],"small":[116],"voltage":[118,169],"ripple,":[119],"good":[120],"transient":[121,192],"response":[122],"high":[124],"efficiency.":[125],"We":[126],"employ":[127],"double":[129],"clock":[130],"timing":[131],"(DCT)":[132],"control":[133,144,148],"method":[134],"obtain":[136],"smooth":[138],"controller-mode":[139],"transition":[140],"between":[141,194],"DCT":[143],"pulse-width-modulation":[146],"(PWM)":[147],"for":[149],"different":[150],"load":[151,191],"conditions.":[152],"Fabricated":[153],"in":[154],"notation=\"LaTeX\">$0.18\\mu":[159],"\\text{m}$":[160],"CMOS,":[162],"prototype":[164],"chip":[165],"regulates":[166],"an":[167,184],"1.6":[171],"V":[172,176,179],"from":[173],"1.4":[175],"1.8":[178],"input":[180],"revealing":[183],"undershoot/overshoot":[185],"90/30":[187],"mV":[188,211],"under":[189],"steps":[193],"notation=\"LaTeX\">$100\\mu":[199],"\\text{A}$":[200],"900mA.":[203],"measured":[205],"ripple":[207],"is":[208],"only":[209],"10":[210],"loading":[214],"400":[217],"mA.":[218],"Also,":[219],"manifests":[222],"peak":[224],"efficiency":[225],"density":[229],"95.5%":[231],"0.46":[233],"A/mm2,":[234],"respectively.":[235]},"counts_by_year":[{"year":2025,"cited_by_count":6},{"year":2024,"cited_by_count":6},{"year":2023,"cited_by_count":1}],"updated_date":"2026-03-27T05:58:40.876381","created_date":"2025-10-10T00:00:00"}
