{"id":"https://openalex.org/W4385656577","doi":"https://doi.org/10.1109/tcsi.2023.3300225","title":"Bi-Directional Gated Ring Oscillator Time Integrator","display_name":"Bi-Directional Gated Ring Oscillator Time Integrator","publication_year":2023,"publication_date":"2023-08-08","ids":{"openalex":"https://openalex.org/W4385656577","doi":"https://doi.org/10.1109/tcsi.2023.3300225"},"language":"en","primary_location":{"id":"doi:10.1109/tcsi.2023.3300225","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tcsi.2023.3300225","pdf_url":null,"source":{"id":"https://openalex.org/S116977442","display_name":"IEEE Transactions on Circuits and Systems I Regular Papers","issn_l":"1549-8328","issn":["1549-8328","1558-0806"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Circuits and Systems I: Regular Papers","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5100698597","display_name":"Fei Yuan","orcid":"https://orcid.org/0000-0001-7758-5455"},"institutions":[{"id":"https://openalex.org/I530967","display_name":"Toronto Metropolitan University","ror":"https://ror.org/05g13zd79","country_code":"CA","type":"education","lineage":["https://openalex.org/I530967"]}],"countries":["CA"],"is_corresponding":true,"raw_author_name":"Fei Yuan","raw_affiliation_strings":["Department of Electrical, Computer, and Biomedical Engineering, Toronto Metropolitan University, Toronto, Canada"],"affiliations":[{"raw_affiliation_string":"Department of Electrical, Computer, and Biomedical Engineering, Toronto Metropolitan University, Toronto, Canada","institution_ids":["https://openalex.org/I530967"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5067036763","display_name":"Parth Parekh","orcid":null},"institutions":[{"id":"https://openalex.org/I530967","display_name":"Toronto Metropolitan University","ror":"https://ror.org/05g13zd79","country_code":"CA","type":"education","lineage":["https://openalex.org/I530967"]}],"countries":["CA"],"is_corresponding":false,"raw_author_name":"Parth Parekh","raw_affiliation_strings":["Department of Electrical, Computer, and Biomedical Engineering, Toronto Metropolitan University, Toronto, Canada"],"affiliations":[{"raw_affiliation_string":"Department of Electrical, Computer, and Biomedical Engineering, Toronto Metropolitan University, Toronto, Canada","institution_ids":["https://openalex.org/I530967"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5031541759","display_name":"Yushi Zhou","orcid":"https://orcid.org/0000-0002-2019-1436"},"institutions":[{"id":"https://openalex.org/I72541430","display_name":"Lakehead University","ror":"https://ror.org/023p7mg82","country_code":"CA","type":"education","lineage":["https://openalex.org/I72541430"]}],"countries":["CA"],"is_corresponding":false,"raw_author_name":"Yushi Zhou","raw_affiliation_strings":["Department of Electrical and Computer Engineering, Lakehead University, Thunder Bay, Canada"],"affiliations":[{"raw_affiliation_string":"Department of Electrical and Computer Engineering, Lakehead University, Thunder Bay, Canada","institution_ids":["https://openalex.org/I72541430"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":3,"corresponding_author_ids":["https://openalex.org/A5100698597"],"corresponding_institution_ids":["https://openalex.org/I530967"],"apc_list":null,"apc_paid":null,"fwci":1.0697,"has_fulltext":false,"cited_by_count":8,"citation_normalized_percentile":{"value":0.76805279,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":94,"max":98},"biblio":{"volume":"70","issue":"9","first_page":"3461","last_page":"3473"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11417","display_name":"Advancements in PLL and VCO Technologies","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11417","display_name":"Advancements in PLL and VCO Technologies","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":0.9994999766349792,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10187","display_name":"Radio Frequency Integrated Circuit Design","score":0.9973000288009644,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/integrator","display_name":"Integrator","score":0.9505910277366638},{"id":"https://openalex.org/keywords/integrating-adc","display_name":"Integrating ADC","score":0.819659948348999},{"id":"https://openalex.org/keywords/passive-integrator-circuit","display_name":"Passive integrator circuit","score":0.7849795818328857},{"id":"https://openalex.org/keywords/ring-oscillator","display_name":"Ring oscillator","score":0.6253808736801147},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.5570270419120789},{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.5176480412483215},{"id":"https://openalex.org/keywords/time-delay-and-integration","display_name":"Time delay and integration","score":0.5055992603302002},{"id":"https://openalex.org/keywords/op-amp-integrator","display_name":"Op amp integrator","score":0.4636697769165039},{"id":"https://openalex.org/keywords/harmonics","display_name":"Harmonics","score":0.44992268085479736},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.4495936930179596},{"id":"https://openalex.org/keywords/dynamic-range","display_name":"Dynamic range","score":0.44589757919311523},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.43827542662620544},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.33010268211364746},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.3163987696170807},{"id":"https://openalex.org/keywords/capacitor","display_name":"Capacitor","score":0.1488017439842224},{"id":"https://openalex.org/keywords/rc-circuit","display_name":"RC circuit","score":0.129707932472229},{"id":"https://openalex.org/keywords/operational-amplifier","display_name":"Operational amplifier","score":0.11285704374313354}],"concepts":[{"id":"https://openalex.org/C79518650","wikidata":"https://www.wikidata.org/wiki/Q2081431","display_name":"Integrator","level":3,"score":0.9505910277366638},{"id":"https://openalex.org/C140020054","wikidata":"https://www.wikidata.org/wiki/Q6043185","display_name":"Integrating ADC","level":5,"score":0.819659948348999},{"id":"https://openalex.org/C30839866","wikidata":"https://www.wikidata.org/wiki/Q918242","display_name":"Passive integrator circuit","level":5,"score":0.7849795818328857},{"id":"https://openalex.org/C104111718","wikidata":"https://www.wikidata.org/wiki/Q2153973","display_name":"Ring oscillator","level":3,"score":0.6253808736801147},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.5570270419120789},{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.5176480412483215},{"id":"https://openalex.org/C96566525","wikidata":"https://www.wikidata.org/wiki/Q7805282","display_name":"Time delay and integration","level":2,"score":0.5055992603302002},{"id":"https://openalex.org/C159606330","wikidata":"https://www.wikidata.org/wiki/Q3799294","display_name":"Op amp integrator","level":5,"score":0.4636697769165039},{"id":"https://openalex.org/C188414643","wikidata":"https://www.wikidata.org/wiki/Q3001183","display_name":"Harmonics","level":3,"score":0.44992268085479736},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.4495936930179596},{"id":"https://openalex.org/C87133666","wikidata":"https://www.wikidata.org/wiki/Q1161699","display_name":"Dynamic range","level":2,"score":0.44589757919311523},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.43827542662620544},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.33010268211364746},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.3163987696170807},{"id":"https://openalex.org/C52192207","wikidata":"https://www.wikidata.org/wiki/Q5322","display_name":"Capacitor","level":3,"score":0.1488017439842224},{"id":"https://openalex.org/C39394816","wikidata":"https://www.wikidata.org/wiki/Q939318","display_name":"RC circuit","level":4,"score":0.129707932472229},{"id":"https://openalex.org/C145366948","wikidata":"https://www.wikidata.org/wiki/Q178947","display_name":"Operational amplifier","level":4,"score":0.11285704374313354},{"id":"https://openalex.org/C31972630","wikidata":"https://www.wikidata.org/wiki/Q844240","display_name":"Computer vision","level":1,"score":0.0},{"id":"https://openalex.org/C100329506","wikidata":"https://www.wikidata.org/wiki/Q336439","display_name":"\u0106uk converter","level":4,"score":0.0},{"id":"https://openalex.org/C194257627","wikidata":"https://www.wikidata.org/wiki/Q211554","display_name":"Amplifier","level":3,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/tcsi.2023.3300225","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tcsi.2023.3300225","pdf_url":null,"source":{"id":"https://openalex.org/S116977442","display_name":"IEEE Transactions on Circuits and Systems I Regular Papers","issn_l":"1549-8328","issn":["1549-8328","1558-0806"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Circuits and Systems I: Regular Papers","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[{"display_name":"Affordable and clean energy","id":"https://metadata.un.org/sdg/7","score":0.4399999976158142}],"awards":[],"funders":[{"id":"https://openalex.org/F4320310709","display_name":"CMC Microsystems","ror":"https://ror.org/03k70ea39"},{"id":"https://openalex.org/F4320334593","display_name":"Natural Sciences and Engineering Research Council of Canada","ror":"https://ror.org/01h531d29"}],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":29,"referenced_works":["https://openalex.org/W1566916904","https://openalex.org/W1585651733","https://openalex.org/W1994468577","https://openalex.org/W2011882362","https://openalex.org/W2094282675","https://openalex.org/W2096434843","https://openalex.org/W2108324407","https://openalex.org/W2119123494","https://openalex.org/W2129773844","https://openalex.org/W2153293882","https://openalex.org/W2171210937","https://openalex.org/W2517094076","https://openalex.org/W2758584561","https://openalex.org/W2891153146","https://openalex.org/W2902288217","https://openalex.org/W2959661790","https://openalex.org/W2962497612","https://openalex.org/W2979634977","https://openalex.org/W3034075659","https://openalex.org/W3180476462","https://openalex.org/W3199279151","https://openalex.org/W3210865030","https://openalex.org/W4287887141","https://openalex.org/W4292070713","https://openalex.org/W4293100296","https://openalex.org/W4306147445","https://openalex.org/W4308091074","https://openalex.org/W6649064377","https://openalex.org/W6679303543"],"related_works":["https://openalex.org/W2143449266","https://openalex.org/W2388167301","https://openalex.org/W2563503076","https://openalex.org/W2130119779","https://openalex.org/W2090668620","https://openalex.org/W2065081920","https://openalex.org/W2368860006","https://openalex.org/W2058962136","https://openalex.org/W4385656577","https://openalex.org/W2613964090"],"abstract_inverted_index":{"This":[0],"paper":[1],"presents":[2],"the":[3,49,52,55],"principle,":[4],"design,":[5],"and":[6,43,66,90,108,121],"analysis":[7,47],"of":[8,48,51,54,128],"a":[9,34,82,115,126],"bi-directional":[10],"gated":[11],"ring":[12],"oscillator":[13],"(BDGRO)":[14],"time":[15,22,56,77,107,112],"integrator":[16,23,57,78,113],"for":[17],"time-based":[18],"signal":[19],"processing.":[20],"The":[21,76,111],"features":[24],"full":[25],"compatibility":[26],"with":[27,73,94,125],"technology,":[28],"rapid":[29],"integration,":[30],"low":[31],"power":[32],"consumption,":[33],"virtually":[35],"unlimited":[36],"dynamic":[37,40],"range,":[38],"built-in":[39],"element":[41],"matching,":[42],"self-digitization.":[44],"A":[45],"detailed":[46],"impact":[50],"imperfections":[53],"including":[58],"nonlinearity,":[59],"skew,":[60],"supply":[61],"voltage":[62],"noise,":[63,65],"device":[64,96],"metastability-induced":[67],"gating":[68],"errors":[69],"is":[70,79,100],"provided,":[71],"supported":[72],"simulation":[74,103],"results.":[75],"designed":[80],"in":[81,105],"TSMC":[83],"130":[84],"nm":[85],"1.2":[86],"V":[87],"CMOS":[88],"technology":[89],"analyzed":[91],"using":[92,102],"Virtuoso/Spectre":[93],"BSIM3":[95],"models.":[97],"Time":[98],"integration":[99],"confirmed":[101],"results":[104],"both":[106],"frequency":[109],"domains.":[110],"exhibits":[114],"clean":[116],"spectrum":[117],"without":[118],"noticeable":[119],"harmonics":[120],"consumes":[122],"0.25":[123],"mW":[124],"gain":[127],"15.48":[129],"dB":[130],"at":[131],"20":[132],"MS/s.":[133]},"counts_by_year":[{"year":2025,"cited_by_count":4},{"year":2024,"cited_by_count":2},{"year":2023,"cited_by_count":2}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}
