{"id":"https://openalex.org/W4327522190","doi":"https://doi.org/10.1109/tcsi.2023.3254810","title":"Dustin: A 16-Cores Parallel Ultra-Low-Power Cluster With 2b-to-32b Fully Flexible Bit-Precision and Vector Lockstep Execution Mode","display_name":"Dustin: A 16-Cores Parallel Ultra-Low-Power Cluster With 2b-to-32b Fully Flexible Bit-Precision and Vector Lockstep Execution Mode","publication_year":2023,"publication_date":"2023-03-15","ids":{"openalex":"https://openalex.org/W4327522190","doi":"https://doi.org/10.1109/tcsi.2023.3254810"},"language":"en","primary_location":{"id":"doi:10.1109/tcsi.2023.3254810","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tcsi.2023.3254810","pdf_url":null,"source":{"id":"https://openalex.org/S116977442","display_name":"IEEE Transactions on Circuits and Systems I Regular Papers","issn_l":"1549-8328","issn":["1549-8328","1558-0806"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Circuits and Systems I: Regular Papers","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":true,"oa_status":"green","oa_url":"https://ieeexplore.ieee.org/document/10071725","any_repository_has_fulltext":true},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5069061522","display_name":"Gianmarco Ottavi","orcid":"https://orcid.org/0000-0003-0041-7917"},"institutions":[{"id":"https://openalex.org/I9360294","display_name":"University of Bologna","ror":"https://ror.org/01111rn36","country_code":"IT","type":"education","lineage":["https://openalex.org/I9360294"]}],"countries":["IT"],"is_corresponding":false,"raw_author_name":"Gianmarco Ottavi","raw_affiliation_strings":["Department of Electrical, Electronic and Information Engineering (DEI), University of Bologna, Bologna, Italy"],"raw_orcid":"https://orcid.org/0000-0003-0041-7917","affiliations":[{"raw_affiliation_string":"Department of Electrical, Electronic and Information Engineering (DEI), University of Bologna, Bologna, Italy","institution_ids":["https://openalex.org/I9360294"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5052915995","display_name":"Angelo Garofalo","orcid":"https://orcid.org/0000-0002-7495-6895"},"institutions":[{"id":"https://openalex.org/I9360294","display_name":"University of Bologna","ror":"https://ror.org/01111rn36","country_code":"IT","type":"education","lineage":["https://openalex.org/I9360294"]}],"countries":["IT"],"is_corresponding":false,"raw_author_name":"Angelo Garofalo","raw_affiliation_strings":["Department of Electrical, Electronic and Information Engineering (DEI), University of Bologna, Bologna, Italy"],"raw_orcid":"https://orcid.org/0000-0002-7495-6895","affiliations":[{"raw_affiliation_string":"Department of Electrical, Electronic and Information Engineering (DEI), University of Bologna, Bologna, Italy","institution_ids":["https://openalex.org/I9360294"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5004842257","display_name":"Giuseppe Tagliavini","orcid":"https://orcid.org/0000-0002-9221-4633"},"institutions":[{"id":"https://openalex.org/I9360294","display_name":"University of Bologna","ror":"https://ror.org/01111rn36","country_code":"IT","type":"education","lineage":["https://openalex.org/I9360294"]}],"countries":["IT"],"is_corresponding":false,"raw_author_name":"Giuseppe Tagliavini","raw_affiliation_strings":["Department of Computer Science and Engineering (DISI), University of Bologna, Bologna, Italy"],"raw_orcid":"https://orcid.org/0000-0002-9221-4633","affiliations":[{"raw_affiliation_string":"Department of Computer Science and Engineering (DISI), University of Bologna, Bologna, Italy","institution_ids":["https://openalex.org/I9360294"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5038717922","display_name":"Francesco Conti","orcid":"https://orcid.org/0000-0002-7924-933X"},"institutions":[{"id":"https://openalex.org/I9360294","display_name":"University of Bologna","ror":"https://ror.org/01111rn36","country_code":"IT","type":"education","lineage":["https://openalex.org/I9360294"]}],"countries":["IT"],"is_corresponding":false,"raw_author_name":"Francesco Conti","raw_affiliation_strings":["Department of Electrical, Electronic and Information Engineering (DEI), University of Bologna, Bologna, Italy"],"raw_orcid":"https://orcid.org/0000-0002-7924-933X","affiliations":[{"raw_affiliation_string":"Department of Electrical, Electronic and Information Engineering (DEI), University of Bologna, Bologna, Italy","institution_ids":["https://openalex.org/I9360294"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5019091178","display_name":"Alfio Di Mauro","orcid":"https://orcid.org/0000-0001-6688-1603"},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Alfio Di Mauro","raw_affiliation_strings":["IIS Integrated Systems Laboratory, ETH Z&#x00FC;ric, Z&#x00FC;ric, Switzerland"],"raw_orcid":"https://orcid.org/0000-0001-6688-1603","affiliations":[{"raw_affiliation_string":"IIS Integrated Systems Laboratory, ETH Z&#x00FC;ric, Z&#x00FC;ric, Switzerland","institution_ids":[]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5043408422","display_name":"Luca Benini","orcid":"https://orcid.org/0000-0001-8068-3806"},"institutions":[{"id":"https://openalex.org/I9360294","display_name":"University of Bologna","ror":"https://ror.org/01111rn36","country_code":"IT","type":"education","lineage":["https://openalex.org/I9360294"]}],"countries":["IT"],"is_corresponding":false,"raw_author_name":"Luca Benini","raw_affiliation_strings":["Department of Electrical, Electronic and Information Engineering (DEI), University of Bologna, Bologna, Italy"],"raw_orcid":"https://orcid.org/0000-0001-8068-3806","affiliations":[{"raw_affiliation_string":"Department of Electrical, Electronic and Information Engineering (DEI), University of Bologna, Bologna, Italy","institution_ids":["https://openalex.org/I9360294"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5023905268","display_name":"Davide Rossi","orcid":"https://orcid.org/0000-0002-0651-5393"},"institutions":[{"id":"https://openalex.org/I9360294","display_name":"University of Bologna","ror":"https://ror.org/01111rn36","country_code":"IT","type":"education","lineage":["https://openalex.org/I9360294"]}],"countries":["IT"],"is_corresponding":false,"raw_author_name":"Davide Rossi","raw_affiliation_strings":["Department of Electrical, Electronic and Information Engineering (DEI), University of Bologna, Bologna, Italy"],"raw_orcid":"https://orcid.org/0000-0002-0651-5393","affiliations":[{"raw_affiliation_string":"Department of Electrical, Electronic and Information Engineering (DEI), University of Bologna, Bologna, Italy","institution_ids":["https://openalex.org/I9360294"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":6.6266,"has_fulltext":false,"cited_by_count":27,"citation_normalized_percentile":{"value":0.97574386,"is_in_top_1_percent":false,"is_in_top_10_percent":true},"cited_by_percentile_year":{"min":94,"max":99},"biblio":{"volume":"70","issue":"6","first_page":"2450","last_page":"2463"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9995999932289124,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9995999932289124,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":0.9969000220298767,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11181","display_name":"Advanced Data Storage Technologies","score":0.9968000054359436,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.614967942237854},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.6034864187240601},{"id":"https://openalex.org/keywords/power","display_name":"Power (physics)","score":0.5733683705329895},{"id":"https://openalex.org/keywords/mode","display_name":"Mode (computer interface)","score":0.4437974691390991},{"id":"https://openalex.org/keywords/multi-core-processor","display_name":"Multi-core processor","score":0.43901512026786804},{"id":"https://openalex.org/keywords/cluster","display_name":"Cluster (spacecraft)","score":0.435963898897171},{"id":"https://openalex.org/keywords/bit","display_name":"Bit (key)","score":0.43095147609710693},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.430893212556839},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.3876292109489441},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.3843018114566803},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.22876301407814026},{"id":"https://openalex.org/keywords/physics","display_name":"Physics","score":0.187941312789917},{"id":"https://openalex.org/keywords/computer-network","display_name":"Computer network","score":0.1309036910533905},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.11486777663230896}],"concepts":[{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.614967942237854},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.6034864187240601},{"id":"https://openalex.org/C163258240","wikidata":"https://www.wikidata.org/wiki/Q25342","display_name":"Power (physics)","level":2,"score":0.5733683705329895},{"id":"https://openalex.org/C48677424","wikidata":"https://www.wikidata.org/wiki/Q6888088","display_name":"Mode (computer interface)","level":2,"score":0.4437974691390991},{"id":"https://openalex.org/C78766204","wikidata":"https://www.wikidata.org/wiki/Q555032","display_name":"Multi-core processor","level":2,"score":0.43901512026786804},{"id":"https://openalex.org/C164866538","wikidata":"https://www.wikidata.org/wiki/Q367351","display_name":"Cluster (spacecraft)","level":2,"score":0.435963898897171},{"id":"https://openalex.org/C117011727","wikidata":"https://www.wikidata.org/wiki/Q1278488","display_name":"Bit (key)","level":2,"score":0.43095147609710693},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.430893212556839},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.3876292109489441},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.3843018114566803},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.22876301407814026},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.187941312789917},{"id":"https://openalex.org/C31258907","wikidata":"https://www.wikidata.org/wiki/Q1301371","display_name":"Computer network","level":1,"score":0.1309036910533905},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.11486777663230896},{"id":"https://openalex.org/C62520636","wikidata":"https://www.wikidata.org/wiki/Q944","display_name":"Quantum mechanics","level":1,"score":0.0}],"mesh":[],"locations_count":2,"locations":[{"id":"doi:10.1109/tcsi.2023.3254810","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tcsi.2023.3254810","pdf_url":null,"source":{"id":"https://openalex.org/S116977442","display_name":"IEEE Transactions on Circuits and Systems I Regular Papers","issn_l":"1549-8328","issn":["1549-8328","1558-0806"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Circuits and Systems I: Regular Papers","raw_type":"journal-article"},{"id":"pmh:oai:cris.unibo.it:11585/922406","is_oa":true,"landing_page_url":"https://ieeexplore.ieee.org/document/10071725","pdf_url":null,"source":{"id":"https://openalex.org/S4306402579","display_name":"Archivio istituzionale della ricerca (Alma Mater Studiorum Universit\u00e0 di Bologna)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/I4210117483","host_organization_name":"Istituto di Ematologia di Bologna","host_organization_lineage":["https://openalex.org/I4210117483"],"host_organization_lineage_names":[],"type":"repository"},"license":"other-oa","license_id":"https://openalex.org/licenses/other-oa","version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"","raw_type":"info:eu-repo/semantics/article"}],"best_oa_location":{"id":"pmh:oai:cris.unibo.it:11585/922406","is_oa":true,"landing_page_url":"https://ieeexplore.ieee.org/document/10071725","pdf_url":null,"source":{"id":"https://openalex.org/S4306402579","display_name":"Archivio istituzionale della ricerca (Alma Mater Studiorum Universit\u00e0 di Bologna)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/I4210117483","host_organization_name":"Istituto di Ematologia di Bologna","host_organization_lineage":["https://openalex.org/I4210117483"],"host_organization_lineage_names":[],"type":"repository"},"license":"other-oa","license_id":"https://openalex.org/licenses/other-oa","version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"","raw_type":"info:eu-repo/semantics/article"},"sustainable_development_goals":[{"score":0.8999999761581421,"id":"https://metadata.un.org/sdg/7","display_name":"Affordable and clean energy"}],"awards":[{"id":"https://openalex.org/G2690228861","display_name":"Pilot using Independent Local & Open Technologies","funder_award_id":"101034126","funder_id":"https://openalex.org/F4320320300","funder_display_name":"European Commission"}],"funders":[{"id":"https://openalex.org/F4320320300","display_name":"European Commission","ror":"https://ror.org/00k4n6c32"}],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":40,"referenced_works":["https://openalex.org/W1998597557","https://openalex.org/W2593564159","https://openalex.org/W2744228767","https://openalex.org/W2784372305","https://openalex.org/W2794141774","https://openalex.org/W2901554773","https://openalex.org/W2903260438","https://openalex.org/W2945146780","https://openalex.org/W2946485102","https://openalex.org/W2952857977","https://openalex.org/W2963163009","https://openalex.org/W2970796375","https://openalex.org/W2982041622","https://openalex.org/W2982479999","https://openalex.org/W3013186616","https://openalex.org/W3015729306","https://openalex.org/W3024366773","https://openalex.org/W3032746325","https://openalex.org/W3034887213","https://openalex.org/W3092181942","https://openalex.org/W3102860086","https://openalex.org/W3133079566","https://openalex.org/W3144068561","https://openalex.org/W3156145546","https://openalex.org/W3171689473","https://openalex.org/W3184107541","https://openalex.org/W3203242999","https://openalex.org/W4232890075","https://openalex.org/W4288026258","https://openalex.org/W4289752678","https://openalex.org/W4297775537","https://openalex.org/W6734592959","https://openalex.org/W6737664043","https://openalex.org/W6747876305","https://openalex.org/W6753947690","https://openalex.org/W6756468666","https://openalex.org/W6756979132","https://openalex.org/W6770425567","https://openalex.org/W6786271619","https://openalex.org/W6797184042"],"related_works":["https://openalex.org/W2411923897","https://openalex.org/W4394546135","https://openalex.org/W4285347720","https://openalex.org/W4200259850","https://openalex.org/W2333831899","https://openalex.org/W2484894494","https://openalex.org/W2367385042","https://openalex.org/W4381186982","https://openalex.org/W2040781570","https://openalex.org/W4226055750"],"abstract_inverted_index":{"Computationally":[0],"intensive":[1],"algorithms":[2,19],"such":[3],"as":[4],"Deep":[5],"Neural":[6],"Networks":[7],"(DNNs)":[8],"are":[9],"becoming":[10],"killer":[11],"applications":[12],"for":[13,57],"edge":[14],"devices.":[15],"Porting":[16],"heavily":[17],"data-parallel":[18,108],"on":[20],"resource-constrained":[21],"and":[22,43,47,79,118,132,159],"battery-powered":[23],"devices":[24],"while":[25],"retaining":[26],"the":[27,122,136],"flexibility":[28],"granted":[29],"by":[30],"instruction":[31],"processor-based":[32],"architectures":[33],"poses":[34],"several":[35],"challenges":[36],"related":[37],"to":[38,53,76,86,102,121,140],"memory":[39],"footprint,":[40],"computational":[41],"throughput,":[42],"energy":[44],"efficiency.":[45],"Low-bitwidth":[46],"mixed-precision":[48,82],"arithmetic":[49,78],"have":[50],"been":[51],"proven":[52],"be":[54],"valid":[55],"strategies":[56],"tackling":[58],"these":[59],"problems.":[60],"We":[61],"present":[62],"Dustin,":[63],"a":[64,87,96,112,153,160],"fully":[65],"programmable":[66],"compute":[67],"cluster":[68],"integrating":[69],"16":[70],"RISC-V":[71],"cores":[72,138],"capable":[73],"of":[74,135,156,163],"2-":[75],"32-bit":[77],"all":[80],"possible":[81],"combinations.":[83],"In":[84,110],"addition":[85],"conventional":[88],"Multiple-Instruction":[89],"Multiple-Data":[90],"(MIMD)":[91],"processing":[92],"paradigm,":[93],"Dustin":[94],"introduces":[95],"Vector":[97],"Lockstep":[98],"Execution":[99],"Mode":[100],"(VLEM)":[101],"minimize":[103],"power":[104,142],"consumption":[105],"in":[106,147],"highly":[107],"kernels.":[109],"VLEM,":[111],"single":[113],"leader":[114],"core":[115],"fetches":[116],"instructions":[117],"broadcasts":[119],"them":[120],"15":[123],"follower":[124,137],"cores.":[125],"Clock":[126],"gating":[127],"Instruction":[128],"Fetch":[129],"(IF)":[130],"stages":[131],"private":[133],"caches":[134],"leads":[139],"38%":[141],"reduction.":[143],"The":[144],"cluster,":[145],"implemented":[146],"65":[148],"nm":[149],"CMOS":[150],"technology,":[151],"achieves":[152],"peak":[154,161],"performance":[155],"58":[157],"GOPS":[158],"efficiency":[162],"1.15":[164],"TOPS/W.":[165]},"counts_by_year":[{"year":2026,"cited_by_count":4},{"year":2025,"cited_by_count":9},{"year":2024,"cited_by_count":8},{"year":2023,"cited_by_count":4},{"year":2022,"cited_by_count":2}],"updated_date":"2026-03-27T05:58:40.876381","created_date":"2025-10-10T00:00:00"}
