{"id":"https://openalex.org/W4285269240","doi":"https://doi.org/10.1109/tcsi.2022.3183858","title":"Variability-Aware Approximate Circuit Synthesis via Genetic Optimization","display_name":"Variability-Aware Approximate Circuit Synthesis via Genetic Optimization","publication_year":2022,"publication_date":"2022-06-23","ids":{"openalex":"https://openalex.org/W4285269240","doi":"https://doi.org/10.1109/tcsi.2022.3183858"},"language":"en","primary_location":{"id":"doi:10.1109/tcsi.2022.3183858","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tcsi.2022.3183858","pdf_url":null,"source":{"id":"https://openalex.org/S116977442","display_name":"IEEE Transactions on Circuits and Systems I Regular Papers","issn_l":"1549-8328","issn":["1549-8328","1558-0806"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Circuits and Systems I: Regular Papers","raw_type":"journal-article"},"type":"article","indexed_in":["arxiv","crossref"],"open_access":{"is_oa":true,"oa_status":"green","oa_url":"https://arxiv.org/pdf/2404.04258","any_repository_has_fulltext":true},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5006315507","display_name":"Konstantinos Balaskas","orcid":"https://orcid.org/0000-0003-2886-6896"},"institutions":[{"id":"https://openalex.org/I102335020","display_name":"Karlsruhe Institute of Technology","ror":"https://ror.org/04t3en479","country_code":"DE","type":"education","lineage":["https://openalex.org/I102335020","https://openalex.org/I1305996414"]},{"id":"https://openalex.org/I21370196","display_name":"Aristotle University of Thessaloniki","ror":"https://ror.org/02j61yw88","country_code":"GR","type":"education","lineage":["https://openalex.org/I21370196"]}],"countries":["DE","GR"],"is_corresponding":false,"raw_author_name":"Konstantinos Balaskas","raw_affiliation_strings":["Department of Physics, Aristotle University of Thessaloniki, Thessaloniki, Greece","Chair for Embedded Systems, Karlsruhe Institute of Technology, Karlsruhe, Germany"],"raw_orcid":"https://orcid.org/0000-0003-2886-6896","affiliations":[{"raw_affiliation_string":"Department of Physics, Aristotle University of Thessaloniki, Thessaloniki, Greece","institution_ids":["https://openalex.org/I21370196"]},{"raw_affiliation_string":"Chair for Embedded Systems, Karlsruhe Institute of Technology, Karlsruhe, Germany","institution_ids":["https://openalex.org/I102335020"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5083905801","display_name":"Florian Klemme","orcid":"https://orcid.org/0000-0002-0148-0523"},"institutions":[{"id":"https://openalex.org/I100066346","display_name":"University of Stuttgart","ror":"https://ror.org/04vnq7t77","country_code":"DE","type":"education","lineage":["https://openalex.org/I100066346"]}],"countries":["DE"],"is_corresponding":false,"raw_author_name":"Florian Klemme","raw_affiliation_strings":["Chair for Semiconductor Test and Reliability (STAR), University of Stuttgart, Stuttgart, Germany"],"raw_orcid":"https://orcid.org/0000-0002-0148-0523","affiliations":[{"raw_affiliation_string":"Chair for Semiconductor Test and Reliability (STAR), University of Stuttgart, Stuttgart, Germany","institution_ids":["https://openalex.org/I100066346"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5051495057","display_name":"Georgios Zervakis","orcid":"https://orcid.org/0000-0001-8110-7122"},"institutions":[{"id":"https://openalex.org/I102335020","display_name":"Karlsruhe Institute of Technology","ror":"https://ror.org/04t3en479","country_code":"DE","type":"education","lineage":["https://openalex.org/I102335020","https://openalex.org/I1305996414"]}],"countries":["DE"],"is_corresponding":false,"raw_author_name":"Georgios Zervakis","raw_affiliation_strings":["Chair for Embedded Systems, Karlsruhe Institute of Technology, Karlsruhe, Germany"],"raw_orcid":"https://orcid.org/0000-0001-8110-7122","affiliations":[{"raw_affiliation_string":"Chair for Embedded Systems, Karlsruhe Institute of Technology, Karlsruhe, Germany","institution_ids":["https://openalex.org/I102335020"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5072486756","display_name":"Kostas Siozios","orcid":"https://orcid.org/0000-0002-0285-2202"},"institutions":[{"id":"https://openalex.org/I21370196","display_name":"Aristotle University of Thessaloniki","ror":"https://ror.org/02j61yw88","country_code":"GR","type":"education","lineage":["https://openalex.org/I21370196"]}],"countries":["GR"],"is_corresponding":false,"raw_author_name":"Kostas Siozios","raw_affiliation_strings":["Department of Physics, Aristotle University of Thessaloniki, Thessaloniki, Greece"],"raw_orcid":"https://orcid.org/0000-0002-0285-2202","affiliations":[{"raw_affiliation_string":"Department of Physics, Aristotle University of Thessaloniki, Thessaloniki, Greece","institution_ids":["https://openalex.org/I21370196"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5059133190","display_name":"Hussam Amrouch","orcid":"https://orcid.org/0000-0002-5649-3102"},"institutions":[{"id":"https://openalex.org/I100066346","display_name":"University of Stuttgart","ror":"https://ror.org/04vnq7t77","country_code":"DE","type":"education","lineage":["https://openalex.org/I100066346"]}],"countries":["DE"],"is_corresponding":false,"raw_author_name":"Hussam Amrouch","raw_affiliation_strings":["Chair for Semiconductor Test and Reliability (STAR), University of Stuttgart, Stuttgart, Germany"],"raw_orcid":"https://orcid.org/0000-0002-5649-3102","affiliations":[{"raw_affiliation_string":"Chair for Semiconductor Test and Reliability (STAR), University of Stuttgart, Stuttgart, Germany","institution_ids":["https://openalex.org/I100066346"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5063508488","display_name":"J\u00f6rg Henkel","orcid":"https://orcid.org/0000-0001-9602-2922"},"institutions":[{"id":"https://openalex.org/I102335020","display_name":"Karlsruhe Institute of Technology","ror":"https://ror.org/04t3en479","country_code":"DE","type":"education","lineage":["https://openalex.org/I102335020","https://openalex.org/I1305996414"]}],"countries":["DE"],"is_corresponding":false,"raw_author_name":"Jorg Henkel","raw_affiliation_strings":["Chair for Embedded Systems, Karlsruhe Institute of Technology, Karlsruhe, Germany"],"raw_orcid":"https://orcid.org/0000-0001-9602-2922","affiliations":[{"raw_affiliation_string":"Chair for Embedded Systems, Karlsruhe Institute of Technology, Karlsruhe, Germany","institution_ids":["https://openalex.org/I102335020"]}]}],"institutions":[],"countries_distinct_count":2,"institutions_distinct_count":3,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":0.3725,"has_fulltext":true,"cited_by_count":6,"citation_normalized_percentile":{"value":0.51845372,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":90,"max":97},"biblio":{"volume":"69","issue":"10","first_page":"4141","last_page":"4153"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10558","display_name":"Advancements in Semiconductor Devices and Circuit Design","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/electronic-circuit","display_name":"Electronic circuit","score":0.6568300127983093},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.5539118051528931},{"id":"https://openalex.org/keywords/process-variation","display_name":"Process variation","score":0.5530239343643188},{"id":"https://openalex.org/keywords/process","display_name":"Process (computing)","score":0.5038816332817078},{"id":"https://openalex.org/keywords/transistor","display_name":"Transistor","score":0.4932534098625183},{"id":"https://openalex.org/keywords/circuit-design","display_name":"Circuit design","score":0.45876187086105347},{"id":"https://openalex.org/keywords/variation","display_name":"Variation (astronomy)","score":0.44593432545661926},{"id":"https://openalex.org/keywords/static-timing-analysis","display_name":"Static timing analysis","score":0.4285038411617279},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.4055931270122528},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.37191176414489746},{"id":"https://openalex.org/keywords/computer-engineering","display_name":"Computer engineering","score":0.3511126637458801},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.17560860514640808},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.15065523982048035},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.1358921229839325}],"concepts":[{"id":"https://openalex.org/C134146338","wikidata":"https://www.wikidata.org/wiki/Q1815901","display_name":"Electronic circuit","level":2,"score":0.6568300127983093},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.5539118051528931},{"id":"https://openalex.org/C93389723","wikidata":"https://www.wikidata.org/wiki/Q7247313","display_name":"Process variation","level":3,"score":0.5530239343643188},{"id":"https://openalex.org/C98045186","wikidata":"https://www.wikidata.org/wiki/Q205663","display_name":"Process (computing)","level":2,"score":0.5038816332817078},{"id":"https://openalex.org/C172385210","wikidata":"https://www.wikidata.org/wiki/Q5339","display_name":"Transistor","level":3,"score":0.4932534098625183},{"id":"https://openalex.org/C190560348","wikidata":"https://www.wikidata.org/wiki/Q3245116","display_name":"Circuit design","level":2,"score":0.45876187086105347},{"id":"https://openalex.org/C2778334786","wikidata":"https://www.wikidata.org/wiki/Q1586270","display_name":"Variation (astronomy)","level":2,"score":0.44593432545661926},{"id":"https://openalex.org/C93682380","wikidata":"https://www.wikidata.org/wiki/Q2025226","display_name":"Static timing analysis","level":2,"score":0.4285038411617279},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.4055931270122528},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.37191176414489746},{"id":"https://openalex.org/C113775141","wikidata":"https://www.wikidata.org/wiki/Q428691","display_name":"Computer engineering","level":1,"score":0.3511126637458801},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.17560860514640808},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.15065523982048035},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.1358921229839325},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.0},{"id":"https://openalex.org/C44870925","wikidata":"https://www.wikidata.org/wiki/Q37547","display_name":"Astrophysics","level":1,"score":0.0},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.0},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.0}],"mesh":[],"locations_count":2,"locations":[{"id":"doi:10.1109/tcsi.2022.3183858","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tcsi.2022.3183858","pdf_url":null,"source":{"id":"https://openalex.org/S116977442","display_name":"IEEE Transactions on Circuits and Systems I Regular Papers","issn_l":"1549-8328","issn":["1549-8328","1558-0806"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Circuits and Systems I: Regular Papers","raw_type":"journal-article"},{"id":"pmh:oai:arXiv.org:2404.04258","is_oa":true,"landing_page_url":"http://arxiv.org/abs/2404.04258","pdf_url":"https://arxiv.org/pdf/2404.04258","source":{"id":"https://openalex.org/S4306400194","display_name":"arXiv (Cornell University)","issn_l":"2331-8422","issn":["2331-8422"],"is_oa":true,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/I205783295","host_organization_name":"Cornell University","host_organization_lineage":["https://openalex.org/I205783295"],"host_organization_lineage_names":[],"type":"repository"},"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":null,"raw_type":"text"}],"best_oa_location":{"id":"pmh:oai:arXiv.org:2404.04258","is_oa":true,"landing_page_url":"http://arxiv.org/abs/2404.04258","pdf_url":"https://arxiv.org/pdf/2404.04258","source":{"id":"https://openalex.org/S4306400194","display_name":"arXiv (Cornell University)","issn_l":"2331-8422","issn":["2331-8422"],"is_oa":true,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/I205783295","host_organization_name":"Cornell University","host_organization_lineage":["https://openalex.org/I205783295"],"host_organization_lineage_names":[],"type":"repository"},"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":null,"raw_type":"text"},"sustainable_development_goals":[],"awards":[{"id":"https://openalex.org/G2914956538","display_name":"ACCROSS: Approximatives Rechnen \u00fcber die Systemebenen hinweg","funder_award_id":"428566201","funder_id":"https://openalex.org/F4320320879","funder_display_name":"Deutsche Forschungsgemeinschaft"},{"id":"https://openalex.org/G3218001249","display_name":null,"funder_award_id":"HE 2343/16-1","funder_id":"https://openalex.org/F4320320879","funder_display_name":"Deutsche Forschungsgemeinschaft"},{"id":"https://openalex.org/G3359798428","display_name":null,"funder_award_id":"AM 534/3-1","funder_id":"https://openalex.org/F4320320879","funder_display_name":"Deutsche Forschungsgemeinschaft"},{"id":"https://openalex.org/G5884125275","display_name":null,"funder_award_id":"2343/16-1","funder_id":"https://openalex.org/F4320320879","funder_display_name":"Deutsche Forschungsgemeinschaft"}],"funders":[{"id":"https://openalex.org/F4320320879","display_name":"Deutsche Forschungsgemeinschaft","ror":"https://ror.org/018mejw64"},{"id":"https://openalex.org/F4320325850","display_name":"Universit\u00e4t Stuttgart","ror":"https://ror.org/04vnq7t77"},{"id":"https://openalex.org/F4320332999","display_name":"Horizon 2020 Framework Programme","ror":"https://ror.org/00k4n6c32"}],"has_content":{"grobid_xml":true,"pdf":true},"content_urls":{"pdf":"https://content.openalex.org/works/W4285269240.pdf","grobid_xml":"https://content.openalex.org/works/W4285269240.grobid-xml"},"referenced_works_count":33,"referenced_works":["https://openalex.org/W1524330256","https://openalex.org/W2015917466","https://openalex.org/W2042526156","https://openalex.org/W2054095206","https://openalex.org/W2062618480","https://openalex.org/W2124651102","https://openalex.org/W2126105956","https://openalex.org/W2157067268","https://openalex.org/W2294851045","https://openalex.org/W2444511150","https://openalex.org/W2587701905","https://openalex.org/W2601128462","https://openalex.org/W2625439172","https://openalex.org/W2729749234","https://openalex.org/W2794328362","https://openalex.org/W2902661604","https://openalex.org/W2908807758","https://openalex.org/W2911263012","https://openalex.org/W2913980322","https://openalex.org/W2919701803","https://openalex.org/W2921026389","https://openalex.org/W2921402340","https://openalex.org/W3008930998","https://openalex.org/W3011748007","https://openalex.org/W3016582401","https://openalex.org/W3024722044","https://openalex.org/W3083515282","https://openalex.org/W3120740533","https://openalex.org/W3133966460","https://openalex.org/W3191103257","https://openalex.org/W3198613190","https://openalex.org/W4231563577","https://openalex.org/W6705018445"],"related_works":["https://openalex.org/W3092420867","https://openalex.org/W2115729972","https://openalex.org/W2042032654","https://openalex.org/W2158291854","https://openalex.org/W2123535323","https://openalex.org/W2165340891","https://openalex.org/W2134944363","https://openalex.org/W4231005419","https://openalex.org/W1804063983","https://openalex.org/W1925000611"],"abstract_inverted_index":{"One":[0],"of":[1,27,98,127,143,151,172],"the":[2,24,30,34,45,63,96,140,158,190],"major":[3],"barriers":[4],"that":[5,85,166],"CMOS":[6],"devices":[7],"face":[8],"at":[9,33],"nanometer":[10],"scale":[11],"is":[12,38],"increasing":[13],"parameter":[14],"variation":[15],"due":[16],"to":[17,40,147],"manufacturing":[18],"imperfections.":[19],"Process":[20],"variations":[21,187],"severely":[22],"inhibit":[23],"reliable":[25],"operation":[26],"circuits,":[28],"as":[29],"operational":[31],"frequency":[32],"nominal":[35],"process":[36,186],"corner":[37],"insufficient":[39],"suppress":[41],"timing":[42,52,60,88,161],"violations":[43],"across":[44],"entire":[46],"variability":[47,130,153],"spectrum.":[48],"To":[49],"avoid":[50],"variability-induced":[51],"errors,":[53],"previous":[54],"efforts":[55],"impose":[56],"pessimistic":[57],"and":[58,74,129,154],"performance-degrading":[59],"guardbands":[61],"atop":[62],"operating":[64],"frequency.":[65],"In":[66,135],"this":[67,136],"work,":[68,137],"we":[69,138],"employ":[70],"approximate":[71,83,144,179],"computing":[72],"principles":[73],"propose":[75],"a":[76],"circuit-agnostic":[77],"automated":[78],"framework":[79],"for":[80,160],"generating":[81],"variability-aware":[82,145,178],"circuits":[84,150,180],"eliminate":[86],"process-induced":[87],"guardbands.":[89,162],"Variability":[90],"effects":[91,131],"are":[92,112,132],"accurately":[93,133],"portrayed":[94],"with":[95,105],"creation":[97],"variation-aware":[99],"standard":[100,106],"cell":[101],"libraries,":[102],"fully":[103,113],"compatible":[104],"EDA":[107],"tools.":[108],"The":[109],"underlying":[110],"transistors":[111,128],"calibrated":[114],"against":[115],"industrial":[116],"measurements":[117],"from":[118],"Intel":[119],"14nm":[120],"FinFET":[121],"in":[122],"which":[123],"both":[124],"electrical":[125],"characteristics":[126],"captured.":[134],"explore":[139],"design":[141],"space":[142],"designs":[146],"automatically":[148],"generate":[149],"reduced":[152],"increased":[155],"performance":[156],"without":[157,188],"need":[159],"Experimental":[163],"results":[164],"show":[165],"by":[167],"introducing":[168],"negligible":[169],"functional":[170],"error":[171],"merely$\\boldsymbol":[173],"{5.3":[174],"\\times":[175],"10^{-3}}$,":[176],"our":[177],"can":[181],"be":[182],"reliably":[183],"operated":[184],"under":[185],"sacrificing":[189],"application":[191],"performance.":[192]},"counts_by_year":[{"year":2026,"cited_by_count":1},{"year":2025,"cited_by_count":3},{"year":2024,"cited_by_count":1},{"year":2023,"cited_by_count":1}],"updated_date":"2026-07-29T09:40:50.615796","created_date":"2025-10-10T00:00:00"}