{"id":"https://openalex.org/W3200423490","doi":"https://doi.org/10.1109/tcsi.2021.3108128","title":"A 1.6-V Tolerant Multiplexer Switch With 0.96-V Core Devices in 28-nm CMOS Technology","display_name":"A 1.6-V Tolerant Multiplexer Switch With 0.96-V Core Devices in 28-nm CMOS Technology","publication_year":2021,"publication_date":"2021-09-10","ids":{"openalex":"https://openalex.org/W3200423490","doi":"https://doi.org/10.1109/tcsi.2021.3108128","mag":"3200423490"},"language":"en","primary_location":{"id":"doi:10.1109/tcsi.2021.3108128","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tcsi.2021.3108128","pdf_url":null,"source":{"id":"https://openalex.org/S116977442","display_name":"IEEE Transactions on Circuits and Systems I Regular Papers","issn_l":"1549-8328","issn":["1549-8328","1558-0806"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Circuits and Systems I: Regular Papers","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5061253537","display_name":"Giuseppe E. Biccario","orcid":"https://orcid.org/0000-0002-1390-6771"},"institutions":[{"id":"https://openalex.org/I142910587","display_name":"University of Salento","ror":"https://ror.org/03fc1k060","country_code":"IT","type":"education","lineage":["https://openalex.org/I142910587"]},{"id":"https://openalex.org/I4210096856","display_name":"Innovation Engineering (Italy)","ror":"https://ror.org/00sxjp357","country_code":"IT","type":"company","lineage":["https://openalex.org/I4210096856"]}],"countries":["IT"],"is_corresponding":false,"raw_author_name":"Giuseppe E. Biccario","raw_affiliation_strings":["Cortus Srl, Lecce, Italy","Department of Innovation Engineering, University of Salento, Lecce, Italy"],"raw_orcid":"https://orcid.org/0000-0002-1390-6771","affiliations":[{"raw_affiliation_string":"Cortus Srl, Lecce, Italy","institution_ids":[]},{"raw_affiliation_string":"Department of Innovation Engineering, University of Salento, Lecce, Italy","institution_ids":["https://openalex.org/I142910587","https://openalex.org/I4210096856"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5006843910","display_name":"Oleg Vitrenko","orcid":null},"institutions":[{"id":"https://openalex.org/I4210131793","display_name":"Infineon Technologies (Austria)","ror":"https://ror.org/03msng824","country_code":"AT","type":"company","lineage":["https://openalex.org/I137594350","https://openalex.org/I4210131793"]}],"countries":["AT"],"is_corresponding":false,"raw_author_name":"Oleg Vitrenko","raw_affiliation_strings":["Infineon Technologies AG, Villach, Austria"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Infineon Technologies AG, Villach, Austria","institution_ids":["https://openalex.org/I4210131793"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5011833987","display_name":"Roberto Nonis","orcid":null},"institutions":[{"id":"https://openalex.org/I4210131793","display_name":"Infineon Technologies (Austria)","ror":"https://ror.org/03msng824","country_code":"AT","type":"company","lineage":["https://openalex.org/I137594350","https://openalex.org/I4210131793"]}],"countries":["AT"],"is_corresponding":false,"raw_author_name":"Roberto Nonis","raw_affiliation_strings":["Infineon Technologies AG, Villach, Austria"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Infineon Technologies AG, Villach, Austria","institution_ids":["https://openalex.org/I4210131793"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5040110283","display_name":"S. D\u2019Amico","orcid":"https://orcid.org/0000-0003-2886-2166"},"institutions":[{"id":"https://openalex.org/I142910587","display_name":"University of Salento","ror":"https://ror.org/03fc1k060","country_code":"IT","type":"education","lineage":["https://openalex.org/I142910587"]},{"id":"https://openalex.org/I4210096856","display_name":"Innovation Engineering (Italy)","ror":"https://ror.org/00sxjp357","country_code":"IT","type":"company","lineage":["https://openalex.org/I4210096856"]}],"countries":["IT"],"is_corresponding":false,"raw_author_name":"Stefano D'Amico","raw_affiliation_strings":["Department of Innovation Engineering, University of Salento, Lecce, Italy"],"raw_orcid":"https://orcid.org/0000-0003-2886-2166","affiliations":[{"raw_affiliation_string":"Department of Innovation Engineering, University of Salento, Lecce, Italy","institution_ids":["https://openalex.org/I142910587","https://openalex.org/I4210096856"]}]}],"institutions":[],"countries_distinct_count":2,"institutions_distinct_count":3,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":0.2412,"has_fulltext":false,"cited_by_count":3,"citation_normalized_percentile":{"value":0.49426457,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":90,"max":96},"biblio":{"volume":"68","issue":"11","first_page":"4626","last_page":"4635"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10558","display_name":"Advancements in Semiconductor Devices and Circuit Design","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10558","display_name":"Advancements in Semiconductor Devices and Circuit Design","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9994999766349792,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.7781016826629639},{"id":"https://openalex.org/keywords/multiplexer","display_name":"Multiplexer","score":0.7410513162612915},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.572115421295166},{"id":"https://openalex.org/keywords/transistor","display_name":"Transistor","score":0.5251388549804688},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.5126308798789978},{"id":"https://openalex.org/keywords/channel","display_name":"Channel (broadcasting)","score":0.5076791048049927},{"id":"https://openalex.org/keywords/biasing","display_name":"Biasing","score":0.5068398118019104},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.46865931153297424},{"id":"https://openalex.org/keywords/voltage-reduction","display_name":"Voltage reduction","score":0.44139647483825684},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.44105952978134155},{"id":"https://openalex.org/keywords/chip","display_name":"Chip","score":0.4276016652584076},{"id":"https://openalex.org/keywords/topology","display_name":"Topology (electrical circuits)","score":0.3687843680381775},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.26895982027053833},{"id":"https://openalex.org/keywords/multiplexing","display_name":"Multiplexing","score":0.21098294854164124}],"concepts":[{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.7781016826629639},{"id":"https://openalex.org/C70970002","wikidata":"https://www.wikidata.org/wiki/Q189434","display_name":"Multiplexer","level":3,"score":0.7410513162612915},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.572115421295166},{"id":"https://openalex.org/C172385210","wikidata":"https://www.wikidata.org/wiki/Q5339","display_name":"Transistor","level":3,"score":0.5251388549804688},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.5126308798789978},{"id":"https://openalex.org/C127162648","wikidata":"https://www.wikidata.org/wiki/Q16858953","display_name":"Channel (broadcasting)","level":2,"score":0.5076791048049927},{"id":"https://openalex.org/C20254490","wikidata":"https://www.wikidata.org/wiki/Q719550","display_name":"Biasing","level":3,"score":0.5068398118019104},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.46865931153297424},{"id":"https://openalex.org/C2780745134","wikidata":"https://www.wikidata.org/wiki/Q7940751","display_name":"Voltage reduction","level":3,"score":0.44139647483825684},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.44105952978134155},{"id":"https://openalex.org/C165005293","wikidata":"https://www.wikidata.org/wiki/Q1074500","display_name":"Chip","level":2,"score":0.4276016652584076},{"id":"https://openalex.org/C184720557","wikidata":"https://www.wikidata.org/wiki/Q7825049","display_name":"Topology (electrical circuits)","level":2,"score":0.3687843680381775},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.26895982027053833},{"id":"https://openalex.org/C19275194","wikidata":"https://www.wikidata.org/wiki/Q222903","display_name":"Multiplexing","level":2,"score":0.21098294854164124}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/tcsi.2021.3108128","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tcsi.2021.3108128","pdf_url":null,"source":{"id":"https://openalex.org/S116977442","display_name":"IEEE Transactions on Circuits and Systems I Regular Papers","issn_l":"1549-8328","issn":["1549-8328","1558-0806"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Circuits and Systems I: Regular Papers","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[{"id":"https://metadata.un.org/sdg/7","display_name":"Affordable and clean energy","score":0.8399999737739563}],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":13,"referenced_works":["https://openalex.org/W1499680145","https://openalex.org/W1594272875","https://openalex.org/W2011243677","https://openalex.org/W2128893392","https://openalex.org/W2140169443","https://openalex.org/W2141499389","https://openalex.org/W2182422795","https://openalex.org/W2221753976","https://openalex.org/W2499485334","https://openalex.org/W2548849571","https://openalex.org/W2573565561","https://openalex.org/W2726056776","https://openalex.org/W4242465846"],"related_works":["https://openalex.org/W4323268213","https://openalex.org/W2101047079","https://openalex.org/W4242128654","https://openalex.org/W3197720232","https://openalex.org/W2152549830","https://openalex.org/W1993744883","https://openalex.org/W2082549546","https://openalex.org/W2388387398","https://openalex.org/W3203996584","https://openalex.org/W4389383638"],"abstract_inverted_index":{"The":[0,172],"reduction":[1],"of":[2,7,16,21,91,96,98,125,143,162],"the":[3,14,17,22,48,72,89,94,103,106,113,123,139,144,158,163],"nominal":[4,49,140,169],"supply":[5,50,141,170],"voltage":[6,20,44,63,76,85,142],"CMOS":[8,165],"technologies":[9],"with":[10,13,34,40,157,167,174],"scaling":[11],"comes":[12],"decrease":[15],"maximum":[18],"tolerable":[19],"devices.":[23,146],"This":[24,120],"poses":[25],"challenges":[26],"in":[27,43],"implementing":[28,153],"circuit":[29],"blocks":[30],"that":[31,184],"are":[32,68,199],"compliant":[33],"standardized":[35],"communication":[36],"protocols":[37],"or":[38],"deal":[39],"off-chip":[41],"signals":[42,135],"domains":[45],"larger":[46,187],"than":[47,191],"(e.g.,":[51],"1.8":[52],"V,":[53,55],"3.3":[54],"5":[56],"V).":[57],"Design":[58],"techniques":[59],"such":[60],"as":[61,102],"cascoding,":[62],"shifting":[64],"and":[65,105,193],"adaptive":[66],"biasing":[67,118],"effective":[69],"at":[70,88],"removing":[71],"need":[73],"for":[74,128],"customized":[75],"resistant":[77],"input/output":[78],"(I/O)":[79],"devices":[80,182],"since":[81],"they":[82],"prevent":[83],"intolerable":[84],"drops.":[86],"However,":[87],"input":[90,104,129],"multiple-channel":[92],"blocks,":[93],"design":[95],"switches":[97],"multiplexers":[99,131],"results":[100],"critical":[101],"output":[107],"nodes":[108],"can":[109],"assume":[110],"values":[111],"beyond":[112],"signal":[114],"range,":[115],"causing":[116],"harmful":[117],"configurations.":[119],"paper":[121],"presents":[122],"architecture":[124],"a":[126,154,175,186],"switch":[127,156,177],"channel":[130],"able":[132],"to":[133,137],"handle":[134],"up":[136],"twice":[138],"employed":[145],"Its":[147],"effectiveness":[148],"has":[149],"been":[150],"proved":[151],"by":[152],"1.6V":[155],"core":[159],"MOS":[160],"transistors":[161],"28nm":[164],"technology":[166],"0.96V":[168],"voltage.":[171],"comparison":[173],"benchmark":[176],"based":[178],"on":[179],"1.8V":[180],"I/O":[181],"showed":[183],"both":[185],"area":[188],"(slightly":[189],"more":[190],"twice)":[192],"static":[194],"current":[195],"consumption":[196],"($40\\mu":[197],"\\text{A}$)":[198],"required.":[200]},"counts_by_year":[{"year":2024,"cited_by_count":1},{"year":2023,"cited_by_count":2}],"updated_date":"2026-07-29T09:40:50.615796","created_date":"2025-10-10T00:00:00"}
