{"id":"https://openalex.org/W3184266563","doi":"https://doi.org/10.1109/tcsi.2021.3094094","title":"A 529-\u03bcW Fractional-N All-Digital PLL Using TDC Gain Auto-Calibration and an Inverse-Class-F DCO in 65-nm CMOS","display_name":"A 529-\u03bcW Fractional-N All-Digital PLL Using TDC Gain Auto-Calibration and an Inverse-Class-F DCO in 65-nm CMOS","publication_year":2022,"publication_date":"2022-01-01","ids":{"openalex":"https://openalex.org/W3184266563","doi":"https://doi.org/10.1109/tcsi.2021.3094094","mag":"3184266563"},"language":"en","primary_location":{"is_oa":true,"landing_page_url":"https://doi.org/10.1109/tcsi.2021.3094094","pdf_url":"https://ieeexplore.ieee.org/ielx7/8919/9684154/09493748.pdf","source":{"id":"https://openalex.org/S116977442","display_name":"IEEE Transactions on Circuits and Systems I-regular Papers","issn_l":"1549-8328","issn":["1549-8328","1558-0806"],"is_oa":false,"is_in_doaj":false,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":"cc-by","version":"publishedVersion","is_accepted":true,"is_published":true},"type":"article","type_crossref":"journal-article","indexed_in":["crossref"],"open_access":{"is_oa":true,"oa_status":"hybrid","oa_url":"https://ieeexplore.ieee.org/ielx7/8919/9684154/09493748.pdf","any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5051366940","display_name":"Peng Chen","orcid":"https://orcid.org/0000-0002-2872-9421"},"institutions":[{"id":"https://openalex.org/I100930933","display_name":"University College Dublin","ror":"https://ror.org/05m7pjf47","country_code":"IE","type":"education","lineage":["https://openalex.org/I100930933","https://openalex.org/I181231927"]},{"id":"https://openalex.org/I204512498","display_name":"University of Macau","ror":"https://ror.org/01r4q9n85","country_code":"MO","type":"education","lineage":["https://openalex.org/I204512498"]}],"countries":["IE","MO"],"is_corresponding":false,"raw_author_name":"Peng Chen","raw_affiliation_string":"Department of ECE, State-Key Laboratory of Analog and Mixed-Signal VLSI, Faculty of Science and Technology, University of Macau, Taipa, Macau; School of Electrical and Electronic Engineering, University College Dublin, Dublin 4, Ireland; Wuxi Grandmicro, Wuxi, China","raw_affiliation_strings":["Department of ECE, State-Key Laboratory of Analog and Mixed-Signal VLSI, Faculty of Science and Technology, University of Macau, Taipa, Macau","School of Electrical and Electronic Engineering, University College Dublin, Dublin 4, Ireland","Wuxi Grandmicro, Wuxi, China"]},{"author_position":"middle","author":{"id":"https://openalex.org/A5062261926","display_name":"Xi Meng","orcid":"https://orcid.org/0000-0002-2320-5012"},"institutions":[{"id":"https://openalex.org/I204512498","display_name":"University of Macau","ror":"https://ror.org/01r4q9n85","country_code":"MO","type":"education","lineage":["https://openalex.org/I204512498"]}],"countries":["MO"],"is_corresponding":false,"raw_author_name":"Xi Meng","raw_affiliation_string":"[State-Key Laboratory of Analog and Mixed-Signal VLSI, Department of ECE, Faculty of Science and Technology, University of Macau, Taipa, Macau.]","raw_affiliation_strings":["[State-Key Laboratory of Analog and Mixed-Signal VLSI, Department of ECE, Faculty of Science and Technology, University of Macau, Taipa, Macau.]"]},{"author_position":"middle","author":{"id":"https://openalex.org/A5006541988","display_name":"Jun Yin","orcid":"https://orcid.org/0000-0002-4195-4551"},"institutions":[{"id":"https://openalex.org/I204512498","display_name":"University of Macau","ror":"https://ror.org/01r4q9n85","country_code":"MO","type":"education","lineage":["https://openalex.org/I204512498"]}],"countries":["MO"],"is_corresponding":false,"raw_author_name":"Jun Yin","raw_affiliation_string":"[State-Key Laboratory of Analog and Mixed-Signal VLSI, Department of ECE, Faculty of Science and Technology, University of Macau, Taipa, Macau.]","raw_affiliation_strings":["[State-Key Laboratory of Analog and Mixed-Signal VLSI, Department of ECE, Faculty of Science and Technology, University of Macau, Taipa, Macau.]"]},{"author_position":"middle","author":{"id":"https://openalex.org/A5058845450","display_name":"Pui-In Mak","orcid":"https://orcid.org/0000-0002-3579-8740"},"institutions":[{"id":"https://openalex.org/I204512498","display_name":"University of Macau","ror":"https://ror.org/01r4q9n85","country_code":"MO","type":"education","lineage":["https://openalex.org/I204512498"]}],"countries":["MO"],"is_corresponding":false,"raw_author_name":"Pui In Mak","raw_affiliation_string":"[State-Key Laboratory of Analog and Mixed-Signal VLSI, Department of ECE, Faculty of Science and Technology, University of Macau, Taipa, Macau.]","raw_affiliation_strings":["[State-Key Laboratory of Analog and Mixed-Signal VLSI, Department of ECE, Faculty of Science and Technology, University of Macau, Taipa, Macau.]"]},{"author_position":"middle","author":{"id":"https://openalex.org/A5007322600","display_name":"Rui P. Martins","orcid":"https://orcid.org/0000-0003-2821-648X"},"institutions":[{"id":"https://openalex.org/I204512498","display_name":"University of Macau","ror":"https://ror.org/01r4q9n85","country_code":"MO","type":"education","lineage":["https://openalex.org/I204512498"]},{"id":"https://openalex.org/I3130395211","display_name":"Instituto Tecnol\u00f3gico Superior de Xalapa","ror":"https://ror.org/009rr6x76","country_code":"MX","type":"education","lineage":["https://openalex.org/I3130395211"]},{"id":"https://openalex.org/I141596103","display_name":"University of Lisbon","ror":"https://ror.org/01c27hj86","country_code":"PT","type":"education","lineage":["https://openalex.org/I141596103"]}],"countries":["MO","MX","PT"],"is_corresponding":false,"raw_author_name":"Rui P. Martins","raw_affiliation_string":"Department of ECE, State-Key Laboratory of Analog and Mixed-Signal VLSI, Faculty of Science and Technology, University of Macau, Taipa, Macau; Instituto Superior Té cnico, Universidade de Lisboa, Lisboa, Portugal","raw_affiliation_strings":["Department of ECE, State-Key Laboratory of Analog and Mixed-Signal VLSI, Faculty of Science and Technology, University of Macau, Taipa, Macau","Instituto Superior Té","cnico, Universidade de Lisboa, Lisboa, Portugal"]},{"author_position":"last","author":{"id":"https://openalex.org/A5027017637","display_name":"Robert Bogdan Staszewski","orcid":"https://orcid.org/0000-0001-9848-1129"},"institutions":[{"id":"https://openalex.org/I100930933","display_name":"University College Dublin","ror":"https://ror.org/05m7pjf47","country_code":"IE","type":"education","lineage":["https://openalex.org/I100930933","https://openalex.org/I181231927"]},{"id":"https://openalex.org/I686019","display_name":"AGH University of Krakow","ror":"https://ror.org/00bas1c41","country_code":"PL","type":"education","lineage":["https://openalex.org/I686019"]}],"countries":["IE","PL"],"is_corresponding":false,"raw_author_name":"Robert Bogdan Staszewski","raw_affiliation_string":"Department of Measurement and Instrumentation, University of Science and Technology, Krakow, Poland; School of Electrical and Electronic Engineering, University College Dublin, Dublin 4, Ireland","raw_affiliation_strings":["Department of Measurement and Instrumentation, University of Science and Technology, Krakow, Poland","School of Electrical and Electronic Engineering, University College Dublin, Dublin 4, Ireland"]}],"countries_distinct_count":5,"institutions_distinct_count":5,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"has_fulltext":true,"fulltext_origin":"pdf","cited_by_count":12,"cited_by_percentile_year":{"min":96,"max":97},"biblio":{"volume":"69","issue":"1","first_page":"51","last_page":"63"},"is_retracted":false,"is_paratext":false,"primary_topic":{"id":"https://openalex.org/T11417","display_name":"Phase-Locked Loops in High-Speed Circuits","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11417","display_name":"Phase-Locked Loops in High-Speed Circuits","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10187","display_name":"Radio Frequency Integrated Circuit Design","score":0.9996,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10323","display_name":"Analog Circuit Design for Biomedical Applications","score":0.9982,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"keyword":"all-digital","score":0.25},{"keyword":"auto-calibration","score":0.25},{"keyword":"inverse-class-f","score":0.25}],"concepts":[{"id":"https://openalex.org/C12707504","wikidata":"https://www.wikidata.org/wiki/Q52637","display_name":"Phase-locked loop","level":3,"score":0.72357357},{"id":"https://openalex.org/C134652429","wikidata":"https://www.wikidata.org/wiki/Q1052698","display_name":"Jitter","level":2,"score":0.6758797},{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.61644256},{"id":"https://openalex.org/C167872736","wikidata":"https://www.wikidata.org/wiki/Q5276224","display_name":"Digitally controlled oscillator","level":5,"score":0.6149379},{"id":"https://openalex.org/C89631360","wikidata":"https://www.wikidata.org/wiki/Q1428766","display_name":"Phase noise","level":2,"score":0.54963756},{"id":"https://openalex.org/C130277099","wikidata":"https://www.wikidata.org/wiki/Q3676605","display_name":"Figure of merit","level":2,"score":0.5286482},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.5170003},{"id":"https://openalex.org/C207467116","wikidata":"https://www.wikidata.org/wiki/Q4385666","display_name":"Inverse","level":2,"score":0.49126595},{"id":"https://openalex.org/C165838908","wikidata":"https://www.wikidata.org/wiki/Q736777","display_name":"Calibration","level":2,"score":0.45229188},{"id":"https://openalex.org/C52192207","wikidata":"https://www.wikidata.org/wiki/Q5322","display_name":"Capacitor","level":3,"score":0.43867412},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.3741364},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.3468515},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.32642576},{"id":"https://openalex.org/C184720557","wikidata":"https://www.wikidata.org/wiki/Q7825049","display_name":"Topology (electrical circuits)","level":2,"score":0.3206898},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.30286747},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.27993768},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.19471136},{"id":"https://openalex.org/C49040817","wikidata":"https://www.wikidata.org/wiki/Q193091","display_name":"Optoelectronics","level":1,"score":0.12977165},{"id":"https://openalex.org/C62520636","wikidata":"https://www.wikidata.org/wiki/Q944","display_name":"Quantum mechanics","level":1,"score":0.0},{"id":"https://openalex.org/C120164764","wikidata":"https://www.wikidata.org/wiki/Q705396","display_name":"Variable-frequency oscillator","level":4,"score":0.0},{"id":"https://openalex.org/C2524010","wikidata":"https://www.wikidata.org/wiki/Q8087","display_name":"Geometry","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"is_oa":true,"landing_page_url":"https://doi.org/10.1109/tcsi.2021.3094094","pdf_url":"https://ieeexplore.ieee.org/ielx7/8919/9684154/09493748.pdf","source":{"id":"https://openalex.org/S116977442","display_name":"IEEE Transactions on Circuits and Systems I-regular Papers","issn_l":"1549-8328","issn":["1549-8328","1558-0806"],"is_oa":false,"is_in_doaj":false,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":"cc-by","version":"publishedVersion","is_accepted":true,"is_published":true}],"best_oa_location":{"is_oa":true,"landing_page_url":"https://doi.org/10.1109/tcsi.2021.3094094","pdf_url":"https://ieeexplore.ieee.org/ielx7/8919/9684154/09493748.pdf","source":{"id":"https://openalex.org/S116977442","display_name":"IEEE Transactions on Circuits and Systems I-regular Papers","issn_l":"1549-8328","issn":["1549-8328","1558-0806"],"is_oa":false,"is_in_doaj":false,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":"cc-by","version":"publishedVersion","is_accepted":true,"is_published":true},"sustainable_development_goals":[{"display_name":"Affordable and clean energy","score":0.56,"id":"https://metadata.un.org/sdg/7"}],"grants":[{"funder":"https://openalex.org/F4320320847","funder_display_name":"Science Foundation Ireland","award_id":"14/RP/I2921"},{"funder":"https://openalex.org/F4320322841","funder_display_name":"Universidade de Macau","award_id":"MYRG2018-00220-AMSV"}],"referenced_works_count":35,"referenced_works":["https://openalex.org/W1500763588","https://openalex.org/W1544882865","https://openalex.org/W1571758417","https://openalex.org/W1994184480","https://openalex.org/W1997287970","https://openalex.org/W1998209581","https://openalex.org/W2072473787","https://openalex.org/W2098907338","https://openalex.org/W2099064239","https://openalex.org/W2104340505","https://openalex.org/W2112006904","https://openalex.org/W2135143797","https://openalex.org/W2153267648","https://openalex.org/W2177419178","https://openalex.org/W2316615363","https://openalex.org/W2407917029","https://openalex.org/W2493510574","https://openalex.org/W2516063142","https://openalex.org/W2528482522","https://openalex.org/W2559073178","https://openalex.org/W2571466164","https://openalex.org/W2588789014","https://openalex.org/W2596943636","https://openalex.org/W2611384543","https://openalex.org/W2758621295","https://openalex.org/W2790060412","https://openalex.org/W2810207282","https://openalex.org/W2899938501","https://openalex.org/W2901368319","https://openalex.org/W2908054846","https://openalex.org/W2908594358","https://openalex.org/W2972420192","https://openalex.org/W2975185022","https://openalex.org/W3046062028","https://openalex.org/W3113231815"],"related_works":["https://openalex.org/W2139484866","https://openalex.org/W2008250178","https://openalex.org/W2474043983","https://openalex.org/W2566880546","https://openalex.org/W2078513307","https://openalex.org/W2544336511","https://openalex.org/W2144737022","https://openalex.org/W2000633969","https://openalex.org/W1978186604","https://openalex.org/W150743853"],"ngrams_url":"https://api.openalex.org/works/W3184266563/ngrams","abstract_inverted_index":{"This":[0],"paper":[1],"presents":[2],"an":[3],"ultra-lower-power":[4],"(ULP)":[5],"digital-to-time-converter":[6],"(DTC)-assisted":[7],"fractional-N":[8,79,127],"all-digital":[9],"phase-locked":[10],"loop":[11],"(ADPLL)":[12],"suitable":[13],"for":[14,106],"IoT":[15],"applications.":[16],"A":[17],"proposed":[18],"hybrid":[19,44],"time-to-digital":[20],"converter":[21],"(TDC)":[22],"extends":[23],"the":[24,36,40,74,78,99,110,118],"vernier-TDC":[25],"input":[26],"range":[27],"with":[28],"little":[29],"power":[30],"overhead":[31],"in":[32,39,115,125],"order":[33],"to":[34,52,60,138],"overcome":[35],"stability":[37],"issue":[38],"conventional":[41],"architectures.":[42],"The":[43,67,81],"TDC":[45],"also":[46,83],"facilitates":[47],"a":[48,54,70,85,126,139],"background":[49],"gain":[50],"calibration":[51],"achieve":[53],"stable":[55],"in-band":[56],"phase":[57],"noise":[58],"insensitive":[59],"process,":[61],"voltage,":[62],"and":[63,112],"temperature":[64],"(PVT)":[65],"variations.":[66],"implementation":[68],"of":[69,77,101,109,142],"buffer-cascaded":[71],"DTC":[72],"simplifies":[73],"design":[75],"complexity":[76],"operation.":[80],"ADPLL":[82,120],"features":[84],"200":[86],"$\\mu":[88,134],"\\text{W}$":[89,135],"":[90],"low-phase-noise":[91],"inverse-class-F":[92],"(class-F−1)":[93],"digitally":[94],"controlled":[95],"oscillator":[96],"(DCO)":[97],"without":[98],"need":[100],"two-dimensional":[102],"(2-D)":[103],"capacitor":[104],"tuning":[105],"frequency":[107],"alignment":[108],"fundamental":[111],"2nd-harmonic.":[113],"Fabricated":[114],"65-nm":[116],"CMOS,":[117],"ULP":[119],"prototype":[121],"achieves":[122],"868fsrms":[123],"jitter":[124],"channel":[128],"when":[129],"consuming":[130],"only":[131],"529":[132],",":[136],"corresponding":[137],"figure-of-merit":[140],"(FoM)":[141],"−244dB.":[143]},"cited_by_api_url":"https://api.openalex.org/works?filter=cites:W3184266563","counts_by_year":[{"year":2024,"cited_by_count":1},{"year":2023,"cited_by_count":5},{"year":2022,"cited_by_count":6}],"updated_date":"2024-03-01T14:14:10.563684","created_date":"2021-08-02"}