{"id":"https://openalex.org/W3136661089","doi":"https://doi.org/10.1109/tcsi.2021.3064419","title":"FPGA-Based Relaxation D/A Converters With Parasitics-Induced Error Suppression and Digital Self-Calibration","display_name":"FPGA-Based Relaxation D/A Converters With Parasitics-Induced Error Suppression and Digital Self-Calibration","publication_year":2021,"publication_date":"2021-03-15","ids":{"openalex":"https://openalex.org/W3136661089","doi":"https://doi.org/10.1109/tcsi.2021.3064419","mag":"3136661089"},"language":"en","primary_location":{"id":"doi:10.1109/tcsi.2021.3064419","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tcsi.2021.3064419","pdf_url":null,"source":{"id":"https://openalex.org/S116977442","display_name":"IEEE Transactions on Circuits and Systems I Regular Papers","issn_l":"1549-8328","issn":["1549-8328","1558-0806"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Circuits and Systems I: Regular Papers","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5077267649","display_name":"Roberto Rubino","orcid":"https://orcid.org/0000-0001-7193-2639"},"institutions":[{"id":"https://openalex.org/I177477856","display_name":"Politecnico di Torino","ror":"https://ror.org/00bgk9508","country_code":"IT","type":"education","lineage":["https://openalex.org/I177477856"]}],"countries":["IT"],"is_corresponding":false,"raw_author_name":"Roberto Rubino","raw_affiliation_strings":["Politecnico di Torino, Torino, Italy","Department of Electronics and Telecommunications (DET) Politecnico di Torino Torino Italy"],"raw_orcid":"https://orcid.org/0000-0001-7193-2639","affiliations":[{"raw_affiliation_string":"Politecnico di Torino, Torino, Italy","institution_ids":["https://openalex.org/I177477856"]},{"raw_affiliation_string":"Department of Electronics and Telecommunications (DET) Politecnico di Torino Torino Italy","institution_ids":["https://openalex.org/I177477856"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5048892532","display_name":"Paolo Crovetti","orcid":"https://orcid.org/0000-0002-2484-1686"},"institutions":[{"id":"https://openalex.org/I177477856","display_name":"Politecnico di Torino","ror":"https://ror.org/00bgk9508","country_code":"IT","type":"education","lineage":["https://openalex.org/I177477856"]}],"countries":["IT"],"is_corresponding":false,"raw_author_name":"Paolo S. Crovetti","raw_affiliation_strings":["Politecnico di Torino, Torino, Italy","Department of Electronics and Telecommunications (DET) Politecnico di Torino Torino Italy"],"raw_orcid":"https://orcid.org/0000-0002-2484-1686","affiliations":[{"raw_affiliation_string":"Politecnico di Torino, Torino, Italy","institution_ids":["https://openalex.org/I177477856"]},{"raw_affiliation_string":"Department of Electronics and Telecommunications (DET) Politecnico di Torino Torino Italy","institution_ids":["https://openalex.org/I177477856"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5054495349","display_name":"Francesco Musolino","orcid":"https://orcid.org/0000-0001-9960-4653"},"institutions":[{"id":"https://openalex.org/I177477856","display_name":"Politecnico di Torino","ror":"https://ror.org/00bgk9508","country_code":"IT","type":"education","lineage":["https://openalex.org/I177477856"]}],"countries":["IT"],"is_corresponding":false,"raw_author_name":"Francesco Musolino","raw_affiliation_strings":["Politecnico di Torino, Torino, Italy","Department of Electronics and Telecommunications (DET) Politecnico di Torino Torino Italy"],"raw_orcid":"https://orcid.org/0000-0001-9960-4653","affiliations":[{"raw_affiliation_string":"Politecnico di Torino, Torino, Italy","institution_ids":["https://openalex.org/I177477856"]},{"raw_affiliation_string":"Department of Electronics and Telecommunications (DET) Politecnico di Torino Torino Italy","institution_ids":["https://openalex.org/I177477856"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":3,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":1.1039,"has_fulltext":false,"cited_by_count":16,"citation_normalized_percentile":{"value":0.74245829,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":94,"max":98},"biblio":{"volume":"68","issue":"6","first_page":"2494","last_page":"2507"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11417","display_name":"Advancements in PLL and VCO Technologies","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10558","display_name":"Advancements in Semiconductor Devices and Circuit Design","score":0.9991000294685364,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/spurious-free-dynamic-range","display_name":"Spurious-free dynamic range","score":0.9082504510879517},{"id":"https://openalex.org/keywords/parasitic-extraction","display_name":"Parasitic extraction","score":0.7279508709907532},{"id":"https://openalex.org/keywords/integral-nonlinearity","display_name":"Integral nonlinearity","score":0.7225490212440491},{"id":"https://openalex.org/keywords/least-significant-bit","display_name":"Least significant bit","score":0.6852194666862488},{"id":"https://openalex.org/keywords/differential-nonlinearity","display_name":"Differential nonlinearity","score":0.6806226372718811},{"id":"https://openalex.org/keywords/effective-number-of-bits","display_name":"Effective number of bits","score":0.6443793773651123},{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.6058735251426697},{"id":"https://openalex.org/keywords/converters","display_name":"Converters","score":0.5966486930847168},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.5405551195144653},{"id":"https://openalex.org/keywords/digital-to-analog-converter","display_name":"Digital-to-analog converter","score":0.5367746353149414},{"id":"https://openalex.org/keywords/total-harmonic-distortion","display_name":"Total harmonic distortion","score":0.5078309178352356},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.4612658619880676},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.426168829202652},{"id":"https://openalex.org/keywords/relaxation-oscillator","display_name":"Relaxation oscillator","score":0.41662418842315674},{"id":"https://openalex.org/keywords/calibration","display_name":"Calibration","score":0.410078763961792},{"id":"https://openalex.org/keywords/dynamic-range","display_name":"Dynamic range","score":0.30969589948654175},{"id":"https://openalex.org/keywords/physics","display_name":"Physics","score":0.29300427436828613},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.26077908277511597},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.2184222936630249},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.1730961799621582},{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.10535189509391785},{"id":"https://openalex.org/keywords/voltage-controlled-oscillator","display_name":"Voltage-controlled oscillator","score":0.08690840005874634}],"concepts":[{"id":"https://openalex.org/C119293636","wikidata":"https://www.wikidata.org/wiki/Q657480","display_name":"Spurious-free dynamic range","level":3,"score":0.9082504510879517},{"id":"https://openalex.org/C159818811","wikidata":"https://www.wikidata.org/wiki/Q7135947","display_name":"Parasitic extraction","level":2,"score":0.7279508709907532},{"id":"https://openalex.org/C130829357","wikidata":"https://www.wikidata.org/wiki/Q1665386","display_name":"Integral nonlinearity","level":4,"score":0.7225490212440491},{"id":"https://openalex.org/C4305246","wikidata":"https://www.wikidata.org/wiki/Q3885225","display_name":"Least significant bit","level":2,"score":0.6852194666862488},{"id":"https://openalex.org/C71217194","wikidata":"https://www.wikidata.org/wiki/Q575958","display_name":"Differential nonlinearity","level":3,"score":0.6806226372718811},{"id":"https://openalex.org/C16671190","wikidata":"https://www.wikidata.org/wiki/Q505579","display_name":"Effective number of bits","level":3,"score":0.6443793773651123},{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.6058735251426697},{"id":"https://openalex.org/C2778422915","wikidata":"https://www.wikidata.org/wiki/Q10302051","display_name":"Converters","level":3,"score":0.5966486930847168},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.5405551195144653},{"id":"https://openalex.org/C2779879419","wikidata":"https://www.wikidata.org/wiki/Q210863","display_name":"Digital-to-analog converter","level":3,"score":0.5367746353149414},{"id":"https://openalex.org/C42156128","wikidata":"https://www.wikidata.org/wiki/Q162641","display_name":"Total harmonic distortion","level":3,"score":0.5078309178352356},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.4612658619880676},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.426168829202652},{"id":"https://openalex.org/C135854075","wikidata":"https://www.wikidata.org/wiki/Q1421688","display_name":"Relaxation oscillator","level":4,"score":0.41662418842315674},{"id":"https://openalex.org/C165838908","wikidata":"https://www.wikidata.org/wiki/Q736777","display_name":"Calibration","level":2,"score":0.410078763961792},{"id":"https://openalex.org/C87133666","wikidata":"https://www.wikidata.org/wiki/Q1161699","display_name":"Dynamic range","level":2,"score":0.30969589948654175},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.29300427436828613},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.26077908277511597},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.2184222936630249},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.1730961799621582},{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.10535189509391785},{"id":"https://openalex.org/C5291336","wikidata":"https://www.wikidata.org/wiki/Q852341","display_name":"Voltage-controlled oscillator","level":3,"score":0.08690840005874634},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.0},{"id":"https://openalex.org/C62520636","wikidata":"https://www.wikidata.org/wiki/Q944","display_name":"Quantum mechanics","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/tcsi.2021.3064419","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tcsi.2021.3064419","pdf_url":null,"source":{"id":"https://openalex.org/S116977442","display_name":"IEEE Transactions on Circuits and Systems I Regular Papers","issn_l":"1549-8328","issn":["1549-8328","1558-0806"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Circuits and Systems I: Regular Papers","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":24,"referenced_works":["https://openalex.org/W1523194000","https://openalex.org/W1710926446","https://openalex.org/W1950910079","https://openalex.org/W1984546271","https://openalex.org/W1990987171","https://openalex.org/W2011563486","https://openalex.org/W2058206069","https://openalex.org/W2126329142","https://openalex.org/W2147078733","https://openalex.org/W2328646269","https://openalex.org/W2533128568","https://openalex.org/W2540707026","https://openalex.org/W2800836468","https://openalex.org/W2941153486","https://openalex.org/W2970430020","https://openalex.org/W2996966826","https://openalex.org/W2999737046","https://openalex.org/W3016114585","https://openalex.org/W3091393081","https://openalex.org/W3120609227","https://openalex.org/W3124896021","https://openalex.org/W6641008597","https://openalex.org/W6678893609","https://openalex.org/W6772567294"],"related_works":["https://openalex.org/W4290755255","https://openalex.org/W2536327642","https://openalex.org/W2135048255","https://openalex.org/W2021405064","https://openalex.org/W2035972461","https://openalex.org/W4200061607","https://openalex.org/W2004162305","https://openalex.org/W2025217054","https://openalex.org/W4210466215","https://openalex.org/W2116295651"],"abstract_inverted_index":{"In":[0],"this":[1,41],"paper,":[2],"the":[3,23,43,50,53,85,89],"implementation":[4,80],"on":[5,107,115,133],"a":[6,27,59,71,108,116],"Field":[7],"Programmable":[8],"Gate":[9],"Array":[10],"(FPGA)":[11],"of":[12,22,26,52,88],"Relaxation":[13],"Digital":[14],"to":[15,31,49,78,83,166],"Analog":[16],"Converters":[17],"(ReDACs),":[18],"which":[19,122],"take":[20],"advantage":[21],"impulse":[24],"response":[25],"first-order":[28],"RC":[29,54],"network":[30,55],"generate":[32],"and":[33,58,61,101,114,128,159],"combine":[34],"binary":[35],"weighted":[36],"voltages,":[37],"is":[38,56,68,81],"addressed.":[39],"For":[40],"purpose,":[42],"dominant":[44],"ReDAC":[45,72,94],"nonlinearity":[46],"limitation":[47],"related":[48],"parasitics":[51],"analyzed":[57],"simple":[60],"robust":[62],"technique":[63,100],"for":[64,93],"its":[65],"effective":[66,169],"suppression":[67,99],"proposed.":[69],"Moreover,":[70],"foreground":[73],"digital":[74],"calibration":[75,102],"strategy":[76,103],"suitable":[77],"FPGA":[79],"introduced":[82],"tune":[84],"clock":[86],"frequency":[87],"converter,":[90],"as":[91],"requested":[92],"operation.":[95],"The":[96],"novel":[97],"error":[98],"are":[104,123],"finally":[105],"implemented":[106],"13-bit,":[109],"514":[110],"S/s":[111],"prototype":[112,120],"(ReDAC1)":[113],"11-bit,":[117],"10.5":[118],"kS/s":[119],"(ReDAC2),":[121],"experimentally":[124],"characterized":[125],"under":[126],"static":[127],"dynamic":[129],"conditions.":[130],"Measured":[131],"results":[132],"ReDAC1":[134],"(ReDAC2)":[135],"reveal":[136],"1.68":[137],"LSB":[138,144],"(1.53":[139],"LSB)":[140,146],"maximum":[141,147],"INL,":[142],"1.54":[143],"(1.0":[145],"DNL,":[148],"76.4":[149],"dB":[150,155,161],"(67.9":[151],"dB)":[152,157,163],"THD,":[153],"79.7":[154],"(71.4":[156],"SFDR":[158],"71.3":[160],"(63.3":[162],"SNDR,":[164],"corresponding":[165],"11.6":[167],"(10.2)":[168],"bits":[170],"(ENOB).":[171]},"counts_by_year":[{"year":2025,"cited_by_count":3},{"year":2024,"cited_by_count":3},{"year":2023,"cited_by_count":4},{"year":2022,"cited_by_count":4},{"year":2021,"cited_by_count":2}],"updated_date":"2026-06-11T09:08:48.828518","created_date":"2025-10-10T00:00:00"}