{"id":"https://openalex.org/W3099871312","doi":"https://doi.org/10.1109/tcsi.2020.3036209","title":"A Logic-Compatible eDRAM Compute-In-Memory With Embedded ADCs for Processing Neural Networks","display_name":"A Logic-Compatible eDRAM Compute-In-Memory With Embedded ADCs for Processing Neural Networks","publication_year":2020,"publication_date":"2020-11-12","ids":{"openalex":"https://openalex.org/W3099871312","doi":"https://doi.org/10.1109/tcsi.2020.3036209","mag":"3099871312"},"language":"en","primary_location":{"id":"doi:10.1109/tcsi.2020.3036209","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tcsi.2020.3036209","pdf_url":null,"source":{"id":"https://openalex.org/S116977442","display_name":"IEEE Transactions on Circuits and Systems I Regular Papers","issn_l":"1549-8328","issn":["1549-8328","1558-0806"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Circuits and Systems I: Regular Papers","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5003541204","display_name":"Chengshuo Yu","orcid":"https://orcid.org/0000-0003-0897-7871"},"institutions":[{"id":"https://openalex.org/I115228651","display_name":"Agency for Science, Technology and Research","ror":"https://ror.org/036wvzt09","country_code":"SG","type":"government","lineage":["https://openalex.org/I115228651"]},{"id":"https://openalex.org/I172675005","display_name":"Nanyang Technological University","ror":"https://ror.org/02e7b5302","country_code":"SG","type":"education","lineage":["https://openalex.org/I172675005"]},{"id":"https://openalex.org/I4210090209","display_name":"Institute of Microelectronics","ror":"https://ror.org/009rw8n36","country_code":"SG","type":"facility","lineage":["https://openalex.org/I115228651","https://openalex.org/I4210090209","https://openalex.org/I91275662"]}],"countries":["SG"],"is_corresponding":false,"raw_author_name":"Chengshuo Yu","raw_affiliation_strings":["Institute of Microelectronics, A*STAR, Singapore","School of Electrical and Electronic Engineering, Nanyang Technological University, Singapore"],"raw_orcid":"https://orcid.org/0000-0003-0897-7871","affiliations":[{"raw_affiliation_string":"Institute of Microelectronics, A*STAR, Singapore","institution_ids":["https://openalex.org/I4210090209","https://openalex.org/I115228651"]},{"raw_affiliation_string":"School of Electrical and Electronic Engineering, Nanyang Technological University, Singapore","institution_ids":["https://openalex.org/I172675005"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5056917810","display_name":"Taegeun Yoo","orcid":"https://orcid.org/0000-0001-9876-7725"},"institutions":[{"id":"https://openalex.org/I172675005","display_name":"Nanyang Technological University","ror":"https://ror.org/02e7b5302","country_code":"SG","type":"education","lineage":["https://openalex.org/I172675005"]}],"countries":["SG"],"is_corresponding":false,"raw_author_name":"Taegeun Yoo","raw_affiliation_strings":["School of Electrical and Electronic Engineering, Nanyang Technological University, Singapore"],"raw_orcid":"https://orcid.org/0000-0001-9876-7725","affiliations":[{"raw_affiliation_string":"School of Electrical and Electronic Engineering, Nanyang Technological University, Singapore","institution_ids":["https://openalex.org/I172675005"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5100706959","display_name":"Hyunjoon Kim","orcid":"https://orcid.org/0000-0001-9906-073X"},"institutions":[{"id":"https://openalex.org/I172675005","display_name":"Nanyang Technological University","ror":"https://ror.org/02e7b5302","country_code":"SG","type":"education","lineage":["https://openalex.org/I172675005"]}],"countries":["SG"],"is_corresponding":false,"raw_author_name":"Hyunjoon Kim","raw_affiliation_strings":["School of Electrical and Electronic Engineering, Nanyang Technological University, Singapore"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"School of Electrical and Electronic Engineering, Nanyang Technological University, Singapore","institution_ids":["https://openalex.org/I172675005"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5076628109","display_name":"Tony Tae-Hyoung Kim","orcid":"https://orcid.org/0000-0002-1779-1799"},"institutions":[{"id":"https://openalex.org/I172675005","display_name":"Nanyang Technological University","ror":"https://ror.org/02e7b5302","country_code":"SG","type":"education","lineage":["https://openalex.org/I172675005"]}],"countries":["SG"],"is_corresponding":false,"raw_author_name":"Tony Tae-Hyoung Kim","raw_affiliation_strings":["School of Electrical and Electronic Engineering, Nanyang Technological University, Singapore"],"raw_orcid":"https://orcid.org/0000-0002-1779-1799","affiliations":[{"raw_affiliation_string":"School of Electrical and Electronic Engineering, Nanyang Technological University, Singapore","institution_ids":["https://openalex.org/I172675005"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5069583051","display_name":"Kevin Chai Tshun Chuan","orcid":null},"institutions":[{"id":"https://openalex.org/I115228651","display_name":"Agency for Science, Technology and Research","ror":"https://ror.org/036wvzt09","country_code":"SG","type":"government","lineage":["https://openalex.org/I115228651"]},{"id":"https://openalex.org/I4210090209","display_name":"Institute of Microelectronics","ror":"https://ror.org/009rw8n36","country_code":"SG","type":"facility","lineage":["https://openalex.org/I115228651","https://openalex.org/I4210090209","https://openalex.org/I91275662"]}],"countries":["SG"],"is_corresponding":false,"raw_author_name":"Kevin Chai Tshun Chuan","raw_affiliation_strings":["Institute of Microelectronics, A*STAR, Singapore"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Institute of Microelectronics, A*STAR, Singapore","institution_ids":["https://openalex.org/I4210090209","https://openalex.org/I115228651"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5035469250","display_name":"Bongjin Kim","orcid":"https://orcid.org/0000-0001-5397-9628"},"institutions":[{"id":"https://openalex.org/I172675005","display_name":"Nanyang Technological University","ror":"https://ror.org/02e7b5302","country_code":"SG","type":"education","lineage":["https://openalex.org/I172675005"]}],"countries":["SG"],"is_corresponding":false,"raw_author_name":"Bongjin Kim","raw_affiliation_strings":["School of Electrical and Electronic Engineering, Nanyang Technological University, Singapore"],"raw_orcid":"https://orcid.org/0000-0001-5397-9628","affiliations":[{"raw_affiliation_string":"School of Electrical and Electronic Engineering, Nanyang Technological University, Singapore","institution_ids":["https://openalex.org/I172675005"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":6,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":4.2667,"has_fulltext":false,"cited_by_count":86,"citation_normalized_percentile":{"value":0.95036726,"is_in_top_1_percent":false,"is_in_top_10_percent":true},"cited_by_percentile_year":{"min":95,"max":100},"biblio":{"volume":"68","issue":"2","first_page":"667","last_page":"679"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10502","display_name":"Advanced Memory and Neural Computing","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10502","display_name":"Advanced Memory and Neural Computing","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T12808","display_name":"Ferroelectric and Negative Capacitance Devices","score":0.9995999932289124,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.998199999332428,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.6341208219528198},{"id":"https://openalex.org/keywords/static-random-access-memory","display_name":"Static random-access memory","score":0.5855173468589783},{"id":"https://openalex.org/keywords/dram","display_name":"Dram","score":0.5649439096450806},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.4196212589740753},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.387983113527298},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.37203699350357056}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.6341208219528198},{"id":"https://openalex.org/C68043766","wikidata":"https://www.wikidata.org/wiki/Q267416","display_name":"Static random-access memory","level":2,"score":0.5855173468589783},{"id":"https://openalex.org/C7366592","wikidata":"https://www.wikidata.org/wiki/Q1255620","display_name":"Dram","level":2,"score":0.5649439096450806},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.4196212589740753},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.387983113527298},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.37203699350357056}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/tcsi.2020.3036209","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tcsi.2020.3036209","pdf_url":null,"source":{"id":"https://openalex.org/S116977442","display_name":"IEEE Transactions on Circuits and Systems I Regular Papers","issn_l":"1549-8328","issn":["1549-8328","1558-0806"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Circuits and Systems I: Regular Papers","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[{"score":0.9100000262260437,"display_name":"Affordable and clean energy","id":"https://metadata.un.org/sdg/7"}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":35,"referenced_works":["https://openalex.org/W1619268095","https://openalex.org/W2002293402","https://openalex.org/W2006198238","https://openalex.org/W2070905822","https://openalex.org/W2091764549","https://openalex.org/W2097538613","https://openalex.org/W2131434692","https://openalex.org/W2140797820","https://openalex.org/W2161091390","https://openalex.org/W2267635276","https://openalex.org/W2527492855","https://openalex.org/W2528373198","https://openalex.org/W2541429840","https://openalex.org/W2782511028","https://openalex.org/W2792893539","https://openalex.org/W2794288888","https://openalex.org/W2806638402","https://openalex.org/W2884687835","https://openalex.org/W2920326572","https://openalex.org/W2921329602","https://openalex.org/W2966285227","https://openalex.org/W2971738511","https://openalex.org/W2999932424","https://openalex.org/W3000301330","https://openalex.org/W3015887053","https://openalex.org/W3016021860","https://openalex.org/W3017968097","https://openalex.org/W4285719527","https://openalex.org/W4295262505","https://openalex.org/W6679139576","https://openalex.org/W6680697572","https://openalex.org/W6693397755","https://openalex.org/W6727867346","https://openalex.org/W6728940736","https://openalex.org/W6750171416"],"related_works":["https://openalex.org/W3120961607","https://openalex.org/W2098207691","https://openalex.org/W3148568549","https://openalex.org/W1648516568","https://openalex.org/W361036515","https://openalex.org/W2269474412","https://openalex.org/W4386903460","https://openalex.org/W4211178602","https://openalex.org/W2537599394","https://openalex.org/W2433923775"],"abstract_inverted_index":{"A":[0,149,255],"novel":[1],"4T2C":[2],"ternary":[3,48,69,151,172],"embedded":[4,225],"DRAM":[5],"(eDRAM)":[6],"cell":[7,50,66,108],"is":[8,140,260,299,305],"proposed":[9,20,47],"for":[10,190,236],"computing":[11,197],"a":[12,26,52,68,82,88,115,136,155,159,166,192,210,251,291],"vector-matrix":[13,156],"multiplication":[14,157],"in":[15,31,42,179],"the":[16,32,63,76,92,106,120,124,128,233,245,267,275,279,285,302],"memory":[17],"array.":[18],"The":[19,46,203,296],"eDRAM-based":[21],"compute-in-memory":[22],"(CIM)":[23],"architecture":[24,35],"addresses":[25],"well-known":[27],"Von":[28],"Neumann":[29],"bottle-neck":[30],"traditional":[33],"computer":[34],"and":[36,40,101,165,185,243,284,301],"improves":[37],"both":[38,183],"latency":[39],"energy":[41,130,298,303],"processing":[43],"neural":[44],"networks.":[45],"eDRAM":[49,65,107,133,152,214],"takes":[51],"smaller":[53],"area":[54],"than":[55,142],"prior":[56,145],"SRAM-based":[57,146],"bitcells":[58,78],"using":[59,312],"6-12":[60],"transistors.":[61],"Nevertheless,":[62],"compact":[64],"stores":[67],"state":[70],"(-1,":[71],"0,":[72],"or":[73,218],"+1),":[74],"while":[75],"SRAM":[77],"can":[79],"only":[80],"store":[81],"binary":[83,163],"state.":[84],"We":[85],"also":[86],"present":[87],"method":[89],"to":[90,98,111,222,250],"mitigate":[91],"compute":[93],"accuracy":[94,277],"degradation":[95],"issue":[96],"due":[97],"device":[99],"mismatches":[100],"variations.":[102],"Besides,":[103],"we":[104],"extend":[105],"retention":[109,126],"time":[110],"200\u03bcs":[112],"by":[113,208,282,288],"adding":[114,219],"custom":[116],"metal":[117],"capacitor":[118],"at":[119,310],"storage":[121],"node.":[122],"With":[123],"improved":[125],"time,":[127],"overall":[129],"consumption":[131],"of":[132,144,195,213,270,278],"macro,":[134],"including":[135],"regular":[137],"refresh":[138],"operation,":[139],"lower":[141],"most":[143],"CIM":[147],"macros.":[148],"128\u00d7128":[150],"macro":[153],"computes":[154],"between":[158],"vector":[160],"with":[161,168,199,293],"64":[162,169],"inputs":[164],"matrix":[167],"\u00d7":[170],"128":[171,175],"weights.":[173],"Hence,":[174],"outputs":[176],"are":[177,188,205],"generated":[178],"parallel.":[180],"Note":[181],"that":[182,272],"weight":[184,217],"input":[186],"bit-precisions":[187,204],"programmable":[189],"supporting":[191],"wide":[193],"range":[194],"edge":[196],"applications":[198],"different":[200],"performance":[201],"requirements.":[202],"readily":[206],"tunable":[207],"assigning":[209],"variable":[211],"number":[212],"cells":[215,231],"per":[216],"multiple":[220],"pulses":[221],"input.":[223],"An":[224],"column":[226],"ADC":[227],"based":[228],"on":[229],"replica":[230],"sweeps":[232],"reference":[234],"level":[235],"2":[237],"<sup":[238],"xmlns:mml=\"http://www.w3.org/1998/Math/MathML\"":[239],"xmlns:xlink=\"http://www.w3.org/1999/xlink\">N</sup>":[240],"-1":[241],"cycles":[242],"converts":[244],"analog":[246],"accumulated":[247],"bitline":[248,257],"voltage":[249],"1-5bit":[252,308],"digital":[253],"output.":[254],"critical":[256],"accumulate":[258],"operation":[259],"simulated":[261,297],"(Monte-Carlo,":[262],"3K":[263],"runs).":[264],"It":[265],"shows":[266],"standard":[268],"deviation":[269],"2.84%":[271],"could":[273],"degrade":[274],"classification":[276],"MNIST":[280],"dataset":[281,287],"0.6%":[283],"CIFAR-10":[286],"1.3%":[289],"versus":[290],"baseline":[292],"no":[294],"variation.":[295],"1.81fJ/operation,":[300],"efficiency":[304],"552.5-17.8TOPS/W":[306],"(for":[307],"ADC)":[309],"200MHz":[311],"65nm":[313],"technology.":[314]},"counts_by_year":[{"year":2026,"cited_by_count":6},{"year":2025,"cited_by_count":17},{"year":2024,"cited_by_count":22},{"year":2023,"cited_by_count":25},{"year":2022,"cited_by_count":13},{"year":2021,"cited_by_count":3}],"updated_date":"2026-06-12T08:23:45.883708","created_date":"2025-10-10T00:00:00"}
