{"id":"https://openalex.org/W3042711247","doi":"https://doi.org/10.1109/tcsi.2020.3008487","title":"A Multi-Folded MCML for Ultra-Low-Voltage High-Performance in Deeply Scaled CMOS","display_name":"A Multi-Folded MCML for Ultra-Low-Voltage High-Performance in Deeply Scaled CMOS","publication_year":2020,"publication_date":"2020-07-17","ids":{"openalex":"https://openalex.org/W3042711247","doi":"https://doi.org/10.1109/tcsi.2020.3008487","mag":"3042711247"},"language":"en","primary_location":{"id":"doi:10.1109/tcsi.2020.3008487","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tcsi.2020.3008487","pdf_url":null,"source":{"id":"https://openalex.org/S116977442","display_name":"IEEE Transactions on Circuits and Systems I Regular Papers","issn_l":"1549-8328","issn":["1549-8328","1558-0806"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Circuits and Systems I: Regular Papers","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5044422028","display_name":"G. Palumbo","orcid":"https://orcid.org/0000-0002-8011-8660"},"institutions":[{"id":"https://openalex.org/I39063666","display_name":"University of Catania","ror":"https://ror.org/03a64bh57","country_code":"IT","type":"education","lineage":["https://openalex.org/I39063666"]}],"countries":["IT"],"is_corresponding":false,"raw_author_name":"Gaetano Palumbo","raw_affiliation_strings":["DIEEI, University of Catania, Catania, Italy"],"raw_orcid":"https://orcid.org/0000-0002-8011-8660","affiliations":[{"raw_affiliation_string":"DIEEI, University of Catania, Catania, Italy","institution_ids":["https://openalex.org/I39063666"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5010336494","display_name":"Giuseppe Scotti","orcid":"https://orcid.org/0000-0002-5650-8212"},"institutions":[{"id":"https://openalex.org/I861853513","display_name":"Sapienza University of Rome","ror":"https://ror.org/02be6w209","country_code":"IT","type":"education","lineage":["https://openalex.org/I861853513"]}],"countries":["IT"],"is_corresponding":false,"raw_author_name":"Giuseppe Scotti","raw_affiliation_strings":["Sapienza University of Rome, Rome, Italy"],"raw_orcid":"https://orcid.org/0000-0002-5650-8212","affiliations":[{"raw_affiliation_string":"Sapienza University of Rome, Rome, Italy","institution_ids":["https://openalex.org/I861853513"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":2,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":0.9085,"has_fulltext":false,"cited_by_count":10,"citation_normalized_percentile":{"value":0.73972793,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":97},"biblio":{"volume":"67","issue":"12","first_page":"4696","last_page":"4706"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10472","display_name":"Semiconductor materials and devices","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10472","display_name":"Semiconductor materials and devices","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10558","display_name":"Advancements in Semiconductor Devices and Circuit Design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/nmos-logic","display_name":"NMOS logic","score":0.8131945133209229},{"id":"https://openalex.org/keywords/pmos-logic","display_name":"PMOS logic","score":0.708453893661499},{"id":"https://openalex.org/keywords/current-mode-logic","display_name":"Current-mode logic","score":0.6926395297050476},{"id":"https://openalex.org/keywords/inverter","display_name":"Inverter","score":0.6521312594413757},{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.6319253444671631},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.5020062923431396},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.4835043251514435},{"id":"https://openalex.org/keywords/logic-gate","display_name":"Logic gate","score":0.4696592092514038},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.4427776634693146},{"id":"https://openalex.org/keywords/power","display_name":"Power (physics)","score":0.4387354254722595},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.36339932680130005},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.2668113112449646},{"id":"https://openalex.org/keywords/transistor","display_name":"Transistor","score":0.2668008506298065},{"id":"https://openalex.org/keywords/physics","display_name":"Physics","score":0.12031027674674988}],"concepts":[{"id":"https://openalex.org/C197162436","wikidata":"https://www.wikidata.org/wiki/Q83908","display_name":"NMOS logic","level":4,"score":0.8131945133209229},{"id":"https://openalex.org/C27050352","wikidata":"https://www.wikidata.org/wiki/Q173605","display_name":"PMOS logic","level":4,"score":0.708453893661499},{"id":"https://openalex.org/C2780295579","wikidata":"https://www.wikidata.org/wiki/Q5195108","display_name":"Current-mode logic","level":3,"score":0.6926395297050476},{"id":"https://openalex.org/C11190779","wikidata":"https://www.wikidata.org/wiki/Q664575","display_name":"Inverter","level":3,"score":0.6521312594413757},{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.6319253444671631},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.5020062923431396},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.4835043251514435},{"id":"https://openalex.org/C131017901","wikidata":"https://www.wikidata.org/wiki/Q170451","display_name":"Logic gate","level":2,"score":0.4696592092514038},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.4427776634693146},{"id":"https://openalex.org/C163258240","wikidata":"https://www.wikidata.org/wiki/Q25342","display_name":"Power (physics)","level":2,"score":0.4387354254722595},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.36339932680130005},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.2668113112449646},{"id":"https://openalex.org/C172385210","wikidata":"https://www.wikidata.org/wiki/Q5339","display_name":"Transistor","level":3,"score":0.2668008506298065},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.12031027674674988},{"id":"https://openalex.org/C62520636","wikidata":"https://www.wikidata.org/wiki/Q944","display_name":"Quantum mechanics","level":1,"score":0.0}],"mesh":[],"locations_count":2,"locations":[{"id":"doi:10.1109/tcsi.2020.3008487","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tcsi.2020.3008487","pdf_url":null,"source":{"id":"https://openalex.org/S116977442","display_name":"IEEE Transactions on Circuits and Systems I Regular Papers","issn_l":"1549-8328","issn":["1549-8328","1558-0806"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Circuits and Systems I: Regular Papers","raw_type":"journal-article"},{"id":"pmh:oai:iris.uniroma1.it:11573/1506486","is_oa":false,"landing_page_url":"http://hdl.handle.net/11573/1506486","pdf_url":null,"source":{"id":"https://openalex.org/S4377196107","display_name":"IRIS Research product catalog (Sapienza University of Rome)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":null,"host_organization_name":null,"host_organization_lineage":[],"host_organization_lineage_names":[],"type":"repository"},"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":null,"raw_type":"info:eu-repo/semantics/article"}],"best_oa_location":null,"sustainable_development_goals":[{"id":"https://metadata.un.org/sdg/7","score":0.8700000047683716,"display_name":"Affordable and clean energy"}],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":38,"referenced_works":["https://openalex.org/W1595570256","https://openalex.org/W1966423496","https://openalex.org/W1993254104","https://openalex.org/W1997433601","https://openalex.org/W1999565904","https://openalex.org/W2049947650","https://openalex.org/W2068355008","https://openalex.org/W2075393167","https://openalex.org/W2075943443","https://openalex.org/W2076413252","https://openalex.org/W2089509357","https://openalex.org/W2091151375","https://openalex.org/W2095875220","https://openalex.org/W2098328316","https://openalex.org/W2100556628","https://openalex.org/W2119129164","https://openalex.org/W2134830891","https://openalex.org/W2135246680","https://openalex.org/W2142303225","https://openalex.org/W2143905081","https://openalex.org/W2145113205","https://openalex.org/W2156892082","https://openalex.org/W2157437715","https://openalex.org/W2163977372","https://openalex.org/W2167482965","https://openalex.org/W2171916916","https://openalex.org/W2280601454","https://openalex.org/W2308583975","https://openalex.org/W2563314272","https://openalex.org/W2598095323","https://openalex.org/W2741337042","https://openalex.org/W2758426500","https://openalex.org/W2886484075","https://openalex.org/W2922160289","https://openalex.org/W2946899231","https://openalex.org/W3009334896","https://openalex.org/W6669501602","https://openalex.org/W6681144672"],"related_works":["https://openalex.org/W4386261925","https://openalex.org/W2048420745","https://openalex.org/W2082944690","https://openalex.org/W2263373136","https://openalex.org/W1914349328","https://openalex.org/W2104885411","https://openalex.org/W2160067645","https://openalex.org/W2008277438","https://openalex.org/W2891188466","https://openalex.org/W2058461810"],"abstract_inverted_index":{"In":[0,110,195,294,346],"this":[1,196],"paper":[2,197],"we":[3,71,198],"propose":[4,420],"a":[5,21,27,58,67,96,103,140,174,201,211,228,242,269,307,314,425],"novel":[6,202],"approach":[7,56,88,203,253],"called":[8],"Multi-Folded":[9],"(MF)":[10],"MOS":[11],"Current":[12],"Mode":[13],"Logic":[14],"(MCML)":[15],"which":[16,204],"can":[17],"be":[18,359,393],"applied":[19],"to":[20,63,151,206,263,358,392,424],"generic":[22],"MCML":[23,68,126,134,149,193,208,230,247,371],"gate":[24],"(i.e.,":[25],"with":[26,92,114,122,210,268,298],"fan-in":[28,212],"higher":[29,213,364,377],"than":[30,180,189,214,365,398],"two).":[31],"The":[32,54,87,232,252,282,382],"idea":[33],"is":[34,185],"implemented":[35,120],"by":[36,241,250,290],"alternating":[37],"NMOS":[38],"and":[39,43,70,80,102,117,130,154,160,279,301,313,373,396,409],"PMOS":[40],"differential":[41],"pairs":[42],"properly":[44],"introducing":[45],"current":[46],"mirrors":[47],"between":[48],"the":[49,64,74,84,123,131,143,147,157,170,181,190,218,225,245,258,287,291,328,332,342,348,352,366,369,386,399,402,406,415,419],"adjacent":[50],"levels":[51],"of":[52,66,78,146,168,227,244,276,337,351,368,385,401,418],"logic.":[53],"proposed":[55,132,191,233,249],"allows":[57,205],"minimum":[59,219],"power":[60,81,144,271,277,383],"supply":[61,104,220,315],"equal":[62,150],"one":[65,226,367,400],"inverter":[69],"show":[72,139],"analytically":[73],"advantages":[75,288],"in":[76,142,166,274,335],"terms":[77,167,275,336],"speed":[79,169],"consumption":[82,145,278,384],"against":[83,257],"conventional":[85,124,229,259,333],"implementation.":[86],"has":[89,173,254,355,389],"been":[90,136,255,304,356,390],"validated":[91],"post-layout":[93],"simulations":[94],"considering":[95,306],"commercial":[97,308],"28nm":[98,309],"FD-SOI":[99,310],"CMOS":[100,311],"technology":[101,312],"voltage":[105,221,316],"as":[106,108,222,224,317,319],"low":[107,223,270,318],"0.6V.":[109,320],"particular,":[111,295,347],"OR/NOR":[112,296],"gates":[113,127,209,297,330,388],"3,":[115],"4,":[116],"5":[118],"inputs":[119],"both":[121,273],"2-inputs":[125],"implementation":[128,172,261,354,372],"(Fin2)":[129],"MF":[133,148,182,192,292,329,370,387],"have":[135,199,284,303,325],"compared.":[137],"Results":[138],"reduction":[141],"3/4,":[152,394],"2/3":[153,395],"5/8":[155,397],"for":[156,340,378,405],"OR3,":[158,407],"OR4":[159,408],"OR5":[161,410],"logic":[162,266,344,380,411],"functions":[163,412],"respectively.":[164,413],"Moreover,":[165],"Fin2":[171,260,353,403],"delay":[175,339,350],"at":[176,360],"least":[177,361],"1.4":[178,362],"worst":[179,188],"MCML,":[183,238],"but":[184],"generally":[186],"1.7":[187],"gate.":[194],"presented":[200],"implement":[207,264],"2":[215,375],"while":[216],"keeping":[217],"inverter.":[231],"methodology,":[234],"named":[235],"Multi":[236],"Folded":[237,246],"born":[239],"out":[240],"generalization":[243],"previously":[248],"authors.":[251],"compared":[256,305],"(suited":[262],"arbitrarily":[265],"function":[267],"supply)":[272],"propagation":[280,338,349],"delay.":[281],"results":[283,324],"clearly":[285],"demonstrated":[286],"provided":[289],"MCML.":[293],"3-,":[299],"4-,":[300],"5-inputs":[302],"Post":[321],"layout":[322],"simulation":[323],"shown":[326,357,391],"that":[327],"outperform":[331],"implementations":[334,404],"all":[341],"considered":[343],"functions.":[345,381],"times":[363,376],"even":[374],"other":[379],"Hence,":[414],"only":[416],"drawback":[417],"techniques":[421],"seems":[422],"due":[423],"more":[426],"complex":[427],"design":[428],"procedure.":[429]},"counts_by_year":[{"year":2025,"cited_by_count":1},{"year":2023,"cited_by_count":4},{"year":2022,"cited_by_count":1},{"year":2021,"cited_by_count":3},{"year":2020,"cited_by_count":1}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}