{"id":"https://openalex.org/W3034301158","doi":"https://doi.org/10.1109/tcsi.2020.2998911","title":"Soft Error Detection and Correction Architecture for Asynchronous Bundled Data Designs","display_name":"Soft Error Detection and Correction Architecture for Asynchronous Bundled Data Designs","publication_year":2020,"publication_date":"2020-06-09","ids":{"openalex":"https://openalex.org/W3034301158","doi":"https://doi.org/10.1109/tcsi.2020.2998911","mag":"3034301158"},"language":"en","primary_location":{"id":"doi:10.1109/tcsi.2020.2998911","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tcsi.2020.2998911","pdf_url":null,"source":{"id":"https://openalex.org/S116977442","display_name":"IEEE Transactions on Circuits and Systems I Regular Papers","issn_l":"1549-8328","issn":["1549-8328","1558-0806"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Circuits and Systems I: Regular Papers","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5007948704","display_name":"Felipe A. Kuentzer","orcid":"https://orcid.org/0000-0003-3177-372X"},"institutions":[{"id":"https://openalex.org/I176453806","display_name":"University of Potsdam","ror":"https://ror.org/03bnmw459","country_code":"DE","type":"education","lineage":["https://openalex.org/I176453806"]},{"id":"https://openalex.org/I92894754","display_name":"Leibniz Institute for High Performance Microelectronics","ror":"https://ror.org/0489gab80","country_code":"DE","type":"facility","lineage":["https://openalex.org/I315704651","https://openalex.org/I92894754"]}],"countries":["DE"],"is_corresponding":true,"raw_author_name":"Felipe A. Kuentzer","raw_affiliation_strings":["Leibniz-Institut f\u00fcr Innovative Mikroelektronik (IHP), Frankfurt, Germany","University of Potsdam, Potsdam, Germany"],"affiliations":[{"raw_affiliation_string":"Leibniz-Institut f\u00fcr Innovative Mikroelektronik (IHP), Frankfurt, Germany","institution_ids":["https://openalex.org/I92894754"]},{"raw_affiliation_string":"University of Potsdam, Potsdam, Germany","institution_ids":["https://openalex.org/I176453806"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5004959402","display_name":"Milo\u0161 Krsti\u0107","orcid":"https://orcid.org/0000-0003-0267-0203"},"institutions":[{"id":"https://openalex.org/I176453806","display_name":"University of Potsdam","ror":"https://ror.org/03bnmw459","country_code":"DE","type":"education","lineage":["https://openalex.org/I176453806"]},{"id":"https://openalex.org/I92894754","display_name":"Leibniz Institute for High Performance Microelectronics","ror":"https://ror.org/0489gab80","country_code":"DE","type":"facility","lineage":["https://openalex.org/I315704651","https://openalex.org/I92894754"]}],"countries":["DE"],"is_corresponding":false,"raw_author_name":"Milos Krstic","raw_affiliation_strings":["Leibniz-Institut f\u00fcr Innovative Mikroelektronik (IHP), Frankfurt, Germany","University of Potsdam, Potsdam, Germany"],"affiliations":[{"raw_affiliation_string":"Leibniz-Institut f\u00fcr Innovative Mikroelektronik (IHP), Frankfurt, Germany","institution_ids":["https://openalex.org/I92894754"]},{"raw_affiliation_string":"University of Potsdam, Potsdam, Germany","institution_ids":["https://openalex.org/I176453806"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":2,"corresponding_author_ids":["https://openalex.org/A5007948704"],"corresponding_institution_ids":["https://openalex.org/I176453806","https://openalex.org/I92894754"],"apc_list":null,"apc_paid":null,"fwci":1.245,"has_fulltext":false,"cited_by_count":14,"citation_normalized_percentile":{"value":0.79388127,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":98},"biblio":{"volume":"67","issue":"12","first_page":"4883","last_page":"4894"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11005","display_name":"Radiation Effects in Electronics","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11005","display_name":"Radiation Effects in Electronics","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10472","display_name":"Semiconductor materials and devices","score":0.998199999332428,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/asynchronous-communication","display_name":"Asynchronous communication","score":0.7408996820449829},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.7070174217224121},{"id":"https://openalex.org/keywords/combinational-logic","display_name":"Combinational logic","score":0.6990710496902466},{"id":"https://openalex.org/keywords/error-detection-and-correction","display_name":"Error detection and correction","score":0.5519372224807739},{"id":"https://openalex.org/keywords/fault-detection-and-isolation","display_name":"Fault detection and isolation","score":0.5301205515861511},{"id":"https://openalex.org/keywords/sequential-logic","display_name":"Sequential logic","score":0.503368079662323},{"id":"https://openalex.org/keywords/adder","display_name":"Adder","score":0.49936842918395996},{"id":"https://openalex.org/keywords/asynchronous-circuit","display_name":"Asynchronous circuit","score":0.4781568944454193},{"id":"https://openalex.org/keywords/soft-error","display_name":"Soft error","score":0.4406740069389343},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.4024159610271454},{"id":"https://openalex.org/keywords/logic-gate","display_name":"Logic gate","score":0.3893880248069763},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.33440452814102173},{"id":"https://openalex.org/keywords/real-time-computing","display_name":"Real-time computing","score":0.3258236050605774},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.31578338146209717},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.1835944652557373},{"id":"https://openalex.org/keywords/synchronous-circuit","display_name":"Synchronous circuit","score":0.08716371655464172}],"concepts":[{"id":"https://openalex.org/C151319957","wikidata":"https://www.wikidata.org/wiki/Q752739","display_name":"Asynchronous communication","level":2,"score":0.7408996820449829},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7070174217224121},{"id":"https://openalex.org/C81409106","wikidata":"https://www.wikidata.org/wiki/Q76505","display_name":"Combinational logic","level":3,"score":0.6990710496902466},{"id":"https://openalex.org/C103088060","wikidata":"https://www.wikidata.org/wiki/Q1062839","display_name":"Error detection and correction","level":2,"score":0.5519372224807739},{"id":"https://openalex.org/C152745839","wikidata":"https://www.wikidata.org/wiki/Q5438153","display_name":"Fault detection and isolation","level":3,"score":0.5301205515861511},{"id":"https://openalex.org/C187075797","wikidata":"https://www.wikidata.org/wiki/Q173245","display_name":"Sequential logic","level":3,"score":0.503368079662323},{"id":"https://openalex.org/C164620267","wikidata":"https://www.wikidata.org/wiki/Q376953","display_name":"Adder","level":3,"score":0.49936842918395996},{"id":"https://openalex.org/C87695204","wikidata":"https://www.wikidata.org/wiki/Q629971","display_name":"Asynchronous circuit","level":5,"score":0.4781568944454193},{"id":"https://openalex.org/C154474529","wikidata":"https://www.wikidata.org/wiki/Q1658917","display_name":"Soft error","level":2,"score":0.4406740069389343},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.4024159610271454},{"id":"https://openalex.org/C131017901","wikidata":"https://www.wikidata.org/wiki/Q170451","display_name":"Logic gate","level":2,"score":0.3893880248069763},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.33440452814102173},{"id":"https://openalex.org/C79403827","wikidata":"https://www.wikidata.org/wiki/Q3988","display_name":"Real-time computing","level":1,"score":0.3258236050605774},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.31578338146209717},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.1835944652557373},{"id":"https://openalex.org/C42196554","wikidata":"https://www.wikidata.org/wiki/Q1186179","display_name":"Synchronous circuit","level":4,"score":0.08716371655464172},{"id":"https://openalex.org/C137059387","wikidata":"https://www.wikidata.org/wiki/Q426882","display_name":"Clock signal","level":3,"score":0.0},{"id":"https://openalex.org/C154945302","wikidata":"https://www.wikidata.org/wiki/Q11660","display_name":"Artificial intelligence","level":1,"score":0.0},{"id":"https://openalex.org/C134652429","wikidata":"https://www.wikidata.org/wiki/Q1052698","display_name":"Jitter","level":2,"score":0.0},{"id":"https://openalex.org/C31258907","wikidata":"https://www.wikidata.org/wiki/Q1301371","display_name":"Computer network","level":1,"score":0.0},{"id":"https://openalex.org/C82876162","wikidata":"https://www.wikidata.org/wiki/Q17096504","display_name":"Latency (audio)","level":2,"score":0.0},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.0},{"id":"https://openalex.org/C172707124","wikidata":"https://www.wikidata.org/wiki/Q423488","display_name":"Actuator","level":2,"score":0.0}],"mesh":[],"locations_count":2,"locations":[{"id":"doi:10.1109/tcsi.2020.2998911","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tcsi.2020.2998911","pdf_url":null,"source":{"id":"https://openalex.org/S116977442","display_name":"IEEE Transactions on Circuits and Systems I Regular Papers","issn_l":"1549-8328","issn":["1549-8328","1558-0806"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Circuits and Systems I: Regular Papers","raw_type":"journal-article"},{"id":"pmh:oai:kobv.de-opus4-uni-potsdam:58624","is_oa":false,"landing_page_url":"https://publishup.uni-potsdam.de/frontdoor/index/index/docId/58624","pdf_url":null,"source":{"id":"https://openalex.org/S4306400594","display_name":"publish.UP (University of Potsdam)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/I176453806","host_organization_name":"University of Potsdam","host_organization_lineage":["https://openalex.org/I176453806"],"host_organization_lineage_names":[],"type":"repository"},"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":null,"raw_type":"doc-type:article"}],"best_oa_location":null,"sustainable_development_goals":[{"id":"https://metadata.un.org/sdg/7","score":0.9100000262260437,"display_name":"Affordable and clean energy"}],"awards":[{"id":"https://openalex.org/G1057363166","display_name":null,"funder_award_id":"KR 4346/2-1","funder_id":"https://openalex.org/F4320320879","funder_display_name":"Deutsche Forschungsgemeinschaft"}],"funders":[{"id":"https://openalex.org/F4320320879","display_name":"Deutsche Forschungsgemeinschaft","ror":"https://ror.org/018mejw64"}],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":41,"referenced_works":["https://openalex.org/W586368724","https://openalex.org/W654435050","https://openalex.org/W1527084955","https://openalex.org/W1546526482","https://openalex.org/W2025340565","https://openalex.org/W2033045135","https://openalex.org/W2061566868","https://openalex.org/W2071068906","https://openalex.org/W2071429830","https://openalex.org/W2092870227","https://openalex.org/W2104677471","https://openalex.org/W2121865804","https://openalex.org/W2122335215","https://openalex.org/W2122995125","https://openalex.org/W2131558934","https://openalex.org/W2132529273","https://openalex.org/W2134833496","https://openalex.org/W2137541450","https://openalex.org/W2147504603","https://openalex.org/W2148327955","https://openalex.org/W2150314175","https://openalex.org/W2151802820","https://openalex.org/W2151830106","https://openalex.org/W2153953229","https://openalex.org/W2157599364","https://openalex.org/W2160639967","https://openalex.org/W2161033118","https://openalex.org/W2162318113","https://openalex.org/W2163094833","https://openalex.org/W2193563574","https://openalex.org/W2489355962","https://openalex.org/W2579875234","https://openalex.org/W2736708202","https://openalex.org/W2767796712","https://openalex.org/W2998784970","https://openalex.org/W3082782712","https://openalex.org/W3104812533","https://openalex.org/W3148632407","https://openalex.org/W4236432903","https://openalex.org/W4299639710","https://openalex.org/W6665820594"],"related_works":["https://openalex.org/W2531550288","https://openalex.org/W2358223609","https://openalex.org/W2149041233","https://openalex.org/W2171347834","https://openalex.org/W2066042903","https://openalex.org/W3040935927","https://openalex.org/W2518564956","https://openalex.org/W1592424226","https://openalex.org/W2166402441","https://openalex.org/W2090956884"],"abstract_inverted_index":{"In":[0],"this":[1,81],"paper,":[2],"an":[3,53],"asynchronous":[4,45],"design":[5,33,47],"for":[6,58,66,143],"soft":[7],"error":[8,146],"detection":[9,78],"and":[10,14,28,63,94,109,132,137,158,186],"correction":[11],"in":[12],"combinational":[13,61],"sequential":[15,69],"circuits":[16],"is":[17,22],"presented.":[18],"The":[19,49,71,102],"proposed":[20],"architecture":[21,104],"called":[23],"Asynchronous":[24],"Full":[25,89],"Error":[26,54],"Detection":[27,55],"Correction":[29],"(AFEDC).":[30],"A":[31],"custom":[32],"flow":[34],"with":[35,91,98],"integrated":[36],"commercial":[37],"EDA":[38],"tools":[39],"generates":[40],"the":[41,44,60,68,88,95,119,130,145,167,176],"AFEDC":[42,50,103,168],"using":[43,76],"bundled-data":[46],"style.":[48],"relies":[51],"on":[52],"Circuit":[56],"(EDC)":[57],"protecting":[59,67],"logic":[62],"fault-tolerant":[64],"latches":[65],"logic.":[70],"EDC":[72],"can":[73,105,124,191],"be":[74,192],"implemented":[75],"different":[77],"methods.":[79],"For":[80],"work,":[82],"two":[83],"boundary":[84],"variants":[85],"are":[86,152],"considered,":[87],"Duplication":[90,97],"Comparison":[92],"(FDC)":[93],"Partial":[96],"Parity":[99],"Prediction":[100],"(PDPP).":[101],"handle":[106],"single":[107],"events":[108],"timing":[110],"faults":[111],"of":[112,129],"arbitrarily":[113],"long":[114],"duration":[115],"as":[116,118],"well":[117],"synchronous":[120,135],"FEDC,":[121],"but":[122],"additionally":[123],"address":[125],"known":[126],"metastability":[127],"issues":[128],"FEDC":[131,177],"other":[133],"similar":[134],"architectures":[136],"provide":[138],"a":[139,154,159],"more":[140],"practical":[141],"solution":[142],"handling":[144],"recovery":[147],"process.":[148],"Two":[149],"case":[150],"studies":[151],"developed,":[153],"carry":[155],"look-ahead":[156],"adder":[157],"pipelined":[160],"non-restoring":[161],"array":[162],"divider.":[163],"Results":[164],"show":[165],"that":[166],"provides":[169],"equivalent":[170],"fault":[171],"coverage":[172],"when":[173],"compared":[174],"to":[175,184,194],"while":[178],"reducing":[179],"area,":[180],"ranging":[181],"from":[182],"9.6%":[183],"17.6%,":[185],"increasing":[187],"energy":[188],"efficiency,":[189],"which":[190],"up":[193],"6.5%.":[195]},"counts_by_year":[{"year":2024,"cited_by_count":2},{"year":2023,"cited_by_count":5},{"year":2022,"cited_by_count":3},{"year":2021,"cited_by_count":3},{"year":2020,"cited_by_count":1}],"updated_date":"2026-03-27T05:58:40.876381","created_date":"2025-10-10T00:00:00"}