{"id":"https://openalex.org/W2894968500","doi":"https://doi.org/10.1109/tcsi.2019.2902475","title":"Practical Implementation of Memristor-Based Threshold Logic Gates","display_name":"Practical Implementation of Memristor-Based Threshold Logic Gates","publication_year":2019,"publication_date":"2019-03-22","ids":{"openalex":"https://openalex.org/W2894968500","doi":"https://doi.org/10.1109/tcsi.2019.2902475","mag":"2894968500"},"language":"en","primary_location":{"id":"doi:10.1109/tcsi.2019.2902475","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tcsi.2019.2902475","pdf_url":null,"source":{"id":"https://openalex.org/S116977442","display_name":"IEEE Transactions on Circuits and Systems I Regular Papers","issn_l":"1549-8328","issn":["1549-8328","1558-0806"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Circuits and Systems I: Regular Papers","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":true,"oa_status":"green","oa_url":"https://eprints.soton.ac.uk/431451/1/Practical_Implementation_of_Memristor_Based_Threshold_Logic_Gate.pdf","any_repository_has_fulltext":true},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5025252401","display_name":"Georgios Papandroulidakis","orcid":"https://orcid.org/0000-0002-9203-2557"},"institutions":[{"id":"https://openalex.org/I43439940","display_name":"University of Southampton","ror":"https://ror.org/01ryk1543","country_code":"GB","type":"education","lineage":["https://openalex.org/I43439940"]}],"countries":["GB"],"is_corresponding":false,"raw_author_name":"Georgios Papandroulidakis","raw_affiliation_strings":["Zepler Institute for Photonics and Nanoelectronics, University of Southampton, Southampton, U.K"],"raw_orcid":"https://orcid.org/0000-0002-9203-2557","affiliations":[{"raw_affiliation_string":"Zepler Institute for Photonics and Nanoelectronics, University of Southampton, Southampton, U.K","institution_ids":["https://openalex.org/I43439940"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5017301291","display_name":"Alexander Serb","orcid":"https://orcid.org/0000-0002-8034-2398"},"institutions":[{"id":"https://openalex.org/I43439940","display_name":"University of Southampton","ror":"https://ror.org/01ryk1543","country_code":"GB","type":"education","lineage":["https://openalex.org/I43439940"]}],"countries":["GB"],"is_corresponding":false,"raw_author_name":"Alexander Serb","raw_affiliation_strings":["Zepler Institute for Photonics and Nanoelectronics, University of Southampton, Southampton, U.K"],"raw_orcid":"https://orcid.org/0000-0002-8034-2398","affiliations":[{"raw_affiliation_string":"Zepler Institute for Photonics and Nanoelectronics, University of Southampton, Southampton, U.K","institution_ids":["https://openalex.org/I43439940"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5112538141","display_name":"Ali Khiat","orcid":null},"institutions":[{"id":"https://openalex.org/I43439940","display_name":"University of Southampton","ror":"https://ror.org/01ryk1543","country_code":"GB","type":"education","lineage":["https://openalex.org/I43439940"]}],"countries":["GB"],"is_corresponding":false,"raw_author_name":"Ali Khiat","raw_affiliation_strings":["Zepler Institute for Photonics and Nanoelectronics, University of Southampton, Southampton, U.K"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Zepler Institute for Photonics and Nanoelectronics, University of Southampton, Southampton, U.K","institution_ids":["https://openalex.org/I43439940"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5001556143","display_name":"Geoff V. Merrett","orcid":"https://orcid.org/0000-0003-4980-3894"},"institutions":[{"id":"https://openalex.org/I43439940","display_name":"University of Southampton","ror":"https://ror.org/01ryk1543","country_code":"GB","type":"education","lineage":["https://openalex.org/I43439940"]}],"countries":["GB"],"is_corresponding":false,"raw_author_name":"Geoff V. Merrett","raw_affiliation_strings":["School of Electronics and Computer Science, University of Southampton, Southampton, U.K"],"raw_orcid":"https://orcid.org/0000-0003-4980-3894","affiliations":[{"raw_affiliation_string":"School of Electronics and Computer Science, University of Southampton, Southampton, U.K","institution_ids":["https://openalex.org/I43439940"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5088089733","display_name":"Themis Prodromakis","orcid":"https://orcid.org/0000-0002-6267-6909"},"institutions":[{"id":"https://openalex.org/I43439940","display_name":"University of Southampton","ror":"https://ror.org/01ryk1543","country_code":"GB","type":"education","lineage":["https://openalex.org/I43439940"]}],"countries":["GB"],"is_corresponding":false,"raw_author_name":"Themis Prodromakis","raw_affiliation_strings":["Zepler Institute for Photonics and Nanoelectronics, University of Southampton, Southampton, U.K"],"raw_orcid":"https://orcid.org/0000-0002-6267-6909","affiliations":[{"raw_affiliation_string":"Zepler Institute for Photonics and Nanoelectronics, University of Southampton, Southampton, U.K","institution_ids":["https://openalex.org/I43439940"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":5,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":3.3906,"has_fulltext":true,"cited_by_count":57,"citation_normalized_percentile":{"value":0.92710521,"is_in_top_1_percent":false,"is_in_top_10_percent":true},"cited_by_percentile_year":{"min":96,"max":99},"biblio":{"volume":"66","issue":"8","first_page":"3041","last_page":"3051"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10502","display_name":"Advanced Memory and Neural Computing","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10502","display_name":"Advanced Memory and Neural Computing","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T12808","display_name":"Ferroelectric and Negative Capacitance Devices","score":0.9995999932289124,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11601","display_name":"Neuroscience and Neural Engineering","score":0.9986000061035156,"subfield":{"id":"https://openalex.org/subfields/2804","display_name":"Cellular and Molecular Neuroscience"},"field":{"id":"https://openalex.org/fields/28","display_name":"Neuroscience"},"domain":{"id":"https://openalex.org/domains/1","display_name":"Life Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/memristor","display_name":"Memristor","score":0.8879607915878296},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.7414429783821106},{"id":"https://openalex.org/keywords/resistive-random-access-memory","display_name":"Resistive random-access memory","score":0.6055612564086914},{"id":"https://openalex.org/keywords/logic-gate","display_name":"Logic gate","score":0.5323192477226257},{"id":"https://openalex.org/keywords/in-memory-processing","display_name":"In-Memory Processing","score":0.4792875647544861},{"id":"https://openalex.org/keywords/control-reconfiguration","display_name":"Control reconfiguration","score":0.4768277704715729},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.4689369201660156},{"id":"https://openalex.org/keywords/artificial-neural-network","display_name":"Artificial neural network","score":0.4311444163322449},{"id":"https://openalex.org/keywords/massively-parallel","display_name":"Massively parallel","score":0.42294588685035706},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.3471043109893799},{"id":"https://openalex.org/keywords/computer-engineering","display_name":"Computer engineering","score":0.32343751192092896},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.2448391318321228},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.23510116338729858},{"id":"https://openalex.org/keywords/artificial-intelligence","display_name":"Artificial intelligence","score":0.2108062505722046},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.15225699543952942},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.13517743349075317},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.12059983611106873},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.10970938205718994}],"concepts":[{"id":"https://openalex.org/C150072547","wikidata":"https://www.wikidata.org/wiki/Q212923","display_name":"Memristor","level":2,"score":0.8879607915878296},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7414429783821106},{"id":"https://openalex.org/C182019814","wikidata":"https://www.wikidata.org/wiki/Q1143830","display_name":"Resistive random-access memory","level":3,"score":0.6055612564086914},{"id":"https://openalex.org/C131017901","wikidata":"https://www.wikidata.org/wiki/Q170451","display_name":"Logic gate","level":2,"score":0.5323192477226257},{"id":"https://openalex.org/C123593499","wikidata":"https://www.wikidata.org/wiki/Q6008583","display_name":"In-Memory Processing","level":5,"score":0.4792875647544861},{"id":"https://openalex.org/C119701452","wikidata":"https://www.wikidata.org/wiki/Q5165881","display_name":"Control reconfiguration","level":2,"score":0.4768277704715729},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.4689369201660156},{"id":"https://openalex.org/C50644808","wikidata":"https://www.wikidata.org/wiki/Q192776","display_name":"Artificial neural network","level":2,"score":0.4311444163322449},{"id":"https://openalex.org/C190475519","wikidata":"https://www.wikidata.org/wiki/Q544384","display_name":"Massively parallel","level":2,"score":0.42294588685035706},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.3471043109893799},{"id":"https://openalex.org/C113775141","wikidata":"https://www.wikidata.org/wiki/Q428691","display_name":"Computer engineering","level":1,"score":0.32343751192092896},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.2448391318321228},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.23510116338729858},{"id":"https://openalex.org/C154945302","wikidata":"https://www.wikidata.org/wiki/Q11660","display_name":"Artificial intelligence","level":1,"score":0.2108062505722046},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.15225699543952942},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.13517743349075317},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.12059983611106873},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.10970938205718994},{"id":"https://openalex.org/C23123220","wikidata":"https://www.wikidata.org/wiki/Q816826","display_name":"Information retrieval","level":1,"score":0.0},{"id":"https://openalex.org/C97854310","wikidata":"https://www.wikidata.org/wiki/Q19541","display_name":"Search engine","level":2,"score":0.0},{"id":"https://openalex.org/C164120249","wikidata":"https://www.wikidata.org/wiki/Q995982","display_name":"Web search query","level":3,"score":0.0},{"id":"https://openalex.org/C194222762","wikidata":"https://www.wikidata.org/wiki/Q114486","display_name":"Query by Example","level":4,"score":0.0}],"mesh":[],"locations_count":2,"locations":[{"id":"doi:10.1109/tcsi.2019.2902475","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tcsi.2019.2902475","pdf_url":null,"source":{"id":"https://openalex.org/S116977442","display_name":"IEEE Transactions on Circuits and Systems I Regular Papers","issn_l":"1549-8328","issn":["1549-8328","1558-0806"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Circuits and Systems I: Regular Papers","raw_type":"journal-article"},{"id":"pmh:oai:eprints.soton.ac.uk:431451","is_oa":true,"landing_page_url":"http://doi.org/10.1109/TCSI.2019.2902475>).","pdf_url":"https://eprints.soton.ac.uk/431451/1/Practical_Implementation_of_Memristor_Based_Threshold_Logic_Gate.pdf","source":{"id":"https://openalex.org/S4306401020","display_name":"ePrints Soton (University of Southampton)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/I43439940","host_organization_name":"University of Southampton","host_organization_lineage":["https://openalex.org/I43439940"],"host_organization_lineage_names":[],"type":"repository"},"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":null,"raw_type":"PeerReviewed"}],"best_oa_location":{"id":"pmh:oai:eprints.soton.ac.uk:431451","is_oa":true,"landing_page_url":"http://doi.org/10.1109/TCSI.2019.2902475>).","pdf_url":"https://eprints.soton.ac.uk/431451/1/Practical_Implementation_of_Memristor_Based_Threshold_Logic_Gate.pdf","source":{"id":"https://openalex.org/S4306401020","display_name":"ePrints Soton (University of Southampton)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/I43439940","host_organization_name":"University of Southampton","host_organization_lineage":["https://openalex.org/I43439940"],"host_organization_lineage_names":[],"type":"repository"},"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":null,"raw_type":"PeerReviewed"},"sustainable_development_goals":[],"awards":[{"id":"https://openalex.org/G1766713921","display_name":"Reliably unreliable nanotechnologies","funder_award_id":"EP/K017829/1","funder_id":"https://openalex.org/F4320334627","funder_display_name":"Engineering and Physical Sciences Research Council"},{"id":"https://openalex.org/G6097759542","display_name":null,"funder_award_id":"EP/R024642/1","funder_id":"https://openalex.org/F4320334627","funder_display_name":"Engineering and Physical Sciences Research Council"},{"id":"https://openalex.org/G6194731286","display_name":null,"funder_award_id":"2003304","funder_id":"https://openalex.org/F4320334627","funder_display_name":"Engineering and Physical Sciences Research Council"},{"id":"https://openalex.org/G6479529614","display_name":null,"funder_award_id":"EP/K017829/1","funder_id":"https://openalex.org/F4320334627","funder_display_name":"Engineering and Physical Sciences Research Council"}],"funders":[{"id":"https://openalex.org/F4320334627","display_name":"Engineering and Physical Sciences Research Council","ror":"https://ror.org/0439y7842"}],"has_content":{"grobid_xml":false,"pdf":true},"content_urls":{"pdf":"https://content.openalex.org/works/W2894968500.pdf"},"referenced_works_count":89,"referenced_works":["https://openalex.org/W1486771952","https://openalex.org/W1489476854","https://openalex.org/W1535211977","https://openalex.org/W1536641772","https://openalex.org/W1562537717","https://openalex.org/W1598516385","https://openalex.org/W1599853812","https://openalex.org/W1662522325","https://openalex.org/W1964881180","https://openalex.org/W1969747706","https://openalex.org/W1975229527","https://openalex.org/W1995341919","https://openalex.org/W2000002573","https://openalex.org/W2001167178","https://openalex.org/W2004782555","https://openalex.org/W2013435193","https://openalex.org/W2018774711","https://openalex.org/W2043274724","https://openalex.org/W2053517716","https://openalex.org/W2061461907","https://openalex.org/W2064680883","https://openalex.org/W2066552075","https://openalex.org/W2066670907","https://openalex.org/W2074886140","https://openalex.org/W2078843962","https://openalex.org/W2083328379","https://openalex.org/W2090413838","https://openalex.org/W2092608522","https://openalex.org/W2092633783","https://openalex.org/W2096081335","https://openalex.org/W2112181056","https://openalex.org/W2126480274","https://openalex.org/W2130255742","https://openalex.org/W2151687972","https://openalex.org/W2155296713","https://openalex.org/W2160481230","https://openalex.org/W2163605009","https://openalex.org/W2165685738","https://openalex.org/W2271840356","https://openalex.org/W2336624555","https://openalex.org/W2342387592","https://openalex.org/W2345076121","https://openalex.org/W2507326620","https://openalex.org/W2511513705","https://openalex.org/W2512574110","https://openalex.org/W2529692069","https://openalex.org/W2533175001","https://openalex.org/W2544667623","https://openalex.org/W2546925628","https://openalex.org/W2560249189","https://openalex.org/W2560615381","https://openalex.org/W2585925384","https://openalex.org/W2587437692","https://openalex.org/W2595197904","https://openalex.org/W2605663629","https://openalex.org/W2609852068","https://openalex.org/W2757326298","https://openalex.org/W2765081478","https://openalex.org/W2766489088","https://openalex.org/W2769604575","https://openalex.org/W2771447466","https://openalex.org/W2773802138","https://openalex.org/W2779961690","https://openalex.org/W2781401138","https://openalex.org/W2783539394","https://openalex.org/W2796285209","https://openalex.org/W2796708821","https://openalex.org/W2799210008","https://openalex.org/W2803163155","https://openalex.org/W2805362231","https://openalex.org/W2885023808","https://openalex.org/W2888961626","https://openalex.org/W2890120122","https://openalex.org/W2900178210","https://openalex.org/W2903728255","https://openalex.org/W2951304686","https://openalex.org/W2962677196","https://openalex.org/W2963771263","https://openalex.org/W2963778543","https://openalex.org/W2996647580","https://openalex.org/W3150708839","https://openalex.org/W4241904915","https://openalex.org/W6632096829","https://openalex.org/W6672930468","https://openalex.org/W6674342563","https://openalex.org/W6684191040","https://openalex.org/W6703501897","https://openalex.org/W6733037801","https://openalex.org/W6772653018"],"related_works":["https://openalex.org/W3173413269","https://openalex.org/W3137037072","https://openalex.org/W4308870977","https://openalex.org/W3164445786","https://openalex.org/W2983750276","https://openalex.org/W2802367674","https://openalex.org/W2993390155","https://openalex.org/W2562493617","https://openalex.org/W2912892722","https://openalex.org/W2157007809"],"abstract_inverted_index":{"Current":[0],"advances":[1],"in":[2,36,182,194],"emerging":[3,29],"memory":[4],"technologies":[5],"enable":[6],"novel":[7,93],"and":[8,14,53,56,70,86,89,119,123,133,137],"unconventional":[9],"computing":[10,55],"architectures":[11],"for":[12,51,150],"high-performance":[13],"low-power":[15,68],"electronic":[16],"systems,":[17],"capable":[18],"of":[19,39,112,165,172,179],"carrying":[20],"out":[21],"massively":[22],"parallel":[23],"operations":[24],"at":[25],"the":[26,37,74,77,152,170,177],"edge.":[27],"One":[28],"technology,":[30],"ReRAM,":[31],"also":[32],"known":[33],"to":[34,47],"belong":[35],"family":[38],"memristors":[40],"(memory":[41],"resistors),":[42],"is":[43,81,102,143],"gathering":[44],"attention":[45],"due":[46],"its":[48,61,84,121],"attractive":[49],"features":[50],"logic":[52,94,99],"in-memory":[54],"benefits":[57],"which":[58],"follow":[59],"from":[60],"technological":[62],"attributes,":[63],"such":[64,96],"as":[65,97,160,176],"nanoscale":[66],"dimensions,":[67],"operation,":[69],"multi-state":[71],"programming.":[72],"At":[73],"same":[75],"time,":[76],"design":[78,122],"with":[79],"CMOS":[80],"quickly":[82],"reaching":[83],"physical":[85,110],"functional":[87],"limitations,":[88],"further":[90],"research":[91],"toward":[92,192],"families,":[95],"threshold":[98],"gates":[100],"(TLGs),":[101],"scoped.":[103],"In":[104],"this":[105],"paper,":[106],"we":[107,184],"introduce":[108],"a":[109,113,158],"implementation":[111,164],"memristor-based":[114],"current-mode":[115],"TLG":[116],"(MCMTLG)":[117],"circuit":[118],"validate":[120],"operation":[124],"through":[125],"multiple":[126],"experimental":[127],"setups.":[128],"We":[129],"demonstrate":[130],"two-input,":[131],"three-input,":[132],"four-input":[134],"MCMTLG":[135],"configurations":[136],"showcase":[138],"their":[139],"reconfiguration":[140],"capability.":[141],"This":[142],"achieved":[144],"by":[145],"varying":[146],"memristive":[147],"weights":[148,181],"arbitrarily":[149],"shaping":[151],"classification":[153],"decision":[154],"boundary,":[155],"thus":[156],"showing":[157],"promise":[159],"an":[161,193],"alternative":[162],"hardware-friendly":[163],"artificial":[166],"neural":[167],"networks.":[168],"Through":[169],"employment":[171],"real":[173],"memristor":[174],"devices":[175],"equivalent":[178],"synaptic":[180],"TLGs,":[183],"are":[185],"realizing":[186],"components":[187],"that":[188],"can":[189],"be":[190],"used":[191],"silico":[195],"classifier.":[196]},"counts_by_year":[{"year":2026,"cited_by_count":4},{"year":2025,"cited_by_count":7},{"year":2024,"cited_by_count":8},{"year":2023,"cited_by_count":10},{"year":2022,"cited_by_count":9},{"year":2021,"cited_by_count":11},{"year":2020,"cited_by_count":5},{"year":2019,"cited_by_count":3}],"updated_date":"2026-06-11T09:08:48.828518","created_date":"2018-10-12T00:00:00"}
