{"id":"https://openalex.org/W2768265037","doi":"https://doi.org/10.1109/tcsi.2017.2768330","title":"Mono3D: Open Source Cell Library for Monolithic 3-D Integrated Circuits","display_name":"Mono3D: Open Source Cell Library for Monolithic 3-D Integrated Circuits","publication_year":2017,"publication_date":"2017-11-16","ids":{"openalex":"https://openalex.org/W2768265037","doi":"https://doi.org/10.1109/tcsi.2017.2768330","mag":"2768265037"},"language":"en","primary_location":{"id":"doi:10.1109/tcsi.2017.2768330","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tcsi.2017.2768330","pdf_url":null,"source":{"id":"https://openalex.org/S116977442","display_name":"IEEE Transactions on Circuits and Systems I Regular Papers","issn_l":"1549-8328","issn":["1549-8328","1558-0806"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Circuits and Systems I: Regular Papers","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5101876004","display_name":"Chen Yan","orcid":"https://orcid.org/0000-0003-4739-3190"},"institutions":[{"id":"https://openalex.org/I59553526","display_name":"Stony Brook University","ror":"https://ror.org/05qghxh33","country_code":"US","type":"education","lineage":["https://openalex.org/I59553526"]}],"countries":["US"],"is_corresponding":true,"raw_author_name":"Chen Yan","raw_affiliation_strings":["Department of Electrical and Computer Engineering, Stony Brook University, Stony Brook, NY, USA"],"affiliations":[{"raw_affiliation_string":"Department of Electrical and Computer Engineering, Stony Brook University, Stony Brook, NY, USA","institution_ids":["https://openalex.org/I59553526"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5061262597","display_name":"Emre Salman","orcid":"https://orcid.org/0000-0001-6538-6803"},"institutions":[{"id":"https://openalex.org/I59553526","display_name":"Stony Brook University","ror":"https://ror.org/05qghxh33","country_code":"US","type":"education","lineage":["https://openalex.org/I59553526"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Emre Salman","raw_affiliation_strings":["Department of Electrical and Computer Engineering, Stony Brook University, Stony Brook, NY, USA"],"affiliations":[{"raw_affiliation_string":"Department of Electrical and Computer Engineering, Stony Brook University, Stony Brook, NY, USA","institution_ids":["https://openalex.org/I59553526"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":2,"corresponding_author_ids":["https://openalex.org/A5101876004"],"corresponding_institution_ids":["https://openalex.org/I59553526"],"apc_list":null,"apc_paid":null,"fwci":2.0068,"has_fulltext":false,"cited_by_count":60,"citation_normalized_percentile":{"value":0.87724414,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":96,"max":99},"biblio":{"volume":"65","issue":"3","first_page":"1075","last_page":"1085"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11527","display_name":"3D IC and TSV technologies","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11527","display_name":"3D IC and TSV technologies","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.9995999932289124,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.9994000196456909,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/standard-cell","display_name":"Standard cell","score":0.8020830154418945},{"id":"https://openalex.org/keywords/routing","display_name":"Routing (electronic design automation)","score":0.6458908915519714},{"id":"https://openalex.org/keywords/benchmark","display_name":"Benchmark (surveying)","score":0.5872726440429688},{"id":"https://openalex.org/keywords/integrated-circuit","display_name":"Integrated circuit","score":0.5826067924499512},{"id":"https://openalex.org/keywords/electronic-design-automation","display_name":"Electronic design automation","score":0.5545700788497925},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.5107903480529785},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.4939191937446594},{"id":"https://openalex.org/keywords/very-large-scale-integration","display_name":"Very-large-scale integration","score":0.48501917719841003},{"id":"https://openalex.org/keywords/integrated-circuit-design","display_name":"Integrated circuit design","score":0.47891175746917725},{"id":"https://openalex.org/keywords/chip","display_name":"Chip","score":0.4539766311645508},{"id":"https://openalex.org/keywords/electronic-circuit","display_name":"Electronic circuit","score":0.445709764957428},{"id":"https://openalex.org/keywords/transistor","display_name":"Transistor","score":0.43685898184776306},{"id":"https://openalex.org/keywords/physical-design","display_name":"Physical design","score":0.43191713094711304},{"id":"https://openalex.org/keywords/place-and-route","display_name":"Place and route","score":0.4192197322845459},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.3741297125816345},{"id":"https://openalex.org/keywords/circuit-design","display_name":"Circuit design","score":0.34417906403541565},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.3313954472541809},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.2999972701072693},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.10932618379592896}],"concepts":[{"id":"https://openalex.org/C78401558","wikidata":"https://www.wikidata.org/wiki/Q464496","display_name":"Standard cell","level":3,"score":0.8020830154418945},{"id":"https://openalex.org/C74172769","wikidata":"https://www.wikidata.org/wiki/Q1446839","display_name":"Routing (electronic design automation)","level":2,"score":0.6458908915519714},{"id":"https://openalex.org/C185798385","wikidata":"https://www.wikidata.org/wiki/Q1161707","display_name":"Benchmark (surveying)","level":2,"score":0.5872726440429688},{"id":"https://openalex.org/C530198007","wikidata":"https://www.wikidata.org/wiki/Q80831","display_name":"Integrated circuit","level":2,"score":0.5826067924499512},{"id":"https://openalex.org/C64260653","wikidata":"https://www.wikidata.org/wiki/Q1194864","display_name":"Electronic design automation","level":2,"score":0.5545700788497925},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.5107903480529785},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.4939191937446594},{"id":"https://openalex.org/C14580979","wikidata":"https://www.wikidata.org/wiki/Q876049","display_name":"Very-large-scale integration","level":2,"score":0.48501917719841003},{"id":"https://openalex.org/C74524168","wikidata":"https://www.wikidata.org/wiki/Q1074539","display_name":"Integrated circuit design","level":2,"score":0.47891175746917725},{"id":"https://openalex.org/C165005293","wikidata":"https://www.wikidata.org/wiki/Q1074500","display_name":"Chip","level":2,"score":0.4539766311645508},{"id":"https://openalex.org/C134146338","wikidata":"https://www.wikidata.org/wiki/Q1815901","display_name":"Electronic circuit","level":2,"score":0.445709764957428},{"id":"https://openalex.org/C172385210","wikidata":"https://www.wikidata.org/wiki/Q5339","display_name":"Transistor","level":3,"score":0.43685898184776306},{"id":"https://openalex.org/C188817802","wikidata":"https://www.wikidata.org/wiki/Q13426855","display_name":"Physical design","level":3,"score":0.43191713094711304},{"id":"https://openalex.org/C127879752","wikidata":"https://www.wikidata.org/wiki/Q3390760","display_name":"Place and route","level":3,"score":0.4192197322845459},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.3741297125816345},{"id":"https://openalex.org/C190560348","wikidata":"https://www.wikidata.org/wiki/Q3245116","display_name":"Circuit design","level":2,"score":0.34417906403541565},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.3313954472541809},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.2999972701072693},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.10932618379592896},{"id":"https://openalex.org/C13280743","wikidata":"https://www.wikidata.org/wiki/Q131089","display_name":"Geodesy","level":1,"score":0.0},{"id":"https://openalex.org/C205649164","wikidata":"https://www.wikidata.org/wiki/Q1071","display_name":"Geography","level":0,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/tcsi.2017.2768330","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tcsi.2017.2768330","pdf_url":null,"source":{"id":"https://openalex.org/S116977442","display_name":"IEEE Transactions on Circuits and Systems I Regular Papers","issn_l":"1549-8328","issn":["1549-8328","1558-0806"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Circuits and Systems I: Regular Papers","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[{"score":0.699999988079071,"id":"https://metadata.un.org/sdg/7","display_name":"Affordable and clean energy"}],"awards":[{"id":"https://openalex.org/G1720503887","display_name":null,"funder_award_id":"CCF-1253715","funder_id":"https://openalex.org/F4320306076","funder_display_name":"National Science Foundation"},{"id":"https://openalex.org/G2408844015","display_name":null,"funder_award_id":"CNS-1717306","funder_id":"https://openalex.org/F4320306076","funder_display_name":"National Science Foundation"},{"id":"https://openalex.org/G5502315392","display_name":null,"funder_award_id":"TS-2767","funder_id":"https://openalex.org/F4320306087","funder_display_name":"Semiconductor Research Corporation"},{"id":"https://openalex.org/G5840704153","display_name":null,"funder_award_id":"241210","funder_id":"https://openalex.org/F4320306164","funder_display_name":"Simons Foundation"},{"id":"https://openalex.org/G5847552831","display_name":null,"funder_award_id":"TJ-2449","funder_id":"https://openalex.org/F4320306087","funder_display_name":"Semiconductor Research Corporation"},{"id":"https://openalex.org/G6276506632","display_name":null,"funder_award_id":"CNS-1646318","funder_id":"https://openalex.org/F4320306076","funder_display_name":"National Science Foundation"}],"funders":[{"id":"https://openalex.org/F4320306076","display_name":"National Science Foundation","ror":"https://ror.org/021nxhr62"},{"id":"https://openalex.org/F4320306087","display_name":"Semiconductor Research Corporation","ror":"https://ror.org/047z4n946"},{"id":"https://openalex.org/F4320306164","display_name":"Simons Foundation","ror":"https://ror.org/01cmst727"}],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":30,"referenced_works":["https://openalex.org/W601886942","https://openalex.org/W759502517","https://openalex.org/W1751600266","https://openalex.org/W1964678809","https://openalex.org/W1972367194","https://openalex.org/W1974392394","https://openalex.org/W1981823766","https://openalex.org/W2002806561","https://openalex.org/W2024381286","https://openalex.org/W2026717319","https://openalex.org/W2040537859","https://openalex.org/W2061587924","https://openalex.org/W2067627272","https://openalex.org/W2089979174","https://openalex.org/W2092840182","https://openalex.org/W2109314689","https://openalex.org/W2129785295","https://openalex.org/W2133038247","https://openalex.org/W2149277680","https://openalex.org/W2160007566","https://openalex.org/W2161129061","https://openalex.org/W2510950183","https://openalex.org/W2525903134","https://openalex.org/W2580980708","https://openalex.org/W2752483262","https://openalex.org/W2757604236","https://openalex.org/W3140078554","https://openalex.org/W6637775719","https://openalex.org/W6725638887","https://openalex.org/W6727320238"],"related_works":["https://openalex.org/W2171793444","https://openalex.org/W2743305891","https://openalex.org/W2345938231","https://openalex.org/W3205162826","https://openalex.org/W1965232212","https://openalex.org/W2151657833","https://openalex.org/W4321510758","https://openalex.org/W1596716095","https://openalex.org/W2914234268","https://openalex.org/W2070693700"],"abstract_inverted_index":{"Monolithic":[0],"3-D":[1],"(M3-D)":[2],"integrated":[3],"circuits":[4,105],"(ICs)":[5],"provide":[6],"vertical":[7],"interconnects":[8],"with":[9,135],"comparable":[10],"size":[11],"to":[12,97,113,141],"on-chip":[13],"metal":[14],"vias,":[15],"and":[16,37,79,118,164],"therefore,":[17],"achieve":[18],"ultra-high":[19],"density":[20],"device":[21],"integration.":[22],"This":[23],"fine-grained":[24],"connectivity":[25],"enabled":[26],"by":[27,83],"monolithic":[28],"inter-tier":[29],"vias":[30],"reduces":[31],"the":[32,61,99,122,130,144,150,156,170,176],"silicon":[33],"area,":[34,162],"overall":[35],"wirelength,":[36],"power":[38,117],"consumption.":[39],"An":[40],"open":[41,91],"source":[42,92],"standard":[43,77],"cell":[44,68,78,93,131],"library":[45,69,94,132],"for":[46],"design":[47,74,86],"automation":[48,87],"of":[49,64,75,102,106,121,129,138,146,155,158,175],"large-scale":[50],"transistor-level":[51],"M3-D":[52,65,100,123,151,177],"ICs":[53,124,178],"is":[54,70,80,95,167],"developed,":[55],"thereby":[56],"facilitating":[57],"future":[58],"research":[59],"on":[60,72,161],"critical":[62],"aspects":[63],"technology.":[66],"The":[67,89,153],"based":[71],"full-custom":[73],"each":[76],"fully":[81],"characterized":[82],"using":[84],"existing":[85],"tools.":[88],"proposed":[90],"utilized":[96],"demonstrate":[98],"implementation":[101],"several":[103],"benchmark":[104],"various":[107],"sizes":[108],"ranging":[109],"from":[110],"2.7-K":[111],"gates":[112],"1.6-M":[114],"gates.":[115],"Both":[116],"timing":[119],"characteristics":[120,166,174],"are":[125,133,179],"quantified.":[126],"Several":[127],"versions":[128],"developed":[134],"different":[136],"number":[137,157],"routing":[139,147,159],"tracks":[140,160],"better":[142],"understand":[143],"issue":[145],"congestion":[148],"in":[149],"ICs.":[152],"effect":[154],"power,":[163],"delay":[165],"investigated.":[168],"Finally,":[169],"primary":[171],"clock":[172],"tree":[173],"discussed.":[180]},"counts_by_year":[{"year":2025,"cited_by_count":10},{"year":2024,"cited_by_count":10},{"year":2023,"cited_by_count":9},{"year":2022,"cited_by_count":9},{"year":2021,"cited_by_count":8},{"year":2020,"cited_by_count":5},{"year":2019,"cited_by_count":6},{"year":2018,"cited_by_count":3}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}
