{"id":"https://openalex.org/W2598095323","doi":"https://doi.org/10.1109/tcsi.2017.2681964","title":"0.9-V Class-AB Miller OTA in 0.35- $\\mu \\text{m}$ CMOS With Threshold-Lowered Non-Tailed Differential Pair","display_name":"0.9-V Class-AB Miller OTA in 0.35- $\\mu \\text{m}$ CMOS With Threshold-Lowered Non-Tailed Differential Pair","publication_year":2017,"publication_date":"2017-03-24","ids":{"openalex":"https://openalex.org/W2598095323","doi":"https://doi.org/10.1109/tcsi.2017.2681964","mag":"2598095323"},"language":"en","primary_location":{"id":"doi:10.1109/tcsi.2017.2681964","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tcsi.2017.2681964","pdf_url":null,"source":{"id":"https://openalex.org/S116977442","display_name":"IEEE Transactions on Circuits and Systems I Regular Papers","issn_l":"1549-8328","issn":["1549-8328","1558-0806"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Circuits and Systems I: Regular Papers","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5078615947","display_name":"Alfio Dario Grasso","orcid":"https://orcid.org/0000-0002-5707-9683"},"institutions":[{"id":"https://openalex.org/I39063666","display_name":"University of Catania","ror":"https://ror.org/03a64bh57","country_code":"IT","type":"education","lineage":["https://openalex.org/I39063666"]}],"countries":["IT"],"is_corresponding":false,"raw_author_name":"Alfio Dario Grasso","raw_affiliation_strings":["Dipartimento di Ingegneria Elettrica Elettronica e Informatica, University of Catania, Catania, Italy"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Dipartimento di Ingegneria Elettrica Elettronica e Informatica, University of Catania, Catania, Italy","institution_ids":["https://openalex.org/I39063666"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5004729135","display_name":"Salvatore Pennisi","orcid":"https://orcid.org/0000-0002-5803-484X"},"institutions":[{"id":"https://openalex.org/I39063666","display_name":"University of Catania","ror":"https://ror.org/03a64bh57","country_code":"IT","type":"education","lineage":["https://openalex.org/I39063666"]}],"countries":["IT"],"is_corresponding":false,"raw_author_name":"Salvatore Pennisi","raw_affiliation_strings":["Dipartimento di Ingegneria Elettrica Elettronica e Informatica, University of Catania, Catania, Italy"],"raw_orcid":"https://orcid.org/0000-0002-5803-484X","affiliations":[{"raw_affiliation_string":"Dipartimento di Ingegneria Elettrica Elettronica e Informatica, University of Catania, Catania, Italy","institution_ids":["https://openalex.org/I39063666"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5010336494","display_name":"Giuseppe Scotti","orcid":"https://orcid.org/0000-0002-5650-8212"},"institutions":[{"id":"https://openalex.org/I861853513","display_name":"Sapienza University of Rome","ror":"https://ror.org/02be6w209","country_code":"IT","type":"education","lineage":["https://openalex.org/I861853513"]}],"countries":["IT"],"is_corresponding":false,"raw_author_name":"Giuseppe Scotti","raw_affiliation_strings":["Dipartimento di Ingegneria dell\u2019Informazione, Sapienza University of Rome, Rome, Italy","Dipartimento di Ingegneria dell'Informazione, Sapienza University of Rome, Rome, Italy"],"raw_orcid":"https://orcid.org/0000-0002-5650-8212","affiliations":[{"raw_affiliation_string":"Dipartimento di Ingegneria dell\u2019Informazione, Sapienza University of Rome, Rome, Italy","institution_ids":["https://openalex.org/I861853513"]},{"raw_affiliation_string":"Dipartimento di Ingegneria dell'Informazione, Sapienza University of Rome, Rome, Italy","institution_ids":["https://openalex.org/I861853513"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5068452963","display_name":"Alessandro Trifiletti","orcid":"https://orcid.org/0000-0001-6231-4273"},"institutions":[{"id":"https://openalex.org/I861853513","display_name":"Sapienza University of Rome","ror":"https://ror.org/02be6w209","country_code":"IT","type":"education","lineage":["https://openalex.org/I861853513"]}],"countries":["IT"],"is_corresponding":false,"raw_author_name":"Alessandro Trifiletti","raw_affiliation_strings":["Dipartimento di Ingegneria dell\u2019Informazione, Sapienza University of Rome, Rome, Italy","Dipartimento di Ingegneria dell'Informazione, Sapienza University of Rome, Rome, Italy"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Dipartimento di Ingegneria dell\u2019Informazione, Sapienza University of Rome, Rome, Italy","institution_ids":["https://openalex.org/I861853513"]},{"raw_affiliation_string":"Dipartimento di Ingegneria dell'Informazione, Sapienza University of Rome, Rome, Italy","institution_ids":["https://openalex.org/I861853513"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":2,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":2.6753,"has_fulltext":false,"cited_by_count":61,"citation_normalized_percentile":{"value":0.89790831,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":96,"max":99},"biblio":{"volume":"64","issue":"7","first_page":"1740","last_page":"1747"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10558","display_name":"Advancements in Semiconductor Devices and Circuit Design","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10187","display_name":"Radio Frequency Integrated Circuit Design","score":0.9980000257492065,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/transconductance","display_name":"Transconductance","score":0.7494890689849854},{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.7089639902114868},{"id":"https://openalex.org/keywords/transistor","display_name":"Transistor","score":0.5754633545875549},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.5711820125579834},{"id":"https://openalex.org/keywords/physics","display_name":"Physics","score":0.507628321647644},{"id":"https://openalex.org/keywords/operational-transconductance-amplifier","display_name":"Operational transconductance amplifier","score":0.4896998703479767},{"id":"https://openalex.org/keywords/capacitance","display_name":"Capacitance","score":0.4752485752105713},{"id":"https://openalex.org/keywords/capacitor","display_name":"Capacitor","score":0.4304760694503784},{"id":"https://openalex.org/keywords/operational-amplifier","display_name":"Operational amplifier","score":0.3901985287666321},{"id":"https://openalex.org/keywords/amplifier","display_name":"Amplifier","score":0.386663019657135},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.3698750436306},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.3404781222343445},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.3343043327331543},{"id":"https://openalex.org/keywords/topology","display_name":"Topology (electrical circuits)","score":0.32857149839401245},{"id":"https://openalex.org/keywords/optoelectronics","display_name":"Optoelectronics","score":0.26364126801490784},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.17538753151893616}],"concepts":[{"id":"https://openalex.org/C2779283907","wikidata":"https://www.wikidata.org/wiki/Q1632964","display_name":"Transconductance","level":4,"score":0.7494890689849854},{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.7089639902114868},{"id":"https://openalex.org/C172385210","wikidata":"https://www.wikidata.org/wiki/Q5339","display_name":"Transistor","level":3,"score":0.5754633545875549},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.5711820125579834},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.507628321647644},{"id":"https://openalex.org/C58117264","wikidata":"https://www.wikidata.org/wiki/Q1239595","display_name":"Operational transconductance amplifier","level":5,"score":0.4896998703479767},{"id":"https://openalex.org/C30066665","wikidata":"https://www.wikidata.org/wiki/Q164399","display_name":"Capacitance","level":3,"score":0.4752485752105713},{"id":"https://openalex.org/C52192207","wikidata":"https://www.wikidata.org/wiki/Q5322","display_name":"Capacitor","level":3,"score":0.4304760694503784},{"id":"https://openalex.org/C145366948","wikidata":"https://www.wikidata.org/wiki/Q178947","display_name":"Operational amplifier","level":4,"score":0.3901985287666321},{"id":"https://openalex.org/C194257627","wikidata":"https://www.wikidata.org/wiki/Q211554","display_name":"Amplifier","level":3,"score":0.386663019657135},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.3698750436306},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.3404781222343445},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.3343043327331543},{"id":"https://openalex.org/C184720557","wikidata":"https://www.wikidata.org/wiki/Q7825049","display_name":"Topology (electrical circuits)","level":2,"score":0.32857149839401245},{"id":"https://openalex.org/C49040817","wikidata":"https://www.wikidata.org/wiki/Q193091","display_name":"Optoelectronics","level":1,"score":0.26364126801490784},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.17538753151893616},{"id":"https://openalex.org/C62520636","wikidata":"https://www.wikidata.org/wiki/Q944","display_name":"Quantum mechanics","level":1,"score":0.0},{"id":"https://openalex.org/C17525397","wikidata":"https://www.wikidata.org/wiki/Q176140","display_name":"Electrode","level":2,"score":0.0}],"mesh":[],"locations_count":2,"locations":[{"id":"doi:10.1109/tcsi.2017.2681964","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tcsi.2017.2681964","pdf_url":null,"source":{"id":"https://openalex.org/S116977442","display_name":"IEEE Transactions on Circuits and Systems I Regular Papers","issn_l":"1549-8328","issn":["1549-8328","1558-0806"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Circuits and Systems I: Regular Papers","raw_type":"journal-article"},{"id":"pmh:oai:iris.uniroma1.it:11573/945903","is_oa":false,"landing_page_url":"http://ieeexplore.ieee.org/document/7885571/","pdf_url":null,"source":{"id":"https://openalex.org/S4377196107","display_name":"IRIS Research product catalog (Sapienza University of Rome)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":null,"host_organization_name":null,"host_organization_lineage":[],"host_organization_lineage_names":[],"type":"repository"},"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":null,"raw_type":"info:eu-repo/semantics/article"}],"best_oa_location":null,"sustainable_development_goals":[{"display_name":"Affordable and clean energy","score":0.6399999856948853,"id":"https://metadata.un.org/sdg/7"}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":27,"referenced_works":["https://openalex.org/W1576972161","https://openalex.org/W1669637212","https://openalex.org/W1979902309","https://openalex.org/W1985987051","https://openalex.org/W2007884330","https://openalex.org/W2035061364","https://openalex.org/W2036779818","https://openalex.org/W2059555657","https://openalex.org/W2067097483","https://openalex.org/W2080615209","https://openalex.org/W2095685157","https://openalex.org/W2096668447","https://openalex.org/W2101809138","https://openalex.org/W2102580073","https://openalex.org/W2111636845","https://openalex.org/W2114254364","https://openalex.org/W2127142182","https://openalex.org/W2131189523","https://openalex.org/W2133644852","https://openalex.org/W2155190990","https://openalex.org/W2157637127","https://openalex.org/W2159318368","https://openalex.org/W2160509435","https://openalex.org/W2170862407","https://openalex.org/W2238998484","https://openalex.org/W2508660439","https://openalex.org/W4241762854"],"related_works":["https://openalex.org/W2043399940","https://openalex.org/W2110276082","https://openalex.org/W2181698386","https://openalex.org/W626395135","https://openalex.org/W2131269528","https://openalex.org/W2370779270","https://openalex.org/W2093515901","https://openalex.org/W3182671744","https://openalex.org/W969526214","https://openalex.org/W2050054227"],"abstract_inverted_index":{"This":[0],"paper":[1],"presents":[2],"a":[3,58,116,128,159],"CMOS":[4],"operational":[5],"transconductance":[6],"amplifier":[7],"(OTA),":[8],"suitable":[9,110],"for":[10,111,158],"sub-1-V":[11],"supply":[12],"applications,":[13],"whose":[14],"(input)":[15],"common-mode":[16,60],"voltage":[17,44],"can":[18],"be":[19],"set":[20],"to":[21,33,38,74],"(V":[22],"<sub":[23,28],"xmlns:mml=\"http://www.w3.org/1998/Math/MathML\"":[24,29],"xmlns:xlink=\"http://www.w3.org/1999/xlink\">DD</sub>":[25],"+":[26],"V":[27],"xmlns:xlink=\"http://www.w3.org/1999/xlink\">SS</sub>":[30],")/2":[31],"thanks":[32],"two":[34],"combined":[35],"techniques":[36,54],"applied":[37],"the":[39,49,65,70,81,87],"differential":[40],"pair,":[41],"namely,":[42],"threshold":[43,124],"lowering":[45],"and":[46,90,106,137,143,150],"elimination":[47],"of":[48,69,101,156,162],"tail":[50],"current":[51],"generator.":[52],"Both":[53],"are":[55,108],"implemented":[56],"through":[57],"single":[59],"feedback":[61],"loop,":[62],"which":[63],"embeds":[64],"shared":[66],"bulk":[67,79],"terminal":[68],"pair.":[71],"In":[72],"contrast":[73],"other":[75],"low-voltage":[76],"approaches":[77],"employing":[78],"driving,":[80],"proposed":[82],"OTA":[83,130],"is":[84],"driven":[85],"from":[86],"gate":[88],"terminals":[89],"exploits":[91],"only":[92],"MOS":[93,122],"transistors":[94,123],"in":[95],"strong":[96],"inversion.":[97],"Therefore,":[98],"effective":[99],"values":[100],"dc":[102],"gain,":[103],"gain":[104,142,145],"bandwidth,":[105],"noise":[107],"found,":[109],"high-accuracy":[112],"switched-capacitor":[113],"applications.":[114],"Using":[115],"standard":[117],"0.35-\u03bcm":[118],"technology":[119],"with":[120,131,153],"nominal":[121],"around":[125],"0.7":[126],"V,":[127],"0.9-V":[129],"0.45-V":[132],"analog":[133],"ground":[134],"was":[135],"designed":[136],"successfully":[138],"tested.":[139],"The":[140],"measured":[141],"unity":[144],"frequency":[146],"were":[147],"65":[148],"dB":[149],"1":[151],"MHz":[152],"phase":[154],"margin":[155],"60\u00b0":[157],"capacitive":[160],"load":[161],"10":[163],"pF.":[164]},"counts_by_year":[{"year":2025,"cited_by_count":3},{"year":2024,"cited_by_count":7},{"year":2023,"cited_by_count":11},{"year":2022,"cited_by_count":5},{"year":2021,"cited_by_count":14},{"year":2020,"cited_by_count":6},{"year":2019,"cited_by_count":10},{"year":2018,"cited_by_count":5}],"updated_date":"2026-03-27T05:58:40.876381","created_date":"2017-04-07T00:00:00"}
