{"id":"https://openalex.org/W2588325739","doi":"https://doi.org/10.1109/tcsi.2017.2654451","title":"48-Mode Reconfigurable Design of SDF FFT Hardware Architecture Using Radix-3<sup>2</sup> and Radix-2<sup>3</sup> Design Approaches","display_name":"48-Mode Reconfigurable Design of SDF FFT Hardware Architecture Using Radix-3<sup>2</sup> and Radix-2<sup>3</sup> Design Approaches","publication_year":2017,"publication_date":"2017-02-14","ids":{"openalex":"https://openalex.org/W2588325739","doi":"https://doi.org/10.1109/tcsi.2017.2654451","mag":"2588325739"},"language":"en","primary_location":{"id":"doi:10.1109/tcsi.2017.2654451","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tcsi.2017.2654451","pdf_url":null,"source":{"id":"https://openalex.org/S116977442","display_name":"IEEE Transactions on Circuits and Systems I Regular Papers","issn_l":"1549-8328","issn":["1549-8328","1558-0806"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Circuits and Systems I: Regular Papers","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5059414366","display_name":"Xin-Yu Shih","orcid":"https://orcid.org/0000-0002-9045-5847"},"institutions":[{"id":"https://openalex.org/I142974352","display_name":"National Sun Yat-sen University","ror":"https://ror.org/00mjawt10","country_code":"TW","type":"education","lineage":["https://openalex.org/I142974352"]},{"id":"https://openalex.org/I4210148979","display_name":"MediaTek (Taiwan)","ror":"https://ror.org/05g9jck81","country_code":"TW","type":"company","lineage":["https://openalex.org/I4210148979"]}],"countries":["TW"],"is_corresponding":false,"raw_author_name":"Xin-Yu Shih","raw_affiliation_strings":["Department of Electrical Engineering, National Sun Yat-sen University, Kaohsiung, Taiwan","Mediatek, Hsinchu, Taiwan"],"raw_orcid":"https://orcid.org/0000-0002-9045-5847","affiliations":[{"raw_affiliation_string":"Department of Electrical Engineering, National Sun Yat-sen University, Kaohsiung, Taiwan","institution_ids":["https://openalex.org/I142974352"]},{"raw_affiliation_string":"Mediatek, Hsinchu, Taiwan","institution_ids":["https://openalex.org/I4210148979"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5084273174","display_name":"Yue-Qu Liu","orcid":null},"institutions":[{"id":"https://openalex.org/I142974352","display_name":"National Sun Yat-sen University","ror":"https://ror.org/00mjawt10","country_code":"TW","type":"education","lineage":["https://openalex.org/I142974352"]}],"countries":["TW"],"is_corresponding":false,"raw_author_name":"Yue-Qu Liu","raw_affiliation_strings":["National Sun Yat-sen University, Kaohsiung, Taiwan"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"National Sun Yat-sen University, Kaohsiung, Taiwan","institution_ids":["https://openalex.org/I142974352"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5089891946","display_name":"Hong-Ru Chou","orcid":null},"institutions":[{"id":"https://openalex.org/I142974352","display_name":"National Sun Yat-sen University","ror":"https://ror.org/00mjawt10","country_code":"TW","type":"education","lineage":["https://openalex.org/I142974352"]}],"countries":["TW"],"is_corresponding":false,"raw_author_name":"Hong-Ru Chou","raw_affiliation_strings":["National Sun Yat-sen University, Kaohsiung, Taiwan"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"National Sun Yat-sen University, Kaohsiung, Taiwan","institution_ids":["https://openalex.org/I142974352"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":2,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":2.2839,"has_fulltext":false,"cited_by_count":27,"citation_normalized_percentile":{"value":0.88054955,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":98},"biblio":{"volume":"64","issue":"6","first_page":"1456","last_page":"1467"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11034","display_name":"Digital Filter Design and Implementation","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/1711","display_name":"Signal Processing"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11034","display_name":"Digital Filter Design and Implementation","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/1711","display_name":"Signal Processing"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":0.9979000091552734,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11417","display_name":"Advancements in PLL and VCO Technologies","score":0.9958999752998352,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/fast-fourier-transform","display_name":"Fast Fourier transform","score":0.7943681478500366},{"id":"https://openalex.org/keywords/twiddle-factor","display_name":"Twiddle factor","score":0.6518802642822266},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.599704921245575},{"id":"https://openalex.org/keywords/radix","display_name":"Radix (gastropod)","score":0.5673009157180786},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.4821169376373291},{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.4767747223377228},{"id":"https://openalex.org/keywords/split-radix-fft-algorithm","display_name":"Split-radix FFT algorithm","score":0.47632914781570435},{"id":"https://openalex.org/keywords/integrated-circuit-design","display_name":"Integrated circuit design","score":0.4175349473953247},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.3567722737789154},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.3049944341182709},{"id":"https://openalex.org/keywords/mathematics","display_name":"Mathematics","score":0.21105045080184937},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.2069796621799469},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.20307573676109314},{"id":"https://openalex.org/keywords/fourier-transform","display_name":"Fourier transform","score":0.14460772275924683},{"id":"https://openalex.org/keywords/fourier-analysis","display_name":"Fourier analysis","score":0.10799908638000488}],"concepts":[{"id":"https://openalex.org/C75172450","wikidata":"https://www.wikidata.org/wiki/Q623950","display_name":"Fast Fourier transform","level":2,"score":0.7943681478500366},{"id":"https://openalex.org/C4697666","wikidata":"https://www.wikidata.org/wiki/Q7857913","display_name":"Twiddle factor","level":5,"score":0.6518802642822266},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.599704921245575},{"id":"https://openalex.org/C2779091547","wikidata":"https://www.wikidata.org/wiki/Q287565","display_name":"Radix (gastropod)","level":2,"score":0.5673009157180786},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.4821169376373291},{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.4767747223377228},{"id":"https://openalex.org/C103755468","wikidata":"https://www.wikidata.org/wiki/Q17103599","display_name":"Split-radix FFT algorithm","level":5,"score":0.47632914781570435},{"id":"https://openalex.org/C74524168","wikidata":"https://www.wikidata.org/wiki/Q1074539","display_name":"Integrated circuit design","level":2,"score":0.4175349473953247},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.3567722737789154},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.3049944341182709},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.21105045080184937},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.2069796621799469},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.20307573676109314},{"id":"https://openalex.org/C102519508","wikidata":"https://www.wikidata.org/wiki/Q6520159","display_name":"Fourier transform","level":2,"score":0.14460772275924683},{"id":"https://openalex.org/C203024314","wikidata":"https://www.wikidata.org/wiki/Q1365258","display_name":"Fourier analysis","level":3,"score":0.10799908638000488},{"id":"https://openalex.org/C59822182","wikidata":"https://www.wikidata.org/wiki/Q441","display_name":"Botany","level":1,"score":0.0},{"id":"https://openalex.org/C166386157","wikidata":"https://www.wikidata.org/wiki/Q1477735","display_name":"Short-time Fourier transform","level":4,"score":0.0},{"id":"https://openalex.org/C86803240","wikidata":"https://www.wikidata.org/wiki/Q420","display_name":"Biology","level":0,"score":0.0},{"id":"https://openalex.org/C134306372","wikidata":"https://www.wikidata.org/wiki/Q7754","display_name":"Mathematical analysis","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/tcsi.2017.2654451","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tcsi.2017.2654451","pdf_url":null,"source":{"id":"https://openalex.org/S116977442","display_name":"IEEE Transactions on Circuits and Systems I Regular Papers","issn_l":"1549-8328","issn":["1549-8328","1558-0806"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Circuits and Systems I: Regular Papers","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":41,"referenced_works":["https://openalex.org/W1567244673","https://openalex.org/W1923763959","https://openalex.org/W1965101604","https://openalex.org/W1973109866","https://openalex.org/W1975210673","https://openalex.org/W1978737053","https://openalex.org/W1996454207","https://openalex.org/W1996844745","https://openalex.org/W1996890064","https://openalex.org/W1999458318","https://openalex.org/W2011596161","https://openalex.org/W2017578039","https://openalex.org/W2025847799","https://openalex.org/W2046938074","https://openalex.org/W2055134676","https://openalex.org/W2063731653","https://openalex.org/W2071803667","https://openalex.org/W2082643061","https://openalex.org/W2105476319","https://openalex.org/W2107664197","https://openalex.org/W2110846246","https://openalex.org/W2116465952","https://openalex.org/W2128474874","https://openalex.org/W2135440536","https://openalex.org/W2144806327","https://openalex.org/W2144895495","https://openalex.org/W2148951605","https://openalex.org/W2155673026","https://openalex.org/W2156689656","https://openalex.org/W2171989929","https://openalex.org/W2336946788","https://openalex.org/W2340658346","https://openalex.org/W2403887648","https://openalex.org/W2534948908","https://openalex.org/W2545684280","https://openalex.org/W6640355072","https://openalex.org/W6656891329","https://openalex.org/W6670998728","https://openalex.org/W6681045436","https://openalex.org/W6713462594","https://openalex.org/W6728192890"],"related_works":["https://openalex.org/W2031343199","https://openalex.org/W1984254719","https://openalex.org/W4229456379","https://openalex.org/W2351401773","https://openalex.org/W2149121524","https://openalex.org/W2151986570","https://openalex.org/W2371538653","https://openalex.org/W2958343630","https://openalex.org/W2375508047","https://openalex.org/W2547585993"],"abstract_inverted_index":{"In":[0,59,85],"this":[1],"paper,":[2],"we":[3,33],"propose":[4],"a":[5,14,60,99],"reconfigurable":[6],"(RC)":[7],"fast":[8],"Fourier":[9],"transform":[10],"(FFT)":[11],"design":[12,16,20,37,96,120],"in":[13,82,122],"systematic":[15,44],"scheme.":[17],"The":[18],"RC":[19,41,73],"bricks":[21],"are":[22],"mainly":[23],"proposed":[24],"to":[25,28,54,67],"arbitrarily":[26],"concatenate":[27],"support":[29,65],"FFT-point":[30,69],"required.":[31],"Meanwhile,":[32],"show":[34],"three":[35],"developed":[36],"techniques,":[38],"including":[39],"six-type":[40],"processing":[42],"element,":[43],"first-in":[45],"first-out":[46],"reuse":[47],"arrangement,":[48],"and":[49,71,127],"section-based":[50],"twiddle":[51],"factor":[52],"generator":[53],"elaborate":[55],"our":[56,95],"FFT":[57],"design.":[58],"design/implementation":[61],"example,":[62],"it":[63],"can":[64],"up":[66],"2187":[68],"manipulation":[70],"48":[72],"modes.":[74],"It":[75],"also":[76,117],"supports":[77],"32":[78],"operating":[79],"modes":[80],"defined":[81],"3GPP-LTE":[83],"standard.":[84],"application-specified":[86],"integrated":[87],"circuit":[88],"implementation":[89],"with":[90],"TSMC":[91],"90-nm":[92],"CMOS":[93],"technology,":[94],"work":[97],"occupies":[98],"core":[100],"area":[101],"of":[102,112,124],"1.664":[103],"mm2and":[104],"consumes":[105],"35.2":[106],"mW":[107],"under":[108],"maximal":[109],"clock":[110],"frequency":[111],"188.67":[113],"MHz.":[114],"This":[115],"paper":[116],"has":[118],"outstanding":[119],"performance":[121],"terms":[123],"speed-area":[125],"ratio":[126,129],"power-frequency":[128],"for":[130],"comparison":[131],"reference.":[132]},"counts_by_year":[{"year":2026,"cited_by_count":1},{"year":2025,"cited_by_count":2},{"year":2024,"cited_by_count":2},{"year":2023,"cited_by_count":6},{"year":2022,"cited_by_count":3},{"year":2021,"cited_by_count":1},{"year":2020,"cited_by_count":2},{"year":2019,"cited_by_count":2},{"year":2018,"cited_by_count":5},{"year":2017,"cited_by_count":3}],"updated_date":"2026-07-29T09:40:50.615796","created_date":"2025-10-10T00:00:00"}