{"id":"https://openalex.org/W2566594221","doi":"https://doi.org/10.1109/tcsi.2016.2638542","title":"Circuit Designs of High-Performance and Low-Power RRAM-Based Multiplexers Based on 4T(ransistor)1R(RAM) Programming Structure","display_name":"Circuit Designs of High-Performance and Low-Power RRAM-Based Multiplexers Based on 4T(ransistor)1R(RAM) Programming Structure","publication_year":2016,"publication_date":"2016-12-24","ids":{"openalex":"https://openalex.org/W2566594221","doi":"https://doi.org/10.1109/tcsi.2016.2638542","mag":"2566594221"},"language":"en","primary_location":{"id":"doi:10.1109/tcsi.2016.2638542","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tcsi.2016.2638542","pdf_url":null,"source":{"id":"https://openalex.org/S116977442","display_name":"IEEE Transactions on Circuits and Systems I Regular Papers","issn_l":"1549-8328","issn":["1549-8328","1558-0806"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Circuits and Systems I: Regular Papers","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":true,"oa_status":"green","oa_url":"http://infoscience.epfl.ch/record/224322","any_repository_has_fulltext":true},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5103004961","display_name":"Xifan Tang","orcid":"https://orcid.org/0000-0003-2203-3981"},"institutions":[{"id":"https://openalex.org/I5124864","display_name":"\u00c9cole Polytechnique F\u00e9d\u00e9rale de Lausanne","ror":"https://ror.org/02s376052","country_code":"CH","type":"education","lineage":["https://openalex.org/I2799323385","https://openalex.org/I5124864"]}],"countries":["CH"],"is_corresponding":true,"raw_author_name":"Xifan Tang","raw_affiliation_strings":["Integrated Systems Laboratory, School of Computer and Communication Sciences, \u00c9cole Polytechnique F\u00e9d\u00e9rale de Lausanne (EPFL), Vaud, Switzerland"],"affiliations":[{"raw_affiliation_string":"Integrated Systems Laboratory, School of Computer and Communication Sciences, \u00c9cole Polytechnique F\u00e9d\u00e9rale de Lausanne (EPFL), Vaud, Switzerland","institution_ids":["https://openalex.org/I5124864"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5055536889","display_name":"Edouard Giacomin","orcid":"https://orcid.org/0000-0002-5415-1870"},"institutions":[{"id":"https://openalex.org/I223532165","display_name":"University of Utah","ror":"https://ror.org/03r0ha626","country_code":"US","type":"education","lineage":["https://openalex.org/I223532165"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Edouard Giacomin","raw_affiliation_strings":["Laboratory for NanoIntegrated Systems, University of Utah, Salt Lake City, USA"],"affiliations":[{"raw_affiliation_string":"Laboratory for NanoIntegrated Systems, University of Utah, Salt Lake City, USA","institution_ids":["https://openalex.org/I223532165"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5072927296","display_name":"Giovanni De Micheli","orcid":"https://orcid.org/0000-0002-7827-3215"},"institutions":[{"id":"https://openalex.org/I5124864","display_name":"\u00c9cole Polytechnique F\u00e9d\u00e9rale de Lausanne","ror":"https://ror.org/02s376052","country_code":"CH","type":"education","lineage":["https://openalex.org/I2799323385","https://openalex.org/I5124864"]}],"countries":["CH"],"is_corresponding":false,"raw_author_name":"Giovanni De Micheli","raw_affiliation_strings":["Integrated Systems Laboratory, School of Computer and Communication Sciences, \u00c9cole Polytechnique F\u00e9d\u00e9rale de Lausanne (EPFL), Vaud, Switzerland"],"affiliations":[{"raw_affiliation_string":"Integrated Systems Laboratory, School of Computer and Communication Sciences, \u00c9cole Polytechnique F\u00e9d\u00e9rale de Lausanne (EPFL), Vaud, Switzerland","institution_ids":["https://openalex.org/I5124864"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5002568331","display_name":"Pierre\u2010Emmanuel Gaillardon","orcid":"https://orcid.org/0000-0003-3634-3999"},"institutions":[{"id":"https://openalex.org/I223532165","display_name":"University of Utah","ror":"https://ror.org/03r0ha626","country_code":"US","type":"education","lineage":["https://openalex.org/I223532165"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Pierre-Emmanuel Gaillardon","raw_affiliation_strings":["Laboratory for NanoIntegrated Systems, University of Utah, Salt Lake City, USA"],"affiliations":[{"raw_affiliation_string":"Laboratory for NanoIntegrated Systems, University of Utah, Salt Lake City, USA","institution_ids":["https://openalex.org/I223532165"]}]}],"institutions":[],"countries_distinct_count":2,"institutions_distinct_count":4,"corresponding_author_ids":["https://openalex.org/A5103004961"],"corresponding_institution_ids":["https://openalex.org/I5124864"],"apc_list":null,"apc_paid":null,"fwci":1.1026,"has_fulltext":false,"cited_by_count":19,"citation_normalized_percentile":{"value":0.81144294,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":98},"biblio":{"volume":"64","issue":"5","first_page":"1173","last_page":"1186"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10502","display_name":"Advanced Memory and Neural Computing","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10502","display_name":"Advanced Memory and Neural Computing","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T12808","display_name":"Ferroelectric and Negative Capacitance Devices","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10472","display_name":"Semiconductor materials and devices","score":0.9991999864578247,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/multiplexer","display_name":"Multiplexer","score":0.9833929538726807},{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.7580844759941101},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.593116819858551},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.5101225972175598},{"id":"https://openalex.org/keywords/transistor","display_name":"Transistor","score":0.4727281630039215},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.4525160789489746},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.3915063738822937},{"id":"https://openalex.org/keywords/multiplexing","display_name":"Multiplexing","score":0.2700047791004181},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.2236388921737671},{"id":"https://openalex.org/keywords/telecommunications","display_name":"Telecommunications","score":0.20518392324447632}],"concepts":[{"id":"https://openalex.org/C70970002","wikidata":"https://www.wikidata.org/wiki/Q189434","display_name":"Multiplexer","level":3,"score":0.9833929538726807},{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.7580844759941101},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.593116819858551},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.5101225972175598},{"id":"https://openalex.org/C172385210","wikidata":"https://www.wikidata.org/wiki/Q5339","display_name":"Transistor","level":3,"score":0.4727281630039215},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.4525160789489746},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.3915063738822937},{"id":"https://openalex.org/C19275194","wikidata":"https://www.wikidata.org/wiki/Q222903","display_name":"Multiplexing","level":2,"score":0.2700047791004181},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.2236388921737671},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.20518392324447632}],"mesh":[],"locations_count":2,"locations":[{"id":"doi:10.1109/tcsi.2016.2638542","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tcsi.2016.2638542","pdf_url":null,"source":{"id":"https://openalex.org/S116977442","display_name":"IEEE Transactions on Circuits and Systems I Regular Papers","issn_l":"1549-8328","issn":["1549-8328","1558-0806"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Circuits and Systems I: Regular Papers","raw_type":"journal-article"},{"id":"pmh:oai:infoscience.epfl.ch:224322","is_oa":true,"landing_page_url":"http://infoscience.epfl.ch/record/224322","pdf_url":null,"source":{"id":"https://openalex.org/S4306400487","display_name":"Infoscience (Ecole Polytechnique F\u00e9d\u00e9rale de Lausanne)","issn_l":null,"issn":null,"is_oa":true,"is_in_doaj":false,"is_core":false,"host_organization":null,"host_organization_name":null,"host_organization_lineage":[],"host_organization_lineage_names":[],"type":"repository"},"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"","raw_type":"Text"}],"best_oa_location":{"id":"pmh:oai:infoscience.epfl.ch:224322","is_oa":true,"landing_page_url":"http://infoscience.epfl.ch/record/224322","pdf_url":null,"source":{"id":"https://openalex.org/S4306400487","display_name":"Infoscience (Ecole Polytechnique F\u00e9d\u00e9rale de Lausanne)","issn_l":null,"issn":null,"is_oa":true,"is_in_doaj":false,"is_core":false,"host_organization":null,"host_organization_name":null,"host_organization_lineage":[],"host_organization_lineage_names":[],"type":"repository"},"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"","raw_type":"Text"},"sustainable_development_goals":[{"score":0.8799999952316284,"id":"https://metadata.un.org/sdg/7","display_name":"Affordable and clean energy"}],"awards":[{"id":"https://openalex.org/G6748573657","display_name":null,"funder_award_id":"200021-146600","funder_id":"https://openalex.org/F4320320924","funder_display_name":"Schweizerischer Nationalfonds zur F\u00f6rderung der Wissenschaftlichen Forschung"}],"funders":[{"id":"https://openalex.org/F4320320924","display_name":"Schweizerischer Nationalfonds zur F\u00f6rderung der Wissenschaftlichen Forschung","ror":"https://ror.org/00yjd3n13"}],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":25,"referenced_works":["https://openalex.org/W1971000062","https://openalex.org/W1977773606","https://openalex.org/W1984588379","https://openalex.org/W2004823737","https://openalex.org/W2006798699","https://openalex.org/W2030765577","https://openalex.org/W2033811947","https://openalex.org/W2045197688","https://openalex.org/W2049121968","https://openalex.org/W2077066011","https://openalex.org/W2078177817","https://openalex.org/W2086637600","https://openalex.org/W2086709250","https://openalex.org/W2088846964","https://openalex.org/W2105281355","https://openalex.org/W2105408739","https://openalex.org/W2118995854","https://openalex.org/W2120544688","https://openalex.org/W2136983830","https://openalex.org/W2146437820","https://openalex.org/W2171769031","https://openalex.org/W2263042501","https://openalex.org/W2346205343","https://openalex.org/W4243164749","https://openalex.org/W6681989696"],"related_works":["https://openalex.org/W4323268213","https://openalex.org/W2101047079","https://openalex.org/W2043381979","https://openalex.org/W4242128654","https://openalex.org/W3197720232","https://openalex.org/W2152549830","https://openalex.org/W1993744883","https://openalex.org/W1559639976","https://openalex.org/W2109445684","https://openalex.org/W2156154954"],"abstract_inverted_index":{"Routing":[0],"multiplexers":[1,23,80,142,173,211,229],"based":[2],"on":[3],"pass-transistors":[4],"or":[5],"transmission":[6],"gates":[7],"are":[8],"an":[9,162],"essential":[10],"components":[11],"in":[12,45],"many":[13],"digital":[14],"integrated":[15],"circuits.":[16],"However,":[17],"whatever":[18],"structure":[19],"is":[20,31],"employed,":[21],"CMOS":[22,188,206,228],"have":[24],"two":[25],"major":[26],"limitations:":[27],"1)":[28],"their":[29,39],"delay":[30,144,201,222],"linearly":[32],"related":[33],"to":[34,90,168,186,220,226],"the":[35,62,96,107,117,139,170,191,194,204],"input":[36,163],"size;":[37],"2)":[38],"performance":[40],"degrades":[41],"seriously":[42],"when":[43,224],"operated":[44],"near-Vt":[46,214],"regime.":[47],"Resistive":[48],"Random":[49],"Access":[50],"Memory":[51],"(RRAM)":[52],"technology":[53],"brings":[54],"opportunities":[55],"of":[56,64,119],"overcoming":[57],"these":[58],"limitations":[59],"by":[60,145,149,179],"exploiting":[61],"properties":[63],"RRAMs":[65],"and":[66,78,86,116,124,147,154,176,181],"associated":[67,101],"programming":[68,126],"structures.":[69],"In":[70,190],"this":[71],"paper,":[72],"we":[73,87],"propose":[74],"new":[75],"one-level,":[76],"two-level":[77],"tree-like":[79],"circuit":[81],"designs":[82],"using":[83,110,132],"4T(ransistors)1R(RAM)":[84],"elements":[85],"compare":[88],"them":[89],"naive":[91,152],"one-level":[92],"multiplexers.":[93,189],"We":[94],"consider":[95],"main":[97],"physical":[98],"design":[99],"aspects":[100],"with":[102],"4T1R-based":[103,141,172,196,210],"multiplexers,":[104],"such":[105],"as":[106,184],"layout":[108],"implications":[109],"a":[111,133],"7":[112,134],"nm":[113,135],"FinFET":[114,136],"technology,":[115,138],"co-integration":[118],"low-voltage":[120],"nominal":[121,158,232],"power":[122],"supply":[123],"high-voltage":[125],"supply.":[127],"Electrical":[128],"simulations":[129],"show":[130],"that":[131],"transistor":[137],"proposed":[140,171,195,209],"reduce":[143],"2x":[146,199],"energy":[148],"2.8x":[150],"over":[151,203],"4T1R":[153],"2T1R":[155],"counterparts.":[156],"At":[157],"working":[159,230],"voltage,":[160],"considering":[161],"size":[164],"ranging":[165],"from":[166],"2":[167],"50,":[169],"reduces":[174],"Area-Delay":[175],"Power-Delay":[177],"products":[178],"2.6x":[180],"3.8x":[182],"respectively,":[183],"compared":[185,225],"best":[187,205,227],"nearVt":[192],"regime,":[193],"multiplexer":[197],"demonstrates":[198],"larger":[200],"efficiency":[202],"multiplexer.":[207],"The":[208],"operating":[212],"at":[213,231],"regime":[215],"can":[216],"still":[217],"achieve":[218],"up":[219],"22%":[221],"improvement":[223],"voltage.":[233]},"counts_by_year":[{"year":2025,"cited_by_count":1},{"year":2024,"cited_by_count":2},{"year":2023,"cited_by_count":5},{"year":2022,"cited_by_count":2},{"year":2021,"cited_by_count":1},{"year":2020,"cited_by_count":2},{"year":2019,"cited_by_count":1},{"year":2018,"cited_by_count":5}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}