{"id":"https://openalex.org/W2512089255","doi":"https://doi.org/10.1109/tcsi.2016.2578960","title":"A 0.36 pJ/bit, 0.025 mm&lt;inline-formula&gt; &lt;tex-math notation=\"LaTeX\"&gt;${}^{\\text{2}}$&lt;/tex-math&gt; &lt;/inline-formula&gt;, 12.5 Gb/s Forwarded-Clock Receiver With a Stuck-Free Delay-Locked Loop and a Half-Bit Delay Line in 65-nm CMOS Technology","display_name":"A 0.36 pJ/bit, 0.025 mm&lt;inline-formula&gt; &lt;tex-math notation=\"LaTeX\"&gt;${}^{\\text{2}}$&lt;/tex-math&gt; &lt;/inline-formula&gt;, 12.5 Gb/s Forwarded-Clock Receiver With a Stuck-Free Delay-Locked Loop and a Half-Bit Delay Line in 65-nm CMOS Technology","publication_year":2016,"publication_date":"2016-08-15","ids":{"openalex":"https://openalex.org/W2512089255","doi":"https://doi.org/10.1109/tcsi.2016.2578960","mag":"2512089255"},"language":"en","primary_location":{"id":"doi:10.1109/tcsi.2016.2578960","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tcsi.2016.2578960","pdf_url":null,"source":{"id":"https://openalex.org/S116977442","display_name":"IEEE Transactions on Circuits and Systems I Regular Papers","issn_l":"1549-8328","issn":["1549-8328","1558-0806"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Circuits and Systems I: Regular Papers","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5084764827","display_name":"Woorham Bae","orcid":"https://orcid.org/0000-0002-9274-0182"},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Woorham Bae","raw_affiliation_strings":["Department of Electrical and Computer Engineering, Inter-University Semiconductor Research Center (ISRC), Seoul, South Korea"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Electrical and Computer Engineering, Inter-University Semiconductor Research Center (ISRC), Seoul, South Korea","institution_ids":[]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5102716079","display_name":"Gyu-Seob Jeong","orcid":"https://orcid.org/0000-0002-9432-0800"},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Gyu-Seob Jeong","raw_affiliation_strings":["Department of Electrical and Computer Engineering, Inter-University Semiconductor Research Center (ISRC), Seoul, South Korea"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Electrical and Computer Engineering, Inter-University Semiconductor Research Center (ISRC), Seoul, South Korea","institution_ids":[]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5084577882","display_name":"Kwanseo Park","orcid":"https://orcid.org/0000-0002-4727-9868"},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Kwanseo Park","raw_affiliation_strings":["Department of Electrical and Computer Engineering, Inter-University Semiconductor Research Center (ISRC), Seoul, South Korea"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Electrical and Computer Engineering, Inter-University Semiconductor Research Center (ISRC), Seoul, South Korea","institution_ids":[]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5101622145","display_name":"Sung\u2010Yong Cho","orcid":"https://orcid.org/0000-0003-1863-1719"},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Sung-Yong Cho","raw_affiliation_strings":["Department of Electrical and Computer Engineering, Inter-University Semiconductor Research Center (ISRC), Seoul, South Korea"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Electrical and Computer Engineering, Inter-University Semiconductor Research Center (ISRC), Seoul, South Korea","institution_ids":[]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5003608838","display_name":"Yoonsoo Kim","orcid":"https://orcid.org/0000-0002-0357-9826"},"institutions":[{"id":"https://openalex.org/I4210101622","display_name":"Humanpass (South Korea)","ror":"https://ror.org/0170a8r40","country_code":"KR","type":"company","lineage":["https://openalex.org/I4210101622"]}],"countries":["KR"],"is_corresponding":false,"raw_author_name":"Yoonsoo Kim","raw_affiliation_strings":["AnaPass, Seoul, South Korea"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"AnaPass, Seoul, South Korea","institution_ids":["https://openalex.org/I4210101622"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5008010401","display_name":"Deog\u2010Kyoon Jeong","orcid":"https://orcid.org/0000-0003-0436-703X"},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Deog-Kyoon Jeong","raw_affiliation_strings":["Department of Electrical and Computer Engineering, Inter-University Semiconductor Research Center (ISRC), Seoul, South Korea"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Electrical and Computer Engineering, Inter-University Semiconductor Research Center (ISRC), Seoul, South Korea","institution_ids":[]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":1.76,"has_fulltext":false,"cited_by_count":20,"citation_normalized_percentile":{"value":0.85271852,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":98},"biblio":{"volume":"63","issue":"9","first_page":"1393","last_page":"1403"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11417","display_name":"Advancements in PLL and VCO Technologies","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11417","display_name":"Advancements in PLL and VCO Technologies","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10187","display_name":"Radio Frequency Integrated Circuit Design","score":0.9983999729156494,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.9968000054359436,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/jitter","display_name":"Jitter","score":0.9161189794540405},{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.6481971740722656},{"id":"https://openalex.org/keywords/detector","display_name":"Detector","score":0.4706251621246338},{"id":"https://openalex.org/keywords/range","display_name":"Range (aeronautics)","score":0.46939176321029663},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.42125630378723145},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.4033827781677246},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.400129109621048},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.380700945854187},{"id":"https://openalex.org/keywords/mathematics","display_name":"Mathematics","score":0.352175235748291},{"id":"https://openalex.org/keywords/physics","display_name":"Physics","score":0.32845538854599},{"id":"https://openalex.org/keywords/topology","display_name":"Topology (electrical circuits)","score":0.32348841428756714},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.1768503487110138},{"id":"https://openalex.org/keywords/telecommunications","display_name":"Telecommunications","score":0.13680219650268555}],"concepts":[{"id":"https://openalex.org/C134652429","wikidata":"https://www.wikidata.org/wiki/Q1052698","display_name":"Jitter","level":2,"score":0.9161189794540405},{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.6481971740722656},{"id":"https://openalex.org/C94915269","wikidata":"https://www.wikidata.org/wiki/Q1834857","display_name":"Detector","level":2,"score":0.4706251621246338},{"id":"https://openalex.org/C204323151","wikidata":"https://www.wikidata.org/wiki/Q905424","display_name":"Range (aeronautics)","level":2,"score":0.46939176321029663},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.42125630378723145},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.4033827781677246},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.400129109621048},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.380700945854187},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.352175235748291},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.32845538854599},{"id":"https://openalex.org/C184720557","wikidata":"https://www.wikidata.org/wiki/Q7825049","display_name":"Topology (electrical circuits)","level":2,"score":0.32348841428756714},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.1768503487110138},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.13680219650268555},{"id":"https://openalex.org/C146978453","wikidata":"https://www.wikidata.org/wiki/Q3798668","display_name":"Aerospace engineering","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/tcsi.2016.2578960","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tcsi.2016.2578960","pdf_url":null,"source":{"id":"https://openalex.org/S116977442","display_name":"IEEE Transactions on Circuits and Systems I Regular Papers","issn_l":"1549-8328","issn":["1549-8328","1558-0806"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Circuits and Systems I: Regular Papers","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[{"id":"https://metadata.un.org/sdg/7","display_name":"Affordable and clean energy","score":0.9100000262260437}],"awards":[{"id":"https://openalex.org/G2045131504","display_name":null,"funder_award_id":"CISS-2012 M3A6A6054191","funder_id":"https://openalex.org/F4320322030","funder_display_name":"Ministry of Science, ICT and Future Planning"}],"funders":[{"id":"https://openalex.org/F4320322030","display_name":"Ministry of Science, ICT and Future Planning","ror":"https://ror.org/032e49973"}],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":38,"referenced_works":["https://openalex.org/W1509063197","https://openalex.org/W1525058109","https://openalex.org/W1564359801","https://openalex.org/W1564398117","https://openalex.org/W1566333078","https://openalex.org/W1587699768","https://openalex.org/W1657884199","https://openalex.org/W1988172581","https://openalex.org/W2006317948","https://openalex.org/W2050889694","https://openalex.org/W2055328281","https://openalex.org/W2059008798","https://openalex.org/W2068937073","https://openalex.org/W2098297987","https://openalex.org/W2100403807","https://openalex.org/W2115623896","https://openalex.org/W2123892792","https://openalex.org/W2127305782","https://openalex.org/W2131626685","https://openalex.org/W2137800538","https://openalex.org/W2139132358","https://openalex.org/W2142918624","https://openalex.org/W2144558071","https://openalex.org/W2150983492","https://openalex.org/W2155236300","https://openalex.org/W2169645179","https://openalex.org/W2172579984","https://openalex.org/W2174322375","https://openalex.org/W2188104546","https://openalex.org/W2346817495","https://openalex.org/W4253311760","https://openalex.org/W6633778791","https://openalex.org/W6663053927","https://openalex.org/W6667776267","https://openalex.org/W6675125376","https://openalex.org/W6678752912","https://openalex.org/W6679515826","https://openalex.org/W6686944249"],"related_works":["https://openalex.org/W2748952813","https://openalex.org/W2899084033","https://openalex.org/W3107870742","https://openalex.org/W4382657671","https://openalex.org/W4309640350","https://openalex.org/W4312708667","https://openalex.org/W2218086155","https://openalex.org/W1491025498","https://openalex.org/W4362683475","https://openalex.org/W2131822216"],"abstract_inverted_index":{"This":[0],"paper":[1],"describes":[2],"a":[3,36,94],"power":[4],"and":[5,10,63,85,111],"area-efficient":[6],"forwarded-clock":[7],"(FC)":[8],"receiver":[9,78,103],"includes":[11],"an":[12,87,105],"analysis":[13,33],"of":[14,18,57,70,90,97,108,115],"the":[15,19,23,32,48,53,58,66,71,100],"jitter":[16,26,114],"tolerance":[17,27],"FC":[20,77,102],"receiver.":[21],"In":[22],"proposed":[24,76,101],"design,":[25],"is":[28,79],"maximized":[29],"according":[30],"to":[31],"by":[34,52,73],"employing":[35],"delay-locked":[37],"loop":[38],"(DLL)":[39],"based":[40],"de-skewing.":[41],"A":[42],"sample-swapping":[43],"bang-bang":[44],"phase-detector":[45],"(SS-BBPD)":[46],"eliminates":[47],"stuck":[49],"locking":[50],"caused":[51],"finite":[54],"delay":[55,60,68],"range":[56,69],"voltage-controlled":[59],"line":[61],"(VCDL),":[62],"also":[64],"reduces":[65],"required":[67],"VCDL":[72],"half.":[74],"The":[75],"fabricated":[80],"in":[81],"65-nm":[82],"CMOS":[83],"technology":[84],"occupies":[86],"active":[88],"area":[89],"0.025":[91],"mm2.":[92],"At":[93],"data":[95],"rate":[96],"12.5":[98],"Gb/s,":[99],"exhibits":[104],"energy":[106],"efficiency":[107],"0.36":[109],"pJ/bit,":[110],"tolerates":[112],"1.4-UIppsinusoidal":[113],"300":[116],"MHz.":[117]},"counts_by_year":[{"year":2025,"cited_by_count":1},{"year":2023,"cited_by_count":2},{"year":2022,"cited_by_count":1},{"year":2021,"cited_by_count":1},{"year":2020,"cited_by_count":3},{"year":2019,"cited_by_count":3},{"year":2018,"cited_by_count":2},{"year":2017,"cited_by_count":5},{"year":2016,"cited_by_count":2}],"updated_date":"2026-08-01T09:00:35.917206","created_date":"2025-10-10T00:00:00"}
