{"id":"https://openalex.org/W2567213298","doi":"https://doi.org/10.1109/tcsi.2016.2561518","title":"Improved 64-bit Radix-16 Booth Multiplier Based on Partial Product Array Height Reduction","display_name":"Improved 64-bit Radix-16 Booth Multiplier Based on Partial Product Array Height Reduction","publication_year":2016,"publication_date":"2016-12-21","ids":{"openalex":"https://openalex.org/W2567213298","doi":"https://doi.org/10.1109/tcsi.2016.2561518","mag":"2567213298"},"language":"en","primary_location":{"id":"doi:10.1109/tcsi.2016.2561518","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tcsi.2016.2561518","pdf_url":null,"source":{"id":"https://openalex.org/S116977442","display_name":"IEEE Transactions on Circuits and Systems I Regular Papers","issn_l":"1549-8328","issn":["1549-8328","1558-0806"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Circuits and Systems I: Regular Papers","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":true,"oa_status":"green","oa_url":"https://orbit.dtu.dk/en/publications/b94b3895-0f65-48c1-a87e-daf3fbfdc1e3","any_repository_has_fulltext":true},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5076815552","display_name":"E. Antelo","orcid":"https://orcid.org/0000-0003-3743-3689"},"institutions":[{"id":"https://openalex.org/I200284239","display_name":"Universidade de Santiago de Compostela","ror":"https://ror.org/030eybx10","country_code":"ES","type":"education","lineage":["https://openalex.org/I200284239"]}],"countries":["ES"],"is_corresponding":false,"raw_author_name":"Elisardo Antelo","raw_affiliation_strings":["Department of Electr\u00f3nica e Computaci\u00f3n, University of Santiago de Compostela, Santiago de Compostela, Spain"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Electr\u00f3nica e Computaci\u00f3n, University of Santiago de Compostela, Santiago de Compostela, Spain","institution_ids":["https://openalex.org/I200284239"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5083219829","display_name":"Paolo Montuschi","orcid":"https://orcid.org/0000-0003-2563-2250"},"institutions":[{"id":"https://openalex.org/I177477856","display_name":"Politecnico di Torino","ror":"https://ror.org/00bgk9508","country_code":"IT","type":"education","lineage":["https://openalex.org/I177477856"]}],"countries":["IT"],"is_corresponding":false,"raw_author_name":"Paolo Montuschi","raw_affiliation_strings":["Department of Control and Computer Engineering, Politecnico di Torino, Italy"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Control and Computer Engineering, Politecnico di Torino, Italy","institution_ids":["https://openalex.org/I177477856"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5022318517","display_name":"Alberto Nannarelli","orcid":"https://orcid.org/0000-0002-8303-6329"},"institutions":[{"id":"https://openalex.org/I96673099","display_name":"Technical University of Denmark","ror":"https://ror.org/04qtj9h94","country_code":"DK","type":"education","lineage":["https://openalex.org/I96673099"]}],"countries":["DK"],"is_corresponding":false,"raw_author_name":"Alberto Nannarelli","raw_affiliation_strings":["Department of Applied Mathematics and Computer Science, Technical University of Denmark, Kongens Lyngby, Denmark"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Applied Mathematics and Computer Science, Technical University of Denmark, Kongens Lyngby, Denmark","institution_ids":["https://openalex.org/I96673099"]}]}],"institutions":[],"countries_distinct_count":3,"institutions_distinct_count":3,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":2.3466,"has_fulltext":false,"cited_by_count":58,"citation_normalized_percentile":{"value":0.89025072,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":96,"max":99},"biblio":{"volume":"64","issue":"2","first_page":"409","last_page":"418"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9991000294685364,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9991000294685364,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.9983999729156494,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9976000189781189,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/multiplier","display_name":"Multiplier (economics)","score":0.597089946269989},{"id":"https://openalex.org/keywords/reduction","display_name":"Reduction (mathematics)","score":0.5575783252716064},{"id":"https://openalex.org/keywords/arithmetic","display_name":"Arithmetic","score":0.508745014667511},{"id":"https://openalex.org/keywords/radix","display_name":"Radix (gastropod)","score":0.4742033779621124},{"id":"https://openalex.org/keywords/mathematics","display_name":"Mathematics","score":0.4339224398136139},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.4305969476699829},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.37833482027053833},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.1420687437057495}],"concepts":[{"id":"https://openalex.org/C124584101","wikidata":"https://www.wikidata.org/wiki/Q1053266","display_name":"Multiplier (economics)","level":2,"score":0.597089946269989},{"id":"https://openalex.org/C111335779","wikidata":"https://www.wikidata.org/wiki/Q3454686","display_name":"Reduction (mathematics)","level":2,"score":0.5575783252716064},{"id":"https://openalex.org/C94375191","wikidata":"https://www.wikidata.org/wiki/Q11205","display_name":"Arithmetic","level":1,"score":0.508745014667511},{"id":"https://openalex.org/C2779091547","wikidata":"https://www.wikidata.org/wiki/Q287565","display_name":"Radix (gastropod)","level":2,"score":0.4742033779621124},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.4339224398136139},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.4305969476699829},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.37833482027053833},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.1420687437057495},{"id":"https://openalex.org/C86803240","wikidata":"https://www.wikidata.org/wiki/Q420","display_name":"Biology","level":0,"score":0.0},{"id":"https://openalex.org/C2524010","wikidata":"https://www.wikidata.org/wiki/Q8087","display_name":"Geometry","level":1,"score":0.0},{"id":"https://openalex.org/C59822182","wikidata":"https://www.wikidata.org/wiki/Q441","display_name":"Botany","level":1,"score":0.0},{"id":"https://openalex.org/C139719470","wikidata":"https://www.wikidata.org/wiki/Q39680","display_name":"Macroeconomics","level":1,"score":0.0},{"id":"https://openalex.org/C162324750","wikidata":"https://www.wikidata.org/wiki/Q8134","display_name":"Economics","level":0,"score":0.0}],"mesh":[],"locations_count":3,"locations":[{"id":"doi:10.1109/tcsi.2016.2561518","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tcsi.2016.2561518","pdf_url":null,"source":{"id":"https://openalex.org/S116977442","display_name":"IEEE Transactions on Circuits and Systems I Regular Papers","issn_l":"1549-8328","issn":["1549-8328","1558-0806"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Circuits and Systems I: Regular Papers","raw_type":"journal-article"},{"id":"pmh:oai:porto.polito.it:2645860","is_oa":false,"landing_page_url":"http://porto.polito.it/2645860/","pdf_url":null,"source":{"id":"https://openalex.org/S4306402038","display_name":"PORTO Publications Open Repository TOrino (Politecnico di Torino)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/I177477856","host_organization_name":"Politecnico di Torino","host_organization_lineage":["https://openalex.org/I177477856"],"host_organization_lineage_names":[],"type":"repository"},"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"ISSN:1549-8328","raw_type":"info:eu-repo/semantics/article"},{"id":"pmh:oai:pure.atira.dk:publications/b94b3895-0f65-48c1-a87e-daf3fbfdc1e3","is_oa":true,"landing_page_url":"https://orbit.dtu.dk/en/publications/b94b3895-0f65-48c1-a87e-daf3fbfdc1e3","pdf_url":null,"source":{"id":"https://openalex.org/S4306400705","display_name":"Technical University of Denmark, DTU Orbit (Technical University of Denmark, DTU)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/I96673099","host_organization_name":"Technical University of Denmark","host_organization_lineage":["https://openalex.org/I96673099"],"host_organization_lineage_names":[],"type":"repository"},"license":"other-oa","license_id":"https://openalex.org/licenses/other-oa","version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"Antelo , E , Montuschi , P & Nannarelli , A 2016 , ' Improved 64-bit Radix-16 Booth Multiplier Based on Partial Product Array Height Reduction ' , IEEE Transactions on Circuits and Systems Part 1: Regular Papers , vol. 64 , no. 2 , pp. 409-418 . https://doi.org/10.1109/TCSI.2016.2561518","raw_type":"article"}],"best_oa_location":{"id":"pmh:oai:pure.atira.dk:publications/b94b3895-0f65-48c1-a87e-daf3fbfdc1e3","is_oa":true,"landing_page_url":"https://orbit.dtu.dk/en/publications/b94b3895-0f65-48c1-a87e-daf3fbfdc1e3","pdf_url":null,"source":{"id":"https://openalex.org/S4306400705","display_name":"Technical University of Denmark, DTU Orbit (Technical University of Denmark, DTU)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/I96673099","host_organization_name":"Technical University of Denmark","host_organization_lineage":["https://openalex.org/I96673099"],"host_organization_lineage_names":[],"type":"repository"},"license":"other-oa","license_id":"https://openalex.org/licenses/other-oa","version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"Antelo , E , Montuschi , P & Nannarelli , A 2016 , ' Improved 64-bit Radix-16 Booth Multiplier Based on Partial Product Array Height Reduction ' , IEEE Transactions on Circuits and Systems Part 1: Regular Papers , vol. 64 , no. 2 , pp. 409-418 . https://doi.org/10.1109/TCSI.2016.2561518","raw_type":"article"},"sustainable_development_goals":[],"awards":[{"id":"https://openalex.org/G1037575374","display_name":null,"funder_award_id":"GRC2014/008","funder_id":"https://openalex.org/F4320326655","funder_display_name":"Xunta de Galicia"}],"funders":[{"id":"https://openalex.org/F4320326655","display_name":"Xunta de Galicia","ror":"https://ror.org/0181xnw06"}],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":18,"referenced_works":["https://openalex.org/W1603201686","https://openalex.org/W1895318900","https://openalex.org/W1978433222","https://openalex.org/W1980697457","https://openalex.org/W2008634303","https://openalex.org/W2071502273","https://openalex.org/W2071892512","https://openalex.org/W2074516902","https://openalex.org/W2094158289","https://openalex.org/W2094433672","https://openalex.org/W2099147678","https://openalex.org/W2105404019","https://openalex.org/W2110179261","https://openalex.org/W2131894786","https://openalex.org/W2146301839","https://openalex.org/W2154098113","https://openalex.org/W2170607575","https://openalex.org/W2171843705"],"related_works":["https://openalex.org/W2412254868","https://openalex.org/W2390904641","https://openalex.org/W816882723","https://openalex.org/W2377485831","https://openalex.org/W2356871415","https://openalex.org/W2402878427","https://openalex.org/W2902356632","https://openalex.org/W2364087308","https://openalex.org/W2353404009","https://openalex.org/W4281295723"],"abstract_inverted_index":{"In":[0],"this":[1],"paper,":[2],"we":[3],"describe":[4],"an":[5],"optimization":[6],"for":[7,26],"binary":[8],"radix-16":[9],"(modified)":[10],"Booth":[11,113],"recoded":[12,114],"multipliers":[13],"to":[14,24,36,69,95,112],"reduce":[15],"the":[16,20,37,52,63,66,71,80,99,105],"maximum":[17,39,53],"height":[18,40,54],"of":[19,41,48,65,79,88,125],"partial":[21,81,100],"product":[22,82,101],"columns":[23],"[n/4]":[25],"n":[27],"=":[28],"64-bit":[29],"unsigned":[30],"operands.":[31],"This":[32,57],"is":[33,55],"in":[34,51,86,98],"contrast":[35],"conventional":[38],"[(n":[42],"+":[43],"1)/4].":[44],"Therefore,":[45],"a":[46],"reduction":[47,58,84],"one":[49],"unit":[50],"achieved.":[56],"may":[59,75,91],"add":[60],"flexibility":[61],"during":[62],"design":[64,72],"pipelined":[67],"multiplier":[68],"meet":[70],"goals,":[73],"it":[74],"allow":[76,92],"further":[77],"optimizations":[78],"array":[83,102],"stage":[85],"terms":[87],"area/delay/power":[89],"and/or":[90],"additional":[93],"addends":[94],"be":[96,110],"included":[97],"without":[103],"increasing":[104],"delay.":[106],"The":[107],"method":[108],"can":[109],"extended":[111],"radix-8":[115],"multipliers,":[116,118,121],"signed":[117],"combined":[119],"signed/unsigned":[120],"and":[122],"other":[123],"values":[124],"n.":[126]},"counts_by_year":[{"year":2026,"cited_by_count":3},{"year":2025,"cited_by_count":9},{"year":2024,"cited_by_count":3},{"year":2023,"cited_by_count":3},{"year":2022,"cited_by_count":5},{"year":2021,"cited_by_count":8},{"year":2020,"cited_by_count":11},{"year":2019,"cited_by_count":9},{"year":2018,"cited_by_count":4},{"year":2017,"cited_by_count":3}],"updated_date":"2026-07-31T08:31:51.225901","created_date":"2025-10-10T00:00:00"}