{"id":"https://openalex.org/W1948495154","doi":"https://doi.org/10.1109/tcsi.2015.2476319","title":"New Approach to the Reduction of Sign-Extension Overhead for Efficient Implementation of Multiple Constant Multiplications","display_name":"New Approach to the Reduction of Sign-Extension Overhead for Efficient Implementation of Multiple Constant Multiplications","publication_year":2015,"publication_date":"2015-09-28","ids":{"openalex":"https://openalex.org/W1948495154","doi":"https://doi.org/10.1109/tcsi.2015.2476319","mag":"1948495154"},"language":"en","primary_location":{"id":"doi:10.1109/tcsi.2015.2476319","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tcsi.2015.2476319","pdf_url":null,"source":{"id":"https://openalex.org/S116977442","display_name":"IEEE Transactions on Circuits and Systems I Regular Papers","issn_l":"1549-8328","issn":["1549-8328","1558-0806"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Circuits and Systems I: Regular Papers","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5063714836","display_name":"Xin Lou","orcid":"https://orcid.org/0000-0002-8499-5038"},"institutions":[{"id":"https://openalex.org/I172675005","display_name":"Nanyang Technological University","ror":"https://ror.org/02e7b5302","country_code":"SG","type":"education","lineage":["https://openalex.org/I172675005"]}],"countries":["SG"],"is_corresponding":true,"raw_author_name":"Xin Lou","raw_affiliation_strings":["School of Electrical and Electronic Engineering, Nanyang Technological University, Singapore","School of Electrical & Electronic Engineering , Nanyang Technological University , Singapore"],"affiliations":[{"raw_affiliation_string":"School of Electrical and Electronic Engineering, Nanyang Technological University, Singapore","institution_ids":["https://openalex.org/I172675005"]},{"raw_affiliation_string":"School of Electrical & Electronic Engineering , Nanyang Technological University , Singapore","institution_ids":["https://openalex.org/I172675005"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5018946791","display_name":"Ya Jun Yu","orcid":"https://orcid.org/0000-0001-7374-3217"},"institutions":[{"id":"https://openalex.org/I172675005","display_name":"Nanyang Technological University","ror":"https://ror.org/02e7b5302","country_code":"SG","type":"education","lineage":["https://openalex.org/I172675005"]}],"countries":["SG"],"is_corresponding":false,"raw_author_name":"Ya Jun Yu","raw_affiliation_strings":["School of Electrical and Electronic Engineering, Nanyang Technological University, Singapore","School of Electrical & Electronic Engineering , Nanyang Technological University , Singapore"],"affiliations":[{"raw_affiliation_string":"School of Electrical and Electronic Engineering, Nanyang Technological University, Singapore","institution_ids":["https://openalex.org/I172675005"]},{"raw_affiliation_string":"School of Electrical & Electronic Engineering , Nanyang Technological University , Singapore","institution_ids":["https://openalex.org/I172675005"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5025809855","display_name":"Pramod Kumar Meher","orcid":"https://orcid.org/0000-0003-0992-1159"},"institutions":[{"id":"https://openalex.org/I172675005","display_name":"Nanyang Technological University","ror":"https://ror.org/02e7b5302","country_code":"SG","type":"education","lineage":["https://openalex.org/I172675005"]}],"countries":["SG"],"is_corresponding":false,"raw_author_name":"Pramod Kumar Meher","raw_affiliation_strings":["School of Electrical and Electronic Engineering, Nanyang Technological University, Singapore","School of Computer Engineering, Nanyang Technological University,,Singapore"],"affiliations":[{"raw_affiliation_string":"School of Electrical and Electronic Engineering, Nanyang Technological University, Singapore","institution_ids":["https://openalex.org/I172675005"]},{"raw_affiliation_string":"School of Computer Engineering, Nanyang Technological University,,Singapore","institution_ids":["https://openalex.org/I172675005"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":3,"corresponding_author_ids":["https://openalex.org/A5063714836"],"corresponding_institution_ids":["https://openalex.org/I172675005"],"apc_list":null,"apc_paid":null,"fwci":1.1488,"has_fulltext":false,"cited_by_count":7,"citation_normalized_percentile":{"value":0.78218284,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":97},"biblio":{"volume":"62","issue":"11","first_page":"2695","last_page":"2705"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11034","display_name":"Digital Filter Design and Implementation","score":0.9991999864578247,"subfield":{"id":"https://openalex.org/subfields/1711","display_name":"Signal Processing"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11034","display_name":"Digital Filter Design and Implementation","score":0.9991999864578247,"subfield":{"id":"https://openalex.org/subfields/1711","display_name":"Signal Processing"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9930999875068665,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11697","display_name":"Numerical Methods and Algorithms","score":0.9866999983787537,"subfield":{"id":"https://openalex.org/subfields/1703","display_name":"Computational Theory and Mathematics"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.639499306678772},{"id":"https://openalex.org/keywords/critical-path-method","display_name":"Critical path method","score":0.605486273765564},{"id":"https://openalex.org/keywords/overhead","display_name":"Overhead (engineering)","score":0.5805550217628479},{"id":"https://openalex.org/keywords/sign","display_name":"Sign (mathematics)","score":0.5190721154212952},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.49988603591918945},{"id":"https://openalex.org/keywords/operand","display_name":"Operand","score":0.4860094487667084},{"id":"https://openalex.org/keywords/block","display_name":"Block (permutation group theory)","score":0.47614383697509766},{"id":"https://openalex.org/keywords/reduction","display_name":"Reduction (mathematics)","score":0.46559131145477295},{"id":"https://openalex.org/keywords/redundancy","display_name":"Redundancy (engineering)","score":0.46280449628829956},{"id":"https://openalex.org/keywords/multiplication","display_name":"Multiplication (music)","score":0.44447529315948486},{"id":"https://openalex.org/keywords/computation","display_name":"Computation","score":0.43863046169281006},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.3939051628112793},{"id":"https://openalex.org/keywords/arithmetic","display_name":"Arithmetic","score":0.3481214642524719},{"id":"https://openalex.org/keywords/mathematics","display_name":"Mathematics","score":0.32480737566947937},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.13212984800338745}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.639499306678772},{"id":"https://openalex.org/C115874739","wikidata":"https://www.wikidata.org/wiki/Q825377","display_name":"Critical path method","level":2,"score":0.605486273765564},{"id":"https://openalex.org/C2779960059","wikidata":"https://www.wikidata.org/wiki/Q7113681","display_name":"Overhead (engineering)","level":2,"score":0.5805550217628479},{"id":"https://openalex.org/C139676723","wikidata":"https://www.wikidata.org/wiki/Q1193832","display_name":"Sign (mathematics)","level":2,"score":0.5190721154212952},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.49988603591918945},{"id":"https://openalex.org/C55526617","wikidata":"https://www.wikidata.org/wiki/Q719375","display_name":"Operand","level":2,"score":0.4860094487667084},{"id":"https://openalex.org/C2777210771","wikidata":"https://www.wikidata.org/wiki/Q4927124","display_name":"Block (permutation group theory)","level":2,"score":0.47614383697509766},{"id":"https://openalex.org/C111335779","wikidata":"https://www.wikidata.org/wiki/Q3454686","display_name":"Reduction (mathematics)","level":2,"score":0.46559131145477295},{"id":"https://openalex.org/C152124472","wikidata":"https://www.wikidata.org/wiki/Q1204361","display_name":"Redundancy (engineering)","level":2,"score":0.46280449628829956},{"id":"https://openalex.org/C2780595030","wikidata":"https://www.wikidata.org/wiki/Q3860309","display_name":"Multiplication (music)","level":2,"score":0.44447529315948486},{"id":"https://openalex.org/C45374587","wikidata":"https://www.wikidata.org/wiki/Q12525525","display_name":"Computation","level":2,"score":0.43863046169281006},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.3939051628112793},{"id":"https://openalex.org/C94375191","wikidata":"https://www.wikidata.org/wiki/Q11205","display_name":"Arithmetic","level":1,"score":0.3481214642524719},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.32480737566947937},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.13212984800338745},{"id":"https://openalex.org/C201995342","wikidata":"https://www.wikidata.org/wiki/Q682496","display_name":"Systems engineering","level":1,"score":0.0},{"id":"https://openalex.org/C114614502","wikidata":"https://www.wikidata.org/wiki/Q76592","display_name":"Combinatorics","level":1,"score":0.0},{"id":"https://openalex.org/C134306372","wikidata":"https://www.wikidata.org/wiki/Q7754","display_name":"Mathematical analysis","level":1,"score":0.0},{"id":"https://openalex.org/C2524010","wikidata":"https://www.wikidata.org/wiki/Q8087","display_name":"Geometry","level":1,"score":0.0},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.0},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/tcsi.2015.2476319","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tcsi.2015.2476319","pdf_url":null,"source":{"id":"https://openalex.org/S116977442","display_name":"IEEE Transactions on Circuits and Systems I Regular Papers","issn_l":"1549-8328","issn":["1549-8328","1558-0806"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Circuits and Systems I: Regular Papers","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[{"score":0.44999998807907104,"display_name":"Industry, innovation and infrastructure","id":"https://metadata.un.org/sdg/9"}],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":42,"referenced_works":["https://openalex.org/W1587217691","https://openalex.org/W1594799231","https://openalex.org/W1912578592","https://openalex.org/W1976278313","https://openalex.org/W1976351748","https://openalex.org/W1988758539","https://openalex.org/W1992728333","https://openalex.org/W2001254103","https://openalex.org/W2007012608","https://openalex.org/W2023879442","https://openalex.org/W2032234591","https://openalex.org/W2044006718","https://openalex.org/W2066263912","https://openalex.org/W2081424900","https://openalex.org/W2087161756","https://openalex.org/W2094465238","https://openalex.org/W2096479326","https://openalex.org/W2098770649","https://openalex.org/W2099181277","https://openalex.org/W2103244632","https://openalex.org/W2105101187","https://openalex.org/W2106668722","https://openalex.org/W2114809199","https://openalex.org/W2119529071","https://openalex.org/W2120173944","https://openalex.org/W2121845226","https://openalex.org/W2127012503","https://openalex.org/W2129513088","https://openalex.org/W2134918682","https://openalex.org/W2135010823","https://openalex.org/W2149397011","https://openalex.org/W2154656381","https://openalex.org/W2156310009","https://openalex.org/W2169484940","https://openalex.org/W2171106398","https://openalex.org/W2535803541","https://openalex.org/W6635434933","https://openalex.org/W6639962401","https://openalex.org/W6652203652","https://openalex.org/W6676955107","https://openalex.org/W6679942550","https://openalex.org/W6728732785"],"related_works":["https://openalex.org/W2556282987","https://openalex.org/W1533508804","https://openalex.org/W1970370079","https://openalex.org/W2098637578","https://openalex.org/W2089343558","https://openalex.org/W4254893742","https://openalex.org/W2015084332","https://openalex.org/W2403291794","https://openalex.org/W2525693927","https://openalex.org/W1998028015"],"abstract_inverted_index":{"Sign-extension":[0],"of":[1,7,19,44,53,59,68,77,83,109,123,138,150,164,169,175,187],"operands":[2],"in":[3,13,17,80,185],"the":[4,38,41,57,74,78,81,90,100,104,110,116,127,136,154,162,173,178],"shift-add":[5,42],"network":[6,43],"multiple":[8],"constant":[9],"multiplication":[10,146],"(MCM)":[11],"results":[12,113],"a":[14,70,96],"significant":[15,106],"overhead":[16,140,163],"terms":[18,186],"hardware":[20],"complexity":[21],"as":[22,24,198],"well":[23],"computation":[25,82],"time.":[26],"This":[27],"paper":[28],"presents":[29],"an":[30,45],"efficient":[31],"approach":[32],"to":[33,88,98,103,121,160],"minimize":[34,89],"that":[35,115],"overhead.":[36,91],"In":[37,172],"proposed":[39,87,117,155,179],"method,":[40],"MCM":[46,124,148,167],"block":[47],"is":[48,86],"partitioned":[49],"into":[50],"three":[51],"types":[52,58],"sub-networks":[54],"based":[55],"on":[56],"fundamentals":[60],"and":[61,194],"interconnections":[62],"they":[63],"involve.":[64],"For":[65],"each":[66],"type":[67],"sub-network,":[69],"scheme":[71],"which":[72],"takes":[73],"best":[75],"advantage":[76],"redundancy":[79],"sign-extension":[84,139,165],"part":[85],"Moreover,":[92],"we":[93],"also":[94],"propose":[95],"technique":[97],"avoid":[99],"additions":[101],"pertaining":[102],"most":[105],"bits":[107],"(MSBs)":[108],"fundamentals.":[111],"Experimental":[112],"show":[114],"method":[118,156,180],"always":[119],"leads":[120],"implementations":[122],"blocks":[125,149,168],"with":[126],"lowest":[128],"critical":[129,188],"path":[130,189],"delay.":[131],"The":[132],"existing":[133],"methods":[134,184],"for":[135,144,166],"minimization":[137],"are":[141],"designed":[142],"particularly":[143],"single":[145],"or":[147],"FIR":[151,176],"filter,":[152],"but":[153],"can":[157],"be":[158],"used":[159],"reduce":[161],"any":[170],"application.":[171],"case":[174],"filters,":[177],"outperforms":[181],"other":[182],"competing":[183],"delay,":[190],"area-delay":[191],"product":[192,196],"(ADP),":[193],"power-delay":[195],"(PDP),":[197],"well.":[199]},"counts_by_year":[{"year":2025,"cited_by_count":1},{"year":2023,"cited_by_count":1},{"year":2020,"cited_by_count":1},{"year":2018,"cited_by_count":3},{"year":2017,"cited_by_count":1}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}