{"id":"https://openalex.org/W2075568400","doi":"https://doi.org/10.1109/tcsi.2015.2403032","title":"High-Throughput LDPC-Decoder Architecture Using Efficient Comparison Techniques &amp;amp; Dynamic Multi-Frame Processing Schedule","display_name":"High-Throughput LDPC-Decoder Architecture Using Efficient Comparison Techniques &amp;amp; Dynamic Multi-Frame Processing Schedule","publication_year":2015,"publication_date":"2015-04-03","ids":{"openalex":"https://openalex.org/W2075568400","doi":"https://doi.org/10.1109/tcsi.2015.2403032","mag":"2075568400"},"language":"en","primary_location":{"id":"doi:10.1109/tcsi.2015.2403032","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tcsi.2015.2403032","pdf_url":null,"source":{"id":"https://openalex.org/S116977442","display_name":"IEEE Transactions on Circuits and Systems I Regular Papers","issn_l":"1549-8328","issn":["1549-8328","1558-0806"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Circuits and Systems I: Regular Papers","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5001882926","display_name":"Sachin Kumawat","orcid":null},"institutions":[{"id":"https://openalex.org/I1317621060","display_name":"Indian Institute of Technology Guwahati","ror":"https://ror.org/0022nd079","country_code":"IN","type":"education","lineage":["https://openalex.org/I1317621060"]}],"countries":["IN"],"is_corresponding":true,"raw_author_name":"Sachin Kumawat","raw_affiliation_strings":["Indian Institute of Technology Guwahati, Guwahati, India","Indian Inst. of Technol. Guwahati, Guwahati, India"],"affiliations":[{"raw_affiliation_string":"Indian Institute of Technology Guwahati, Guwahati, India","institution_ids":["https://openalex.org/I1317621060"]},{"raw_affiliation_string":"Indian Inst. of Technol. Guwahati, Guwahati, India","institution_ids":["https://openalex.org/I1317621060"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5033933825","display_name":"Rahul Shrestha","orcid":"https://orcid.org/0000-0003-2224-0892"},"institutions":[{"id":"https://openalex.org/I65181880","display_name":"Indian Institute of Technology Hyderabad","ror":"https://ror.org/01j4v3x97","country_code":"IN","type":"education","lineage":["https://openalex.org/I65181880"]}],"countries":["IN"],"is_corresponding":false,"raw_author_name":"Rahul Shrestha","raw_affiliation_strings":["Center for VLSI and Embedded System Technology (CVEST), International Institute of Information Technology-Hyderabad (IIIT-H), Hyderabad, Telangana, India","Center for VLSI and Embedded System Technology (CVEST), International Institute of Information Technology-Hyderabad (IIIT-H), Telangana, India"],"affiliations":[{"raw_affiliation_string":"Center for VLSI and Embedded System Technology (CVEST), International Institute of Information Technology-Hyderabad (IIIT-H), Hyderabad, Telangana, India","institution_ids":["https://openalex.org/I65181880"]},{"raw_affiliation_string":"Center for VLSI and Embedded System Technology (CVEST), International Institute of Information Technology-Hyderabad (IIIT-H), Telangana, India","institution_ids":["https://openalex.org/I65181880"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5021593957","display_name":"Nikunj Daga","orcid":null},"institutions":[{"id":"https://openalex.org/I1317621060","display_name":"Indian Institute of Technology Guwahati","ror":"https://ror.org/0022nd079","country_code":"IN","type":"education","lineage":["https://openalex.org/I1317621060"]}],"countries":["IN"],"is_corresponding":false,"raw_author_name":"Nikunj Daga","raw_affiliation_strings":["Indian Institute of Technology Guwahati, Guwahati, India","Indian Inst. of Technol. Guwahati, Guwahati, India"],"affiliations":[{"raw_affiliation_string":"Indian Institute of Technology Guwahati, Guwahati, India","institution_ids":["https://openalex.org/I1317621060"]},{"raw_affiliation_string":"Indian Inst. of Technol. Guwahati, Guwahati, India","institution_ids":["https://openalex.org/I1317621060"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5011453693","display_name":"Roy Paily","orcid":"https://orcid.org/0000-0003-3004-9369"},"institutions":[{"id":"https://openalex.org/I1317621060","display_name":"Indian Institute of Technology Guwahati","ror":"https://ror.org/0022nd079","country_code":"IN","type":"education","lineage":["https://openalex.org/I1317621060"]}],"countries":["IN"],"is_corresponding":false,"raw_author_name":"Roy Paily","raw_affiliation_strings":["Indian Institute of Technology Guwahati, Guwahati, India","Indian Inst. of Technol. Guwahati, Guwahati, India"],"affiliations":[{"raw_affiliation_string":"Indian Institute of Technology Guwahati, Guwahati, India","institution_ids":["https://openalex.org/I1317621060"]},{"raw_affiliation_string":"Indian Inst. of Technol. Guwahati, Guwahati, India","institution_ids":["https://openalex.org/I1317621060"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":4,"corresponding_author_ids":["https://openalex.org/A5001882926"],"corresponding_institution_ids":["https://openalex.org/I1317621060"],"apc_list":null,"apc_paid":null,"fwci":4.9923,"has_fulltext":false,"cited_by_count":49,"citation_normalized_percentile":{"value":0.95577066,"is_in_top_1_percent":false,"is_in_top_10_percent":true},"cited_by_percentile_year":{"min":91,"max":99},"biblio":{"volume":"62","issue":"5","first_page":"1421","last_page":"1430"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11321","display_name":"Error Correcting Code Techniques","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11321","display_name":"Error Correcting Code Techniques","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10125","display_name":"Advanced Wireless Communication Techniques","score":0.9993000030517578,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T13905","display_name":"Telecommunications and Broadcasting Technologies","score":0.9861999750137329,"subfield":{"id":"https://openalex.org/subfields/2214","display_name":"Media Technology"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/low-density-parity-check-code","display_name":"Low-density parity-check code","score":0.8069331645965576},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.7058984637260437},{"id":"https://openalex.org/keywords/pipeline","display_name":"Pipeline (software)","score":0.6629878282546997},{"id":"https://openalex.org/keywords/decoding-methods","display_name":"Decoding methods","score":0.6462064385414124},{"id":"https://openalex.org/keywords/clock-rate","display_name":"Clock rate","score":0.614814817905426},{"id":"https://openalex.org/keywords/throughput","display_name":"Throughput","score":0.5948089361190796},{"id":"https://openalex.org/keywords/block","display_name":"Block (permutation group theory)","score":0.5661469101905823},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.540402352809906},{"id":"https://openalex.org/keywords/schedule","display_name":"Schedule","score":0.5342034101486206},{"id":"https://openalex.org/keywords/code","display_name":"Code (set theory)","score":0.5131388306617737},{"id":"https://openalex.org/keywords/frame","display_name":"Frame (networking)","score":0.46088099479675293},{"id":"https://openalex.org/keywords/soft-decision-decoder","display_name":"Soft-decision decoder","score":0.44848453998565674},{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.41881436109542847},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.4158284366130829},{"id":"https://openalex.org/keywords/electronic-circuit","display_name":"Electronic circuit","score":0.4129124879837036},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.3673135042190552},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.22395068407058716},{"id":"https://openalex.org/keywords/wireless","display_name":"Wireless","score":0.21901795268058777},{"id":"https://openalex.org/keywords/mathematics","display_name":"Mathematics","score":0.1515091061592102},{"id":"https://openalex.org/keywords/telecommunications","display_name":"Telecommunications","score":0.11394867300987244},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.10734835267066956},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.09835019707679749},{"id":"https://openalex.org/keywords/set","display_name":"Set (abstract data type)","score":0.08257842063903809}],"concepts":[{"id":"https://openalex.org/C67692717","wikidata":"https://www.wikidata.org/wiki/Q187444","display_name":"Low-density parity-check code","level":3,"score":0.8069331645965576},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7058984637260437},{"id":"https://openalex.org/C43521106","wikidata":"https://www.wikidata.org/wiki/Q2165493","display_name":"Pipeline (software)","level":2,"score":0.6629878282546997},{"id":"https://openalex.org/C57273362","wikidata":"https://www.wikidata.org/wiki/Q576722","display_name":"Decoding methods","level":2,"score":0.6462064385414124},{"id":"https://openalex.org/C178693496","wikidata":"https://www.wikidata.org/wiki/Q911691","display_name":"Clock rate","level":3,"score":0.614814817905426},{"id":"https://openalex.org/C157764524","wikidata":"https://www.wikidata.org/wiki/Q1383412","display_name":"Throughput","level":3,"score":0.5948089361190796},{"id":"https://openalex.org/C2777210771","wikidata":"https://www.wikidata.org/wiki/Q4927124","display_name":"Block (permutation group theory)","level":2,"score":0.5661469101905823},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.540402352809906},{"id":"https://openalex.org/C68387754","wikidata":"https://www.wikidata.org/wiki/Q7271585","display_name":"Schedule","level":2,"score":0.5342034101486206},{"id":"https://openalex.org/C2776760102","wikidata":"https://www.wikidata.org/wiki/Q5139990","display_name":"Code (set theory)","level":3,"score":0.5131388306617737},{"id":"https://openalex.org/C126042441","wikidata":"https://www.wikidata.org/wiki/Q1324888","display_name":"Frame (networking)","level":2,"score":0.46088099479675293},{"id":"https://openalex.org/C185588885","wikidata":"https://www.wikidata.org/wiki/Q7553811","display_name":"Soft-decision decoder","level":3,"score":0.44848453998565674},{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.41881436109542847},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.4158284366130829},{"id":"https://openalex.org/C134146338","wikidata":"https://www.wikidata.org/wiki/Q1815901","display_name":"Electronic circuit","level":2,"score":0.4129124879837036},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.3673135042190552},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.22395068407058716},{"id":"https://openalex.org/C555944384","wikidata":"https://www.wikidata.org/wiki/Q249","display_name":"Wireless","level":2,"score":0.21901795268058777},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.1515091061592102},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.11394867300987244},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.10734835267066956},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.09835019707679749},{"id":"https://openalex.org/C177264268","wikidata":"https://www.wikidata.org/wiki/Q1514741","display_name":"Set (abstract data type)","level":2,"score":0.08257842063903809},{"id":"https://openalex.org/C165005293","wikidata":"https://www.wikidata.org/wiki/Q1074500","display_name":"Chip","level":2,"score":0.0},{"id":"https://openalex.org/C2524010","wikidata":"https://www.wikidata.org/wiki/Q8087","display_name":"Geometry","level":1,"score":0.0},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.0},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/tcsi.2015.2403032","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tcsi.2015.2403032","pdf_url":null,"source":{"id":"https://openalex.org/S116977442","display_name":"IEEE Transactions on Circuits and Systems I Regular Papers","issn_l":"1549-8328","issn":["1549-8328","1558-0806"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Circuits and Systems I: Regular Papers","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[{"id":"https://metadata.un.org/sdg/7","score":0.9100000262260437,"display_name":"Affordable and clean energy"}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":33,"referenced_works":["https://openalex.org/W1976521930","https://openalex.org/W1997109189","https://openalex.org/W2011630204","https://openalex.org/W2028018024","https://openalex.org/W2032886564","https://openalex.org/W2073548796","https://openalex.org/W2088481695","https://openalex.org/W2095813427","https://openalex.org/W2097728655","https://openalex.org/W2100307260","https://openalex.org/W2101198349","https://openalex.org/W2104023322","https://openalex.org/W2105236249","https://openalex.org/W2113130401","https://openalex.org/W2114239009","https://openalex.org/W2118764568","https://openalex.org/W2121847497","https://openalex.org/W2128765501","https://openalex.org/W2131498089","https://openalex.org/W2138233828","https://openalex.org/W2140228835","https://openalex.org/W2156063738","https://openalex.org/W2156429183","https://openalex.org/W2160879116","https://openalex.org/W2162811899","https://openalex.org/W2163990740","https://openalex.org/W3147799314","https://openalex.org/W4242135463","https://openalex.org/W6658657388","https://openalex.org/W6672540876","https://openalex.org/W6675294435","https://openalex.org/W6675867261","https://openalex.org/W6683745993"],"related_works":["https://openalex.org/W406587413","https://openalex.org/W4244085088","https://openalex.org/W2154078079","https://openalex.org/W2064674583","https://openalex.org/W2035769530","https://openalex.org/W4232356660","https://openalex.org/W2353338231","https://openalex.org/W20893077","https://openalex.org/W2141913236","https://openalex.org/W2889372359"],"abstract_inverted_index":{"This":[0,111],"paper":[1],"presents":[2],"architecture":[3,100],"of":[4,24,61,135,144,154,160],"block-level-parallel":[5],"layered":[6,41,59],"decoder":[7,112],"for":[8,36,57],"irregular":[9],"LDPC":[10],"code.":[11],"It":[12],"can":[13],"be":[14],"reconfigured":[15],"to":[16,47,76,165],"support":[17],"various":[18],"block":[19],"lengths":[20],"and":[21,39,43,104,120,157],"code":[22,123],"rates":[23,124],"IEEE":[25],"802.11n":[26],"(WiFi)":[27],"wireless-communication":[28],"standard.":[29],"We":[30],"have":[31],"proposed":[32,148],"efficient":[33],"comparison":[34],"techniques":[35],"both":[37],"column":[38],"row":[40,58],"schedule":[42,86],"rejection-based":[44],"high-speed":[45],"circuits":[46],"compute":[48],"the":[49,90,147,166],"two":[50],"minimum":[51,94],"values":[52],"from":[53],"multiple":[54,122],"inputs":[55],"required":[56],"processing":[60,85],"hardware-friendly":[62],"min-sum":[63],"decoding":[64,92],"algorithm.":[65],"The":[66,97],"results":[67],"show":[68],"good":[69],"speed":[70],"with":[71,93],"lower":[72],"area":[73,119],"as":[74,131,133,163],"compared":[75,164],"state-of-the-art":[77,168],"circuits.":[78],"Additionally,":[79],"this":[80],"work":[81],"proposes":[82],"dynamic":[83],"multi-frame":[84],"which":[87],"efficiently":[88],"utilizes":[89],"layered-LDPC":[91],"pipeline":[95],"stages.":[96],"suggested":[98],"LDPC-decoder":[99,149],"has":[101,150],"been":[102],"synthesized":[103],"post-layout":[105],"simulated":[106],"in":[107],"90":[108],"nm-CMOS":[109],"process.":[110],"occupies":[113],"5.19":[114],"mm":[115],"<sup":[116],"xmlns:mml=\"http://www.w3.org/1998/Math/MathML\"":[117],"xmlns:xlink=\"http://www.w3.org/1999/xlink\">2</sup>":[118],"supports":[121],"like":[125],"1/2,":[126],"2/3,":[127],"3/4":[128],"&":[129,138],"5/6":[130],"well":[132],"block-lengths":[134],"648,":[136],"1296":[137],"1944.":[139],"At":[140],"a":[141],"clock":[142],"frequency":[143],"336":[145],"MHz,":[146],"achieved":[151],"better":[152],"throughput":[153],"5.13":[155],"Gbps":[156],"energy":[158],"efficiency":[159],"0.01":[161],"nJ/bits/iterations,":[162],"similar":[167],"works.":[169]},"counts_by_year":[{"year":2025,"cited_by_count":1},{"year":2024,"cited_by_count":6},{"year":2023,"cited_by_count":2},{"year":2022,"cited_by_count":7},{"year":2021,"cited_by_count":8},{"year":2020,"cited_by_count":7},{"year":2019,"cited_by_count":3},{"year":2018,"cited_by_count":5},{"year":2017,"cited_by_count":4},{"year":2016,"cited_by_count":4},{"year":2015,"cited_by_count":2}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}