{"id":"https://openalex.org/W2012947974","doi":"https://doi.org/10.1109/tcsi.2014.2366813","title":"Variations in Nanometer CMOS Flip-Flops: Part II\u2014Energy Variability and Impact of Other Sources of Variations","display_name":"Variations in Nanometer CMOS Flip-Flops: Part II\u2014Energy Variability and Impact of Other Sources of Variations","publication_year":2015,"publication_date":"2015-01-13","ids":{"openalex":"https://openalex.org/W2012947974","doi":"https://doi.org/10.1109/tcsi.2014.2366813","mag":"2012947974"},"language":"en","primary_location":{"id":"doi:10.1109/tcsi.2014.2366813","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tcsi.2014.2366813","pdf_url":null,"source":{"id":"https://openalex.org/S116977442","display_name":"IEEE Transactions on Circuits and Systems I Regular Papers","issn_l":"1549-8328","issn":["1549-8328","1558-0806"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Circuits and Systems I: Regular Papers","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5052037141","display_name":"Massimo Alioto","orcid":"https://orcid.org/0000-0002-4127-8258"},"institutions":[{"id":"https://openalex.org/I165932596","display_name":"National University of Singapore","ror":"https://ror.org/01tgyzw49","country_code":"SG","type":"education","lineage":["https://openalex.org/I165932596"]}],"countries":["SG"],"is_corresponding":true,"raw_author_name":"Massimo Alioto","raw_affiliation_strings":["ECE-National University of Singapore, Singapore","[ECE, National University of Singapore, Singapore]"],"affiliations":[{"raw_affiliation_string":"ECE-National University of Singapore, Singapore","institution_ids":["https://openalex.org/I165932596"]},{"raw_affiliation_string":"[ECE, National University of Singapore, Singapore]","institution_ids":["https://openalex.org/I165932596"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5052270052","display_name":"Elio Consoli","orcid":null},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Elio Consoli","raw_affiliation_strings":["Maxim Integrated Products, Catania, Italy","[Maxim Integrated Products, Catania, Italy]"],"affiliations":[{"raw_affiliation_string":"Maxim Integrated Products, Catania, Italy","institution_ids":[]},{"raw_affiliation_string":"[Maxim Integrated Products, Catania, Italy]","institution_ids":[]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5044422028","display_name":"G. Palumbo","orcid":"https://orcid.org/0000-0002-8011-8660"},"institutions":[{"id":"https://openalex.org/I39063666","display_name":"University of Catania","ror":"https://ror.org/03a64bh57","country_code":"IT","type":"education","lineage":["https://openalex.org/I39063666"]}],"countries":["IT"],"is_corresponding":false,"raw_author_name":"Gaetano Palumbo","raw_affiliation_strings":["DIEEI, Universit\u00e0 di Catania, Catania, Italy","[DIEEI, Universit\u00e0 di Catania, Catania, Italy]"],"affiliations":[{"raw_affiliation_string":"DIEEI, Universit\u00e0 di Catania, Catania, Italy","institution_ids":["https://openalex.org/I39063666"]},{"raw_affiliation_string":"[DIEEI, Universit\u00e0 di Catania, Catania, Italy]","institution_ids":["https://openalex.org/I39063666"]}]}],"institutions":[],"countries_distinct_count":2,"institutions_distinct_count":3,"corresponding_author_ids":["https://openalex.org/A5052037141"],"corresponding_institution_ids":["https://openalex.org/I165932596"],"apc_list":null,"apc_paid":null,"fwci":1.8063,"has_fulltext":false,"cited_by_count":26,"citation_normalized_percentile":{"value":0.86586684,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":90,"max":98},"biblio":{"volume":"62","issue":"3","first_page":"835","last_page":"843"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10558","display_name":"Advancements in Semiconductor Devices and Circuit Design","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10472","display_name":"Semiconductor materials and devices","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/flops","display_name":"FLOPS","score":0.7567330598831177},{"id":"https://openalex.org/keywords/network-topology","display_name":"Network topology","score":0.7461522221565247},{"id":"https://openalex.org/keywords/flip-flop","display_name":"Flip-flop","score":0.6689150929450989},{"id":"https://openalex.org/keywords/scaling","display_name":"Scaling","score":0.6356848478317261},{"id":"https://openalex.org/keywords/ranking","display_name":"Ranking (information retrieval)","score":0.5591144561767578},{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.5498858690261841},{"id":"https://openalex.org/keywords/clock-network","display_name":"Clock network","score":0.5240221619606018},{"id":"https://openalex.org/keywords/perspective","display_name":"Perspective (graphical)","score":0.5236687064170837},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.49808788299560547},{"id":"https://openalex.org/keywords/enhanced-data-rates-for-gsm-evolution","display_name":"Enhanced Data Rates for GSM Evolution","score":0.4766429364681244},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.4766300916671753},{"id":"https://openalex.org/keywords/topology","display_name":"Topology (electrical circuits)","score":0.4746321439743042},{"id":"https://openalex.org/keywords/selection","display_name":"Selection (genetic algorithm)","score":0.4143049120903015},{"id":"https://openalex.org/keywords/electronic-circuit","display_name":"Electronic circuit","score":0.40745311975479126},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.26110875606536865},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.25265729427337646},{"id":"https://openalex.org/keywords/mathematics","display_name":"Mathematics","score":0.21911728382110596},{"id":"https://openalex.org/keywords/telecommunications","display_name":"Telecommunications","score":0.154812753200531},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.10234242677688599},{"id":"https://openalex.org/keywords/computer-network","display_name":"Computer network","score":0.08106020092964172}],"concepts":[{"id":"https://openalex.org/C3826847","wikidata":"https://www.wikidata.org/wiki/Q188768","display_name":"FLOPS","level":2,"score":0.7567330598831177},{"id":"https://openalex.org/C199845137","wikidata":"https://www.wikidata.org/wiki/Q145490","display_name":"Network topology","level":2,"score":0.7461522221565247},{"id":"https://openalex.org/C2781007278","wikidata":"https://www.wikidata.org/wiki/Q183406","display_name":"Flip-flop","level":3,"score":0.6689150929450989},{"id":"https://openalex.org/C99844830","wikidata":"https://www.wikidata.org/wiki/Q102441924","display_name":"Scaling","level":2,"score":0.6356848478317261},{"id":"https://openalex.org/C189430467","wikidata":"https://www.wikidata.org/wiki/Q7293293","display_name":"Ranking (information retrieval)","level":2,"score":0.5591144561767578},{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.5498858690261841},{"id":"https://openalex.org/C2778182565","wikidata":"https://www.wikidata.org/wiki/Q1752879","display_name":"Clock network","level":5,"score":0.5240221619606018},{"id":"https://openalex.org/C12713177","wikidata":"https://www.wikidata.org/wiki/Q1900281","display_name":"Perspective (graphical)","level":2,"score":0.5236687064170837},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.49808788299560547},{"id":"https://openalex.org/C162307627","wikidata":"https://www.wikidata.org/wiki/Q204833","display_name":"Enhanced Data Rates for GSM Evolution","level":2,"score":0.4766429364681244},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.4766300916671753},{"id":"https://openalex.org/C184720557","wikidata":"https://www.wikidata.org/wiki/Q7825049","display_name":"Topology (electrical circuits)","level":2,"score":0.4746321439743042},{"id":"https://openalex.org/C81917197","wikidata":"https://www.wikidata.org/wiki/Q628760","display_name":"Selection (genetic algorithm)","level":2,"score":0.4143049120903015},{"id":"https://openalex.org/C134146338","wikidata":"https://www.wikidata.org/wiki/Q1815901","display_name":"Electronic circuit","level":2,"score":0.40745311975479126},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.26110875606536865},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.25265729427337646},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.21911728382110596},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.154812753200531},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.10234242677688599},{"id":"https://openalex.org/C31258907","wikidata":"https://www.wikidata.org/wiki/Q1301371","display_name":"Computer network","level":1,"score":0.08106020092964172},{"id":"https://openalex.org/C154945302","wikidata":"https://www.wikidata.org/wiki/Q11660","display_name":"Artificial intelligence","level":1,"score":0.0},{"id":"https://openalex.org/C2524010","wikidata":"https://www.wikidata.org/wiki/Q8087","display_name":"Geometry","level":1,"score":0.0},{"id":"https://openalex.org/C42196554","wikidata":"https://www.wikidata.org/wiki/Q1186179","display_name":"Synchronous circuit","level":4,"score":0.0},{"id":"https://openalex.org/C119857082","wikidata":"https://www.wikidata.org/wiki/Q2539","display_name":"Machine learning","level":1,"score":0.0},{"id":"https://openalex.org/C137059387","wikidata":"https://www.wikidata.org/wiki/Q426882","display_name":"Clock signal","level":3,"score":0.0}],"mesh":[],"locations_count":2,"locations":[{"id":"doi:10.1109/tcsi.2014.2366813","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tcsi.2014.2366813","pdf_url":null,"source":{"id":"https://openalex.org/S116977442","display_name":"IEEE Transactions on Circuits and Systems I Regular Papers","issn_l":"1549-8328","issn":["1549-8328","1558-0806"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Circuits and Systems I: Regular Papers","raw_type":"journal-article"},{"id":"pmh:oai:scholarbank.nus.edu.sg:10635/123470","is_oa":false,"landing_page_url":"http://scholarbank.nus.edu.sg/handle/10635/123470","pdf_url":null,"source":{"id":"https://openalex.org/S7407052290","display_name":"National University of Singapore","issn_l":null,"issn":[],"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":null,"host_organization_name":null,"host_organization_lineage":[],"host_organization_lineage_names":[],"type":"repository"},"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"","raw_type":"Article"}],"best_oa_location":null,"sustainable_development_goals":[{"id":"https://metadata.un.org/sdg/7","display_name":"Affordable and clean energy","score":0.8500000238418579}],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":27,"referenced_works":["https://openalex.org/W1484135661","https://openalex.org/W1488567546","https://openalex.org/W1596644655","https://openalex.org/W1761143336","https://openalex.org/W1776668917","https://openalex.org/W1986907977","https://openalex.org/W2044076290","https://openalex.org/W2056378213","https://openalex.org/W2085458736","https://openalex.org/W2097193789","https://openalex.org/W2113458531","https://openalex.org/W2113735631","https://openalex.org/W2125117969","https://openalex.org/W2134067926","https://openalex.org/W2138724413","https://openalex.org/W2140480749","https://openalex.org/W2141881829","https://openalex.org/W2149778532","https://openalex.org/W2151254061","https://openalex.org/W2164002677","https://openalex.org/W3089937351","https://openalex.org/W4229627167","https://openalex.org/W4231252248","https://openalex.org/W4301349926","https://openalex.org/W6628733527","https://openalex.org/W6635798368","https://openalex.org/W6638000668"],"related_works":["https://openalex.org/W2061189889","https://openalex.org/W2149388434","https://openalex.org/W4240499967","https://openalex.org/W2024069812","https://openalex.org/W4321843896","https://openalex.org/W1235669242","https://openalex.org/W52609617","https://openalex.org/W2886813482","https://openalex.org/W1969390180","https://openalex.org/W2198420277"],"abstract_inverted_index":{"In":[0,20],"this":[1,22,131],"paper,":[2],"the":[3,38,46,59,76,86,103,120,127,134,137],"impact":[4],"of":[5,18,28,43,85,93,109,130,136],"variations":[6,29,35,44,68,94],"on":[7,45,66],"single-edge":[8],"triggered":[9],"flip-flops":[10],"(FFs)":[11],"is":[12,53,64],"evaluated":[13],"for":[14,82,90],"a":[15,73],"wide":[16],"range":[17],"topologies.":[19,139],"particular,":[21],"Part":[23,61],"II":[24],"explicitly":[25],"considers":[26],"sources":[27],"such":[30],"as":[31],"voltage,":[32],"temperature":[33],"and":[34,48,69,89,113],"induced":[36],"by":[37],"clock":[39],"network.":[40],"The":[41,116],"effect":[42],"energy":[47],"its":[49],"tradeoff":[50],"with":[51],"performance":[52],"also":[54],"investigated.":[55],"This":[56],"paper":[57],"complements":[58],"previous":[60],"I,":[62],"which":[63],"focused":[65],"process":[67],"flip-flop":[70,87],"timing.":[71],"From":[72],"design":[74],"perspective,":[75],"presented":[77],"results":[78,110,117],"provide":[79],"well-defined":[80],"guidelines":[81],"variation-aware":[83],"selection":[84],"topologies,":[88],"early":[91],"budgeting":[92],"before":[95],"detailed":[96],"circuit":[97],"design.":[98],"Results":[99],"are":[100],"put":[101],"into":[102],"technology":[104,121],"scaling":[105,122],"perspective":[106],"through":[107],"comparison":[108],"at":[111],"65":[112],"28":[114],"nm.":[115],"show":[118],"that":[119],"does":[123],"not":[124],"affect":[125],"either":[126],"main":[128],"findings":[129],"analysis":[132],"or":[133],"ranking":[135],"considered":[138]},"counts_by_year":[{"year":2025,"cited_by_count":1},{"year":2024,"cited_by_count":1},{"year":2023,"cited_by_count":6},{"year":2022,"cited_by_count":2},{"year":2021,"cited_by_count":2},{"year":2020,"cited_by_count":3},{"year":2019,"cited_by_count":2},{"year":2018,"cited_by_count":2},{"year":2017,"cited_by_count":1},{"year":2016,"cited_by_count":4},{"year":2015,"cited_by_count":2}],"updated_date":"2026-04-05T17:49:38.594831","created_date":"2025-10-10T00:00:00"}