{"id":"https://openalex.org/W1975663766","doi":"https://doi.org/10.1109/tcsi.2014.2349577","title":"High-Throughput Finite Field Multipliers Using Redundant Basis for FPGA and ASIC Implementations","display_name":"High-Throughput Finite Field Multipliers Using Redundant Basis for FPGA and ASIC Implementations","publication_year":2014,"publication_date":"2014-10-01","ids":{"openalex":"https://openalex.org/W1975663766","doi":"https://doi.org/10.1109/tcsi.2014.2349577","mag":"1975663766"},"language":"en","primary_location":{"id":"doi:10.1109/tcsi.2014.2349577","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tcsi.2014.2349577","pdf_url":null,"source":{"id":"https://openalex.org/S116977442","display_name":"IEEE Transactions on Circuits and Systems I Regular Papers","issn_l":"1549-8328","issn":["1549-8328","1558-0806"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Circuits and Systems I: Regular Papers","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5027261160","display_name":"Jiafeng Xie","orcid":"https://orcid.org/0000-0002-4814-1318"},"institutions":[{"id":"https://openalex.org/I170201317","display_name":"University of Pittsburgh","ror":"https://ror.org/01an3r305","country_code":"US","type":"education","lineage":["https://openalex.org/I170201317"]}],"countries":["US"],"is_corresponding":true,"raw_author_name":"Jiafeng Xie","raw_affiliation_strings":["Department of Electrical and Computer Engineering, University of Pittsburgh, Pittsburgh, PA, USA","Department of Electrical & Computer Engineering, University of Pittsburgh, Pittsburgh, PA, USA"],"affiliations":[{"raw_affiliation_string":"Department of Electrical and Computer Engineering, University of Pittsburgh, Pittsburgh, PA, USA","institution_ids":["https://openalex.org/I170201317"]},{"raw_affiliation_string":"Department of Electrical & Computer Engineering, University of Pittsburgh, Pittsburgh, PA, USA","institution_ids":["https://openalex.org/I170201317"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5025809855","display_name":"Pramod Kumar Meher","orcid":"https://orcid.org/0000-0003-0992-1159"},"institutions":[{"id":"https://openalex.org/I172675005","display_name":"Nanyang Technological University","ror":"https://ror.org/02e7b5302","country_code":"SG","type":"education","lineage":["https://openalex.org/I172675005"]}],"countries":["SG"],"is_corresponding":false,"raw_author_name":"Pramod Kumar Meher","raw_affiliation_strings":["School of Computer Engineering, Nanyang Technological University, Singapore","School of Computer Engineering, Nanyang Technological University,,Singapore"],"affiliations":[{"raw_affiliation_string":"School of Computer Engineering, Nanyang Technological University, Singapore","institution_ids":["https://openalex.org/I172675005"]},{"raw_affiliation_string":"School of Computer Engineering, Nanyang Technological University,,Singapore","institution_ids":["https://openalex.org/I172675005"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5010117375","display_name":"Zhi\u2010Hong Mao","orcid":"https://orcid.org/0000-0002-3025-463X"},"institutions":[{"id":"https://openalex.org/I170201317","display_name":"University of Pittsburgh","ror":"https://ror.org/01an3r305","country_code":"US","type":"education","lineage":["https://openalex.org/I170201317"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Zhi-Hong Mao","raw_affiliation_strings":["Department of Electrical and Computer Engineering, University of Pittsburgh, Pittsburgh, PA, USA","Department of Electrical & Computer Engineering, University of Pittsburgh, Pittsburgh, PA, USA"],"affiliations":[{"raw_affiliation_string":"Department of Electrical and Computer Engineering, University of Pittsburgh, Pittsburgh, PA, USA","institution_ids":["https://openalex.org/I170201317"]},{"raw_affiliation_string":"Department of Electrical & Computer Engineering, University of Pittsburgh, Pittsburgh, PA, USA","institution_ids":["https://openalex.org/I170201317"]}]}],"institutions":[],"countries_distinct_count":2,"institutions_distinct_count":3,"corresponding_author_ids":["https://openalex.org/A5027261160"],"corresponding_institution_ids":["https://openalex.org/I170201317"],"apc_list":null,"apc_paid":null,"fwci":7.26251011,"has_fulltext":false,"cited_by_count":16,"citation_normalized_percentile":{"value":0.96564371,"is_in_top_1_percent":false,"is_in_top_10_percent":true},"cited_by_percentile_year":{"min":89,"max":98},"biblio":{"volume":"62","issue":"1","first_page":"110","last_page":"119"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11693","display_name":"Cryptography and Residue Arithmetic","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1710","display_name":"Information Systems"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11693","display_name":"Cryptography and Residue Arithmetic","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1710","display_name":"Information Systems"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11130","display_name":"Coding theory and cryptography","score":0.9983999729156494,"subfield":{"id":"https://openalex.org/subfields/1702","display_name":"Artificial Intelligence"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10951","display_name":"Cryptographic Implementations and Security","score":0.9941999912261963,"subfield":{"id":"https://openalex.org/subfields/1702","display_name":"Artificial Intelligence"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/application-specific-integrated-circuit","display_name":"Application-specific integrated circuit","score":0.8481766581535339},{"id":"https://openalex.org/keywords/retiming","display_name":"Retiming","score":0.8346686363220215},{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.792180061340332},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.6846402883529663},{"id":"https://openalex.org/keywords/galois-theory","display_name":"Galois theory","score":0.5504676699638367},{"id":"https://openalex.org/keywords/gate-array","display_name":"Gate array","score":0.5478156208992004},{"id":"https://openalex.org/keywords/elliptic-curve-cryptography","display_name":"Elliptic curve cryptography","score":0.47948938608169556},{"id":"https://openalex.org/keywords/throughput","display_name":"Throughput","score":0.4374885857105255},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.4099382758140564},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.3768376410007477},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.3434920310974121},{"id":"https://openalex.org/keywords/arithmetic","display_name":"Arithmetic","score":0.334561824798584},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.3320821225643158},{"id":"https://openalex.org/keywords/mathematics","display_name":"Mathematics","score":0.24176761507987976},{"id":"https://openalex.org/keywords/encryption","display_name":"Encryption","score":0.14466553926467896}],"concepts":[{"id":"https://openalex.org/C77390884","wikidata":"https://www.wikidata.org/wiki/Q217302","display_name":"Application-specific integrated circuit","level":2,"score":0.8481766581535339},{"id":"https://openalex.org/C41112130","wikidata":"https://www.wikidata.org/wiki/Q2146175","display_name":"Retiming","level":2,"score":0.8346686363220215},{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.792180061340332},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.6846402883529663},{"id":"https://openalex.org/C94398972","wikidata":"https://www.wikidata.org/wiki/Q92552","display_name":"Galois theory","level":2,"score":0.5504676699638367},{"id":"https://openalex.org/C114237110","wikidata":"https://www.wikidata.org/wiki/Q114901","display_name":"Gate array","level":3,"score":0.5478156208992004},{"id":"https://openalex.org/C167615521","wikidata":"https://www.wikidata.org/wiki/Q1048911","display_name":"Elliptic curve cryptography","level":4,"score":0.47948938608169556},{"id":"https://openalex.org/C157764524","wikidata":"https://www.wikidata.org/wiki/Q1383412","display_name":"Throughput","level":3,"score":0.4374885857105255},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.4099382758140564},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.3768376410007477},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.3434920310974121},{"id":"https://openalex.org/C94375191","wikidata":"https://www.wikidata.org/wiki/Q11205","display_name":"Arithmetic","level":1,"score":0.334561824798584},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.3320821225643158},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.24176761507987976},{"id":"https://openalex.org/C148730421","wikidata":"https://www.wikidata.org/wiki/Q141090","display_name":"Encryption","level":2,"score":0.14466553926467896},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.0},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.0},{"id":"https://openalex.org/C555944384","wikidata":"https://www.wikidata.org/wiki/Q249","display_name":"Wireless","level":2,"score":0.0},{"id":"https://openalex.org/C203062551","wikidata":"https://www.wikidata.org/wiki/Q201339","display_name":"Public-key cryptography","level":3,"score":0.0},{"id":"https://openalex.org/C118615104","wikidata":"https://www.wikidata.org/wiki/Q121416","display_name":"Discrete mathematics","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/tcsi.2014.2349577","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tcsi.2014.2349577","pdf_url":null,"source":{"id":"https://openalex.org/S116977442","display_name":"IEEE Transactions on Circuits and Systems I Regular Papers","issn_l":"1549-8328","issn":["1549-8328","1558-0806"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Circuits and Systems I: Regular Papers","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[{"display_name":"Affordable and clean energy","score":0.5,"id":"https://metadata.un.org/sdg/7"}],"awards":[{"id":"https://openalex.org/G4664140382","display_name":null,"funder_award_id":"CNS-0964079","funder_id":"https://openalex.org/F4320306076","funder_display_name":"National Science Foundation"}],"funders":[{"id":"https://openalex.org/F4320306076","display_name":"National Science Foundation","ror":"https://ror.org/021nxhr62"}],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":21,"referenced_works":["https://openalex.org/W1501488688","https://openalex.org/W1508193711","https://openalex.org/W1540945387","https://openalex.org/W1894395730","https://openalex.org/W1976256980","https://openalex.org/W2015158138","https://openalex.org/W2032523493","https://openalex.org/W2072057413","https://openalex.org/W2084897040","https://openalex.org/W2098574157","https://openalex.org/W2102291315","https://openalex.org/W2106641903","https://openalex.org/W2108669494","https://openalex.org/W2149910591","https://openalex.org/W2152511894","https://openalex.org/W2156709477","https://openalex.org/W2161080473","https://openalex.org/W2162915244","https://openalex.org/W2164336166","https://openalex.org/W2167456209","https://openalex.org/W4233307210"],"related_works":["https://openalex.org/W2134549436","https://openalex.org/W233224440","https://openalex.org/W2160236198","https://openalex.org/W1951668625","https://openalex.org/W2903287280","https://openalex.org/W3140976369","https://openalex.org/W2132158474","https://openalex.org/W4238503248","https://openalex.org/W1937646452","https://openalex.org/W2788804672"],"abstract_inverted_index":{"Redundant":[0],"basis":[1],"(RB)":[2],"multipliers":[3,92,128],"over":[4,129,203],"Galois":[5],"Field":[6],"(":[7],"GF(2":[8],"<sup":[9],"xmlns:mml=\"http://www.w3.org/1998/Math/MathML\"":[10],"xmlns:xlink=\"http://www.w3.org/1999/xlink\">m</sup>":[11],"))":[12],"have":[13,38,77],"gained":[14],"huge":[15],"popularity":[16],"in":[17],"elliptic":[18],"curve":[19],"cryptography":[20],"(ECC)":[21],"mainly":[22],"because":[23],"of":[24,56,60,126,149,194,206],"their":[25],"negligible":[26],"hardware":[27],"cost":[28],"for":[29,45,136,174],"squaring":[30],"and":[31,82,109,120,142,153,176,191,200],"modular":[32],"reduction.":[33],"In":[34],"this":[35],"paper,":[36],"we":[37,76],"proposed":[39,62,127,151,164,184],"a":[40,64],"novel":[41,91],"recursive":[42],"decomposition":[43],"algorithm":[44],"RB":[46],"multiplication":[47],"to":[48,88,189],"obtain":[49],"high-throughput":[50,165],"digit-serial":[51],"implementation.":[52,178],"Through":[53],"efficient":[54,84],"projection":[55],"signal-flow":[57],"graph":[58],"(SFG)":[59],"the":[61,79,101,115,124,130,150,163,168,171,183,204,207],"algorithm,":[63],"highly":[65],"regular":[66],"processor-space":[67],"flow-graph":[68],"(PSFG)":[69],"is":[70,160,180],"derived.":[71],"By":[72],"identifying":[73],"suitable":[74],"cut-sets,":[75],"modified":[78],"PSFG":[80],"suitably":[81],"performed":[83],"feed-forward":[85],"cut-set":[86],"retiming":[87],"derive":[89],"three":[90],"which":[93],"not":[94],"only":[95],"involve":[96],"significantly":[97],"less":[98,107,110],"time-complexity":[99],"than":[100],"existing":[102,131,155,208],"ones":[103],"but":[104],"also":[105],"require":[106],"area":[108],"power":[111],"consumption":[112],"compared":[113],"with":[114],"others.":[116],"Both":[117],"theoretical":[118],"analysis":[119],"synthesis":[121,134],"results":[122,135],"confirm":[123],"efficiency":[125],"ones.":[132],"The":[133],"field":[137],"programmable":[138],"gate":[139],"array":[140],"(FPGA)":[141],"application":[143],"specific":[144],"integrated":[145],"circuit":[146],"(ASIC)":[147],"realization":[148],"designs":[152,156,185],"competing":[154],"are":[157,167],"compared.":[158],"It":[159,179],"shown":[161,181],"that":[162,182],"structures":[166],"best":[169,205],"among":[170],"corresponding":[172],"designs,":[173,209],"FPGA":[175,199],"ASIC":[177,201],"can":[186],"achieve":[187],"up":[188],"94%":[190],"60%":[192],"savings":[193],"area-delay-power":[195],"product":[196],"(ADPP)":[197],"on":[198],"implementation":[202],"respectively.":[210]},"counts_by_year":[{"year":2025,"cited_by_count":1},{"year":2021,"cited_by_count":1},{"year":2019,"cited_by_count":2},{"year":2018,"cited_by_count":3},{"year":2017,"cited_by_count":4},{"year":2016,"cited_by_count":3},{"year":2015,"cited_by_count":2}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}