{"id":"https://openalex.org/W1981151840","doi":"https://doi.org/10.1109/tcsi.2014.2340551","title":"Time-Mode Analog-to-Digital Conversion Using Standard Cells","display_name":"Time-Mode Analog-to-Digital Conversion Using Standard Cells","publication_year":2014,"publication_date":"2014-10-22","ids":{"openalex":"https://openalex.org/W1981151840","doi":"https://doi.org/10.1109/tcsi.2014.2340551","mag":"1981151840"},"language":"en","primary_location":{"id":"doi:10.1109/tcsi.2014.2340551","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tcsi.2014.2340551","pdf_url":null,"source":{"id":"https://openalex.org/S116977442","display_name":"IEEE Transactions on Circuits and Systems I Regular Papers","issn_l":"1549-8328","issn":["1549-8328","1558-0806"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Circuits and Systems I: Regular Papers","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":true,"oa_status":"green","oa_url":"http://urn.kb.se/resolve?urn=urn:nbn:se:liu:diva-113048","any_repository_has_fulltext":true},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5015336201","display_name":"Vishnu Unnikrishnan","orcid":"https://orcid.org/0000-0002-1410-3890"},"institutions":[{"id":"https://openalex.org/I102134673","display_name":"Link\u00f6ping University","ror":"https://ror.org/05ynxx418","country_code":"SE","type":"education","lineage":["https://openalex.org/I102134673"]}],"countries":["SE"],"is_corresponding":true,"raw_author_name":"Vishnu Unnikrishnan","raw_affiliation_strings":["Division of Electronics Systems, Link\u00f6ping University, Link\u00f6ping, Sweden","[Division of Electronics Systems, Department of Electrical Engineering, Link\u00f6ping University, Linkoping, Sweden]"],"affiliations":[{"raw_affiliation_string":"Division of Electronics Systems, Link\u00f6ping University, Link\u00f6ping, Sweden","institution_ids":["https://openalex.org/I102134673"]},{"raw_affiliation_string":"[Division of Electronics Systems, Department of Electrical Engineering, Link\u00f6ping University, Linkoping, Sweden]","institution_ids":["https://openalex.org/I102134673"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5047505166","display_name":"Mark Vesterbacka","orcid":null},"institutions":[{"id":"https://openalex.org/I102134673","display_name":"Link\u00f6ping University","ror":"https://ror.org/05ynxx418","country_code":"SE","type":"education","lineage":["https://openalex.org/I102134673"]}],"countries":["SE"],"is_corresponding":false,"raw_author_name":"Mark Vesterbacka","raw_affiliation_strings":["Division of Electronics Systems, Link\u00f6ping University, Link\u00f6ping, Sweden","[Division of Electronics Systems, Department of Electrical Engineering, Link\u00f6ping University, Linkoping, Sweden]"],"affiliations":[{"raw_affiliation_string":"Division of Electronics Systems, Link\u00f6ping University, Link\u00f6ping, Sweden","institution_ids":["https://openalex.org/I102134673"]},{"raw_affiliation_string":"[Division of Electronics Systems, Department of Electrical Engineering, Link\u00f6ping University, Linkoping, Sweden]","institution_ids":["https://openalex.org/I102134673"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":2,"corresponding_author_ids":["https://openalex.org/A5015336201"],"corresponding_institution_ids":["https://openalex.org/I102134673"],"apc_list":null,"apc_paid":null,"fwci":2.9957,"has_fulltext":false,"cited_by_count":59,"citation_normalized_percentile":{"value":0.90261955,"is_in_top_1_percent":false,"is_in_top_10_percent":true},"cited_by_percentile_year":{"min":96,"max":99},"biblio":{"volume":"61","issue":"12","first_page":"3348","last_page":"3357"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11417","display_name":"Advancements in PLL and VCO Technologies","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/voltage-controlled-oscillator","display_name":"Voltage-controlled oscillator","score":0.7290481328964233},{"id":"https://openalex.org/keywords/effective-number-of-bits","display_name":"Effective number of bits","score":0.6947864294052124},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.5995604395866394},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.5749772787094116},{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.571742057800293},{"id":"https://openalex.org/keywords/linearity","display_name":"Linearity","score":0.45716536045074463},{"id":"https://openalex.org/keywords/sampling","display_name":"Sampling (signal processing)","score":0.4372815787792206},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.22197788953781128},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.21505436301231384},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.1341116726398468},{"id":"https://openalex.org/keywords/filter","display_name":"Filter (signal processing)","score":0.11381655931472778}],"concepts":[{"id":"https://openalex.org/C5291336","wikidata":"https://www.wikidata.org/wiki/Q852341","display_name":"Voltage-controlled oscillator","level":3,"score":0.7290481328964233},{"id":"https://openalex.org/C16671190","wikidata":"https://www.wikidata.org/wiki/Q505579","display_name":"Effective number of bits","level":3,"score":0.6947864294052124},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.5995604395866394},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.5749772787094116},{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.571742057800293},{"id":"https://openalex.org/C77170095","wikidata":"https://www.wikidata.org/wiki/Q1753188","display_name":"Linearity","level":2,"score":0.45716536045074463},{"id":"https://openalex.org/C140779682","wikidata":"https://www.wikidata.org/wiki/Q210868","display_name":"Sampling (signal processing)","level":3,"score":0.4372815787792206},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.22197788953781128},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.21505436301231384},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.1341116726398468},{"id":"https://openalex.org/C106131492","wikidata":"https://www.wikidata.org/wiki/Q3072260","display_name":"Filter (signal processing)","level":2,"score":0.11381655931472778},{"id":"https://openalex.org/C31972630","wikidata":"https://www.wikidata.org/wiki/Q844240","display_name":"Computer vision","level":1,"score":0.0}],"mesh":[],"locations_count":2,"locations":[{"id":"doi:10.1109/tcsi.2014.2340551","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tcsi.2014.2340551","pdf_url":null,"source":{"id":"https://openalex.org/S116977442","display_name":"IEEE Transactions on Circuits and Systems I Regular Papers","issn_l":"1549-8328","issn":["1549-8328","1558-0806"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Circuits and Systems I: Regular Papers","raw_type":"journal-article"},{"id":"pmh:oai:DiVA.org:liu-113048","is_oa":true,"landing_page_url":"http://urn.kb.se/resolve?urn=urn:nbn:se:liu:diva-113048","pdf_url":null,"source":{"id":"https://openalex.org/S4306401559","display_name":"KTH Publication Database DiVA (KTH Royal Institute of Technology)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":null,"host_organization_name":null,"host_organization_lineage":[],"host_organization_lineage_names":[],"type":"repository"},"license":"other-oa","license_id":"https://openalex.org/licenses/other-oa","version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"","raw_type":"Article in journal"}],"best_oa_location":{"id":"pmh:oai:DiVA.org:liu-113048","is_oa":true,"landing_page_url":"http://urn.kb.se/resolve?urn=urn:nbn:se:liu:diva-113048","pdf_url":null,"source":{"id":"https://openalex.org/S4306401559","display_name":"KTH Publication Database DiVA (KTH Royal Institute of Technology)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":null,"host_organization_name":null,"host_organization_lineage":[],"host_organization_lineage_names":[],"type":"repository"},"license":"other-oa","license_id":"https://openalex.org/licenses/other-oa","version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"","raw_type":"Article in journal"},"sustainable_development_goals":[{"id":"https://metadata.un.org/sdg/7","score":0.4000000059604645,"display_name":"Affordable and clean energy"}],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":25,"referenced_works":["https://openalex.org/W1513447798","https://openalex.org/W1864703715","https://openalex.org/W1972427123","https://openalex.org/W1973824493","https://openalex.org/W1995733996","https://openalex.org/W2006427734","https://openalex.org/W2007740330","https://openalex.org/W2011037663","https://openalex.org/W2018736198","https://openalex.org/W2029595387","https://openalex.org/W2085806603","https://openalex.org/W2097424531","https://openalex.org/W2104527935","https://openalex.org/W2110245858","https://openalex.org/W2125324513","https://openalex.org/W2126886945","https://openalex.org/W2134067926","https://openalex.org/W2134926592","https://openalex.org/W2147539712","https://openalex.org/W2153293882","https://openalex.org/W2157194265","https://openalex.org/W2266633017","https://openalex.org/W6639292065","https://openalex.org/W6657491755","https://openalex.org/W6693309414"],"related_works":["https://openalex.org/W2013885492","https://openalex.org/W2147629812","https://openalex.org/W2384129596","https://openalex.org/W2134342138","https://openalex.org/W2130767819","https://openalex.org/W2138923007","https://openalex.org/W1941231194","https://openalex.org/W1584582224","https://openalex.org/W2120279355","https://openalex.org/W2393073187"],"abstract_inverted_index":{"Synthesizable":[0],"all-digital":[1],"ADCs":[2,39],"that":[3,170],"can":[4],"be":[5],"designed,":[6],"verified":[7],"and":[8,27,43,86,146,187],"taped":[9],"out":[10],"using":[11,41],"a":[12,21,33,63,67,98,141,154],"digital":[13,53,111,118],"design":[14,25,61,131],"flow":[15],"are":[16],"of":[17,83,107,110,150,157,171,193,199],"interest":[18],"due":[19,78,90],"to":[20,79,91,125,169],"consequent":[22],"reduction":[23],"in":[24,113,140],"cost":[26],"an":[28,47,148,197],"improved":[29],"technology":[30],"portability.":[31],"As":[32],"step":[34],"towards":[35],"high":[36],"performance":[37,166],"synthesizable":[38],"built":[40],"generic":[42],"low":[44,190],"accuracy":[45],"components,":[46],"ADC":[48,73],"designed":[49,175,182],"exclusively":[50,183],"with":[51,184],"standard":[52,185],"cell":[54],"library":[55],"components":[56],"is":[57,62,123,167],"presented.":[58],"The":[59,72,94,130,165],"proposed":[60,95,124],"time-mode":[64],"circuit":[65],"employing":[66,120],"VCO":[68,128],"based":[69,100],"multi-bit":[70,114],"quantizer.":[71],"has":[74],"first":[75],"order":[76],"noise-shaping":[77],"inherent":[80],"error":[81],"feedback":[82],"the":[84,105],"oscillator":[85],"sinc":[87],"anti-aliasing":[88],"filtering":[89],"continuous-time":[92],"sampling.":[93],"architecture":[96],"employs":[97],"Gray-counter":[99],"quantizer":[101],"design,":[102],"which":[103],"mitigates":[104],"problem":[106],"partial":[108],"sampling":[109,161],"data":[112],"VCO-based":[115,178],"quantizers.":[116],"Furthermore,":[117],"correction":[119],"polynomial-fit":[121],"estimation":[122],"correct":[126],"for":[127],"non-linearity.":[129],"occupies":[132],"0.026":[133],"mm":[134],"<sup":[135],"xmlns:mml=\"http://www.w3.org/1998/Math/MathML\"":[136],"xmlns:xlink=\"http://www.w3.org/1999/xlink\">2</sup>":[137],"when":[138],"fabricated":[139],"65":[142],"nm":[143],"CMOS":[144],"process":[145],"delivers":[147],"ENOB":[149],"8.1":[151],"bits":[152],"over":[153],"signal":[155],"bandwidth":[156],"25.6":[158],"MHz,":[159],"while":[160,180],"at":[162],"205":[163],"MHz.":[164],"comparable":[168],"recently":[172],"reported":[173],"custom":[174],"single-ended":[176],"open-loop":[177],"ADCs,":[179],"being":[181],"cells,":[186],"consuming":[188],"relatively":[189],"average":[191],"power":[192],"3.3":[194],"mW":[195],"achieving":[196],"FoM":[198],"235":[200],"fJ/step.":[201]},"counts_by_year":[{"year":2026,"cited_by_count":1},{"year":2025,"cited_by_count":6},{"year":2024,"cited_by_count":6},{"year":2023,"cited_by_count":3},{"year":2022,"cited_by_count":3},{"year":2021,"cited_by_count":7},{"year":2020,"cited_by_count":7},{"year":2019,"cited_by_count":6},{"year":2018,"cited_by_count":5},{"year":2017,"cited_by_count":4},{"year":2016,"cited_by_count":7},{"year":2015,"cited_by_count":4}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}