{"id":"https://openalex.org/W2023632290","doi":"https://doi.org/10.1109/tcsi.2012.2189042","title":"Quantization Noise Suppression in Fractional-$N$ PLLs Utilizing Glitch-Free Phase Switching Multi-Modulus Frequency Divider","display_name":"Quantization Noise Suppression in Fractional-$N$ PLLs Utilizing Glitch-Free Phase Switching Multi-Modulus Frequency Divider","publication_year":2012,"publication_date":"2012-04-11","ids":{"openalex":"https://openalex.org/W2023632290","doi":"https://doi.org/10.1109/tcsi.2012.2189042","mag":"2023632290"},"language":"en","primary_location":{"id":"doi:10.1109/tcsi.2012.2189042","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tcsi.2012.2189042","pdf_url":null,"source":{"id":"https://openalex.org/S116977442","display_name":"IEEE Transactions on Circuits and Systems I Regular Papers","issn_l":"1549-8328","issn":["1549-8328","1558-0806"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Circuits and Systems I: Regular Papers","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5052970732","display_name":"Jing Jin","orcid":"https://orcid.org/0000-0003-3584-5559"},"institutions":[{"id":"https://openalex.org/I183067930","display_name":"Shanghai Jiao Tong University","ror":"https://ror.org/0220qvk04","country_code":"CN","type":"education","lineage":["https://openalex.org/I183067930"]}],"countries":["CN"],"is_corresponding":true,"raw_author_name":"Jing Jin","raw_affiliation_strings":["Center for Analog/RF Integrated Circuits (CARFIC), School of Microelectronics, Shanghai Jiaotong University, Shanghai, China","[Center for Analog/RF Integrated Circuits (CARFIC), Shanghai Jiao Tong University, Shanghai, China]"],"affiliations":[{"raw_affiliation_string":"Center for Analog/RF Integrated Circuits (CARFIC), School of Microelectronics, Shanghai Jiaotong University, Shanghai, China","institution_ids":["https://openalex.org/I183067930"]},{"raw_affiliation_string":"[Center for Analog/RF Integrated Circuits (CARFIC), Shanghai Jiao Tong University, Shanghai, China]","institution_ids":["https://openalex.org/I183067930"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5081733343","display_name":"Xiaoming Liu","orcid":"https://orcid.org/0000-0002-8353-570X"},"institutions":[{"id":"https://openalex.org/I183067930","display_name":"Shanghai Jiao Tong University","ror":"https://ror.org/0220qvk04","country_code":"CN","type":"education","lineage":["https://openalex.org/I183067930"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Xiaoming Liu","raw_affiliation_strings":["Center for Analog/RF Integrated Circuits (CARFIC), School of Microelectronics, Shanghai Jiaotong University, Shanghai, China","[Center for Analog/RF Integrated Circuits (CARFIC), Shanghai Jiao Tong University, Shanghai, China]"],"affiliations":[{"raw_affiliation_string":"Center for Analog/RF Integrated Circuits (CARFIC), School of Microelectronics, Shanghai Jiaotong University, Shanghai, China","institution_ids":["https://openalex.org/I183067930"]},{"raw_affiliation_string":"[Center for Analog/RF Integrated Circuits (CARFIC), Shanghai Jiao Tong University, Shanghai, China]","institution_ids":["https://openalex.org/I183067930"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5064866690","display_name":"Tingting Mo","orcid":null},"institutions":[{"id":"https://openalex.org/I183067930","display_name":"Shanghai Jiao Tong University","ror":"https://ror.org/0220qvk04","country_code":"CN","type":"education","lineage":["https://openalex.org/I183067930"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Tingting Mo","raw_affiliation_strings":["Center for Analog/RF Integrated Circuits (CARFIC), School of Microelectronics, Shanghai Jiaotong University, Shanghai, China","[Center for Analog/RF Integrated Circuits (CARFIC), Shanghai Jiao Tong University, Shanghai, China]"],"affiliations":[{"raw_affiliation_string":"Center for Analog/RF Integrated Circuits (CARFIC), School of Microelectronics, Shanghai Jiaotong University, Shanghai, China","institution_ids":["https://openalex.org/I183067930"]},{"raw_affiliation_string":"[Center for Analog/RF Integrated Circuits (CARFIC), Shanghai Jiao Tong University, Shanghai, China]","institution_ids":["https://openalex.org/I183067930"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5091076746","display_name":"Jianjun Zhou","orcid":"https://orcid.org/0000-0001-9898-7285"},"institutions":[{"id":"https://openalex.org/I183067930","display_name":"Shanghai Jiao Tong University","ror":"https://ror.org/0220qvk04","country_code":"CN","type":"education","lineage":["https://openalex.org/I183067930"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Jianjun Zhou","raw_affiliation_strings":["Center for Analog/RF Integrated Circuits (CARFIC), School of Microelectronics, Shanghai Jiaotong University, Shanghai, China","[Center for Analog/RF Integrated Circuits (CARFIC), Shanghai Jiao Tong University, Shanghai, China]"],"affiliations":[{"raw_affiliation_string":"Center for Analog/RF Integrated Circuits (CARFIC), School of Microelectronics, Shanghai Jiaotong University, Shanghai, China","institution_ids":["https://openalex.org/I183067930"]},{"raw_affiliation_string":"[Center for Analog/RF Integrated Circuits (CARFIC), Shanghai Jiao Tong University, Shanghai, China]","institution_ids":["https://openalex.org/I183067930"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":4,"corresponding_author_ids":["https://openalex.org/A5052970732"],"corresponding_institution_ids":["https://openalex.org/I183067930"],"apc_list":null,"apc_paid":null,"fwci":2.2095,"has_fulltext":false,"cited_by_count":26,"citation_normalized_percentile":{"value":0.88409338,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":98},"biblio":{"volume":"59","issue":"5","first_page":"926","last_page":"937"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11417","display_name":"Advancements in PLL and VCO Technologies","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11417","display_name":"Advancements in PLL and VCO Technologies","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10187","display_name":"Radio Frequency Integrated Circuit Design","score":0.9976000189781189,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11444","display_name":"Electromagnetic Compatibility and Noise Suppression","score":0.9947999715805054,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/frequency-divider","display_name":"Frequency divider","score":0.8576299548149109},{"id":"https://openalex.org/keywords/glitch","display_name":"Glitch","score":0.8179292678833008},{"id":"https://openalex.org/keywords/phase-locked-loop","display_name":"Phase-locked loop","score":0.5984575152397156},{"id":"https://openalex.org/keywords/phase-noise","display_name":"Phase noise","score":0.5936421751976013},{"id":"https://openalex.org/keywords/frequency-synthesizer","display_name":"Frequency synthesizer","score":0.5717124342918396},{"id":"https://openalex.org/keywords/physics","display_name":"Physics","score":0.48381203413009644},{"id":"https://openalex.org/keywords/frequency-multiplier","display_name":"Frequency multiplier","score":0.4264107048511505},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.417070209980011},{"id":"https://openalex.org/keywords/quantization","display_name":"Quantization (signal processing)","score":0.4167099595069885},{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.33923864364624023},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.298602819442749},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.25197023153305054},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.09576204419136047}],"concepts":[{"id":"https://openalex.org/C74982907","wikidata":"https://www.wikidata.org/wiki/Q1455624","display_name":"Frequency divider","level":3,"score":0.8576299548149109},{"id":"https://openalex.org/C191287063","wikidata":"https://www.wikidata.org/wiki/Q543281","display_name":"Glitch","level":3,"score":0.8179292678833008},{"id":"https://openalex.org/C12707504","wikidata":"https://www.wikidata.org/wiki/Q52637","display_name":"Phase-locked loop","level":3,"score":0.5984575152397156},{"id":"https://openalex.org/C89631360","wikidata":"https://www.wikidata.org/wiki/Q1428766","display_name":"Phase noise","level":2,"score":0.5936421751976013},{"id":"https://openalex.org/C182099602","wikidata":"https://www.wikidata.org/wiki/Q2660678","display_name":"Frequency synthesizer","level":4,"score":0.5717124342918396},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.48381203413009644},{"id":"https://openalex.org/C146002875","wikidata":"https://www.wikidata.org/wiki/Q1074289","display_name":"Frequency multiplier","level":3,"score":0.4264107048511505},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.417070209980011},{"id":"https://openalex.org/C28855332","wikidata":"https://www.wikidata.org/wiki/Q198099","display_name":"Quantization (signal processing)","level":2,"score":0.4167099595069885},{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.33923864364624023},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.298602819442749},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.25197023153305054},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.09576204419136047}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/tcsi.2012.2189042","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tcsi.2012.2189042","pdf_url":null,"source":{"id":"https://openalex.org/S116977442","display_name":"IEEE Transactions on Circuits and Systems I Regular Papers","issn_l":"1549-8328","issn":["1549-8328","1558-0806"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Circuits and Systems I: Regular Papers","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[{"display_name":"Affordable and clean energy","id":"https://metadata.un.org/sdg/7","score":0.5400000214576721}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":36,"referenced_works":["https://openalex.org/W1500373038","https://openalex.org/W1555027362","https://openalex.org/W1830369973","https://openalex.org/W1965174157","https://openalex.org/W1969533319","https://openalex.org/W1972768432","https://openalex.org/W1974337707","https://openalex.org/W1975831661","https://openalex.org/W2008028947","https://openalex.org/W2010437213","https://openalex.org/W2029583434","https://openalex.org/W2048815042","https://openalex.org/W2053188686","https://openalex.org/W2061100613","https://openalex.org/W2072192908","https://openalex.org/W2075310429","https://openalex.org/W2097974680","https://openalex.org/W2105675956","https://openalex.org/W2112664896","https://openalex.org/W2113092930","https://openalex.org/W2120288563","https://openalex.org/W2128170331","https://openalex.org/W2136246702","https://openalex.org/W2139625690","https://openalex.org/W2142636197","https://openalex.org/W2146298723","https://openalex.org/W2146423999","https://openalex.org/W2151895341","https://openalex.org/W2161250182","https://openalex.org/W2170087371","https://openalex.org/W2177410627","https://openalex.org/W2296506225","https://openalex.org/W2340429540","https://openalex.org/W3103339143","https://openalex.org/W6643596546","https://openalex.org/W6665874464"],"related_works":["https://openalex.org/W2096310032","https://openalex.org/W1915959989","https://openalex.org/W2358217230","https://openalex.org/W2513253674","https://openalex.org/W2113374544","https://openalex.org/W3207257560","https://openalex.org/W2000068870","https://openalex.org/W2081086825","https://openalex.org/W2216248802","https://openalex.org/W2536121404"],"abstract_inverted_index":{"A":[0],"novel":[1,30],"programmable":[2],"frequency":[3,25,40,62,80,144],"divider":[4,26],"for":[5,65],"quantization":[6],"noise":[7],"(QN)":[8],"suppression":[9,111,156],"in":[10,17,114],"fractional-N":[11,105],"phase-locked":[12],"loops":[13],"(PLLs)":[14],"is":[15,52,72,94],"presented":[16],"this":[18],"paper.":[19],"The":[20],"proposed":[21,69,91,109,121,159],"phase":[22,32],"switching":[23,33],"multi-modulus":[24],"(PS-MMFD)":[27],"utilizes":[28],"a":[29,101,115,138],"glitch-free":[31,70,92,122],"(PS)":[34],"divide-by-0.5/1/1.5/2":[35],"cell":[36],"to":[37,43],"reduce":[38],"the":[39,68,90,108,120,152,158],"division":[41],"step":[42],"0.5":[44],"and":[45,81,87,133],"its":[46],"QN":[47,66,110,155],"induced":[48],"by":[49,55,97,157],"\u0394\u03a3":[50,104],"modulation":[51],"thus":[53],"suppressed":[54],"additional":[56,153],"6":[57],"dB.":[58],"Compared":[59],"with":[60],"other":[61],"dividers":[63],"used":[64],"suppression,":[67],"PS-MMFD":[71,93,123],"more":[73],"robust,":[74],"can":[75],"operate":[76],"at":[77,141],"higher":[78],"input":[79,143],"consumes":[82,134],"less":[83],"power.":[84],"Detailed":[85],"analysis":[86],"implementation":[88],"of":[89,127,145],"demonstrated,":[95],"followed":[96],"experimental":[98],"results":[99,149],"from":[100,137],"fully":[102],"integrated":[103],"PLL":[106],"utilizing":[107],"technique.":[112,160],"Implemented":[113],"0.18":[116],"\u03bcm":[117],"CMOS":[118],"process,":[119],"occupies":[124],"an":[125,142],"area":[126],"0.38":[128],"mm":[129,132],"\u00d7":[130],"0.25":[131],"5":[135],"mA":[136],"1.8-V":[139],"supply":[140],"2":[146],"GHz.":[147],"Measurement":[148],"also":[150],"demonstrate":[151],"6-dB":[154]},"counts_by_year":[{"year":2024,"cited_by_count":1},{"year":2023,"cited_by_count":1},{"year":2022,"cited_by_count":1},{"year":2021,"cited_by_count":2},{"year":2020,"cited_by_count":4},{"year":2019,"cited_by_count":4},{"year":2017,"cited_by_count":3},{"year":2016,"cited_by_count":1},{"year":2015,"cited_by_count":2},{"year":2014,"cited_by_count":4},{"year":2013,"cited_by_count":3}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}