{"id":"https://openalex.org/W2118776905","doi":"https://doi.org/10.1109/tcsi.2011.2173387","title":"A Dual-Loop Clock and Data Recovery Circuit With Compact Quarter-Rate CMOS Linear Phase Detector","display_name":"A Dual-Loop Clock and Data Recovery Circuit With Compact Quarter-Rate CMOS Linear Phase Detector","publication_year":2011,"publication_date":"2011-12-15","ids":{"openalex":"https://openalex.org/W2118776905","doi":"https://doi.org/10.1109/tcsi.2011.2173387","mag":"2118776905"},"language":"en","primary_location":{"id":"doi:10.1109/tcsi.2011.2173387","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tcsi.2011.2173387","pdf_url":null,"source":{"id":"https://openalex.org/S116977442","display_name":"IEEE Transactions on Circuits and Systems I Regular Papers","issn_l":"1549-8328","issn":["1549-8328","1558-0806"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Circuits and Systems I: Regular Papers","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5040782915","display_name":"Yung Sern Tan","orcid":null},"institutions":[{"id":"https://openalex.org/I172675005","display_name":"Nanyang Technological University","ror":"https://ror.org/02e7b5302","country_code":"SG","type":"education","lineage":["https://openalex.org/I172675005"]}],"countries":["SG"],"is_corresponding":false,"raw_author_name":"Yung Sern Tan","raw_affiliation_strings":["VIRTUS, an IC Design Centre of Excellence, School of Electrical and Electronic Engineering, Nanyang Technological University, Singapore","IC Design Centre, Nanyang Technol. Univ., Singapore, Singapore"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"VIRTUS, an IC Design Centre of Excellence, School of Electrical and Electronic Engineering, Nanyang Technological University, Singapore","institution_ids":["https://openalex.org/I172675005"]},{"raw_affiliation_string":"IC Design Centre, Nanyang Technol. Univ., Singapore, Singapore","institution_ids":["https://openalex.org/I172675005"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5009974389","display_name":"Kiat Seng Yeo","orcid":"https://orcid.org/0000-0002-4524-707X"},"institutions":[{"id":"https://openalex.org/I172675005","display_name":"Nanyang Technological University","ror":"https://ror.org/02e7b5302","country_code":"SG","type":"education","lineage":["https://openalex.org/I172675005"]}],"countries":["SG"],"is_corresponding":false,"raw_author_name":"Kiat Seng Yeo","raw_affiliation_strings":["VIRTUS, an IC Design Centre of Excellence, School of Electrical and Electronic Engineering, Nanyang Technological University, Singapore","IC Design Centre, Nanyang Technol. Univ., Singapore, Singapore"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"VIRTUS, an IC Design Centre of Excellence, School of Electrical and Electronic Engineering, Nanyang Technological University, Singapore","institution_ids":["https://openalex.org/I172675005"]},{"raw_affiliation_string":"IC Design Centre, Nanyang Technol. Univ., Singapore, Singapore","institution_ids":["https://openalex.org/I172675005"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5033403894","display_name":"Chirn Chye Boon","orcid":"https://orcid.org/0000-0003-0298-6232"},"institutions":[{"id":"https://openalex.org/I172675005","display_name":"Nanyang Technological University","ror":"https://ror.org/02e7b5302","country_code":"SG","type":"education","lineage":["https://openalex.org/I172675005"]}],"countries":["SG"],"is_corresponding":false,"raw_author_name":"Chirn Chye Boon","raw_affiliation_strings":["VIRTUS, an IC Design Centre of Excellence, School of Electrical and Electronic Engineering, Nanyang Technological University, Singapore","IC Design Centre, Nanyang Technol. Univ., Singapore, Singapore"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"VIRTUS, an IC Design Centre of Excellence, School of Electrical and Electronic Engineering, Nanyang Technological University, Singapore","institution_ids":["https://openalex.org/I172675005"]},{"raw_affiliation_string":"IC Design Centre, Nanyang Technol. Univ., Singapore, Singapore","institution_ids":["https://openalex.org/I172675005"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5078422466","display_name":"Manh Anh","orcid":null},"institutions":[{"id":"https://openalex.org/I172675005","display_name":"Nanyang Technological University","ror":"https://ror.org/02e7b5302","country_code":"SG","type":"education","lineage":["https://openalex.org/I172675005"]}],"countries":["SG"],"is_corresponding":false,"raw_author_name":"Manh Anh Do","raw_affiliation_strings":["VIRTUS, an IC Design Centre of Excellence, School of Electrical and Electronic Engineering, Nanyang Technological University, Singapore","IC Design Centre, Nanyang Technol. Univ., Singapore, Singapore"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"VIRTUS, an IC Design Centre of Excellence, School of Electrical and Electronic Engineering, Nanyang Technological University, Singapore","institution_ids":["https://openalex.org/I172675005"]},{"raw_affiliation_string":"IC Design Centre, Nanyang Technol. Univ., Singapore, Singapore","institution_ids":["https://openalex.org/I172675005"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":4,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":2.1624,"has_fulltext":false,"cited_by_count":24,"citation_normalized_percentile":{"value":0.88630159,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":90,"max":98},"biblio":{"volume":"59","issue":"6","first_page":"1156","last_page":"1167"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11417","display_name":"Advancements in PLL and VCO Technologies","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11417","display_name":"Advancements in PLL and VCO Technologies","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10299","display_name":"Photonic and Optical Devices","score":0.994700014591217,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":0.9932000041007996,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/jitter","display_name":"Jitter","score":0.8202704191207886},{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.7690191268920898},{"id":"https://openalex.org/keywords/detector","display_name":"Detector","score":0.6620391607284546},{"id":"https://openalex.org/keywords/phase-detector","display_name":"Phase detector","score":0.6190651655197144},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.48990553617477417},{"id":"https://openalex.org/keywords/offset","display_name":"Offset (computer science)","score":0.4817219078540802},{"id":"https://openalex.org/keywords/phase-locked-loop","display_name":"Phase-locked loop","score":0.4493810832500458},{"id":"https://openalex.org/keywords/physics","display_name":"Physics","score":0.36692994832992554},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.3528757393360138},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.3459606170654297},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.3421199917793274},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.19768333435058594}],"concepts":[{"id":"https://openalex.org/C134652429","wikidata":"https://www.wikidata.org/wiki/Q1052698","display_name":"Jitter","level":2,"score":0.8202704191207886},{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.7690191268920898},{"id":"https://openalex.org/C94915269","wikidata":"https://www.wikidata.org/wiki/Q1834857","display_name":"Detector","level":2,"score":0.6620391607284546},{"id":"https://openalex.org/C110086884","wikidata":"https://www.wikidata.org/wiki/Q2085341","display_name":"Phase detector","level":3,"score":0.6190651655197144},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.48990553617477417},{"id":"https://openalex.org/C175291020","wikidata":"https://www.wikidata.org/wiki/Q1156822","display_name":"Offset (computer science)","level":2,"score":0.4817219078540802},{"id":"https://openalex.org/C12707504","wikidata":"https://www.wikidata.org/wiki/Q52637","display_name":"Phase-locked loop","level":3,"score":0.4493810832500458},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.36692994832992554},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.3528757393360138},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.3459606170654297},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.3421199917793274},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.19768333435058594},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.0}],"mesh":[],"locations_count":2,"locations":[{"id":"doi:10.1109/tcsi.2011.2173387","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tcsi.2011.2173387","pdf_url":null,"source":{"id":"https://openalex.org/S116977442","display_name":"IEEE Transactions on Circuits and Systems I Regular Papers","issn_l":"1549-8328","issn":["1549-8328","1558-0806"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Circuits and Systems I: Regular Papers","raw_type":"journal-article"},{"id":"pmh:oai:dr.ntu.edu.sg:10356/95912","is_oa":false,"landing_page_url":"https://hdl.handle.net/10356/95912","pdf_url":null,"source":{"id":"https://openalex.org/S4306402609","display_name":"DR-NTU (Nanyang Technological University)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/I172675005","host_organization_name":"Nanyang Technological University","host_organization_lineage":["https://openalex.org/I172675005"],"host_organization_lineage_names":[],"type":"repository"},"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":null,"raw_type":"Journal Article"}],"best_oa_location":null,"sustainable_development_goals":[{"display_name":"Affordable and clean energy","score":0.7099999785423279,"id":"https://metadata.un.org/sdg/7"}],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":29,"referenced_works":["https://openalex.org/W1548723951","https://openalex.org/W1962927232","https://openalex.org/W1977404699","https://openalex.org/W2003234253","https://openalex.org/W2003473732","https://openalex.org/W2020854458","https://openalex.org/W2022463041","https://openalex.org/W2058288894","https://openalex.org/W2069169282","https://openalex.org/W2070413034","https://openalex.org/W2098000900","https://openalex.org/W2100029938","https://openalex.org/W2101420721","https://openalex.org/W2109982704","https://openalex.org/W2129305974","https://openalex.org/W2131325068","https://openalex.org/W2132897890","https://openalex.org/W2139132358","https://openalex.org/W2144110313","https://openalex.org/W2147390479","https://openalex.org/W2149618751","https://openalex.org/W2154233730","https://openalex.org/W2156103315","https://openalex.org/W2157198926","https://openalex.org/W2159745870","https://openalex.org/W2171928322","https://openalex.org/W2177274792","https://openalex.org/W6632728670","https://openalex.org/W6644511867"],"related_works":["https://openalex.org/W2139484866","https://openalex.org/W1965493748","https://openalex.org/W2908219865","https://openalex.org/W2295601265","https://openalex.org/W2148370333","https://openalex.org/W2936029881","https://openalex.org/W2096085680","https://openalex.org/W1978946573","https://openalex.org/W1153251241","https://openalex.org/W1576501709"],"abstract_inverted_index":{"This":[0],"paper":[1],"presents":[2],"a":[3,13,70,121,138,177],"5-Gb/s":[4],"dual-loop":[5],"clock":[6,169],"and":[7,99,112,120,172],"data":[8,71,78],"recovery":[9,72],"(CDR)":[10],"circuit":[11,30,73,160],"with":[12,63,79,141],"compact":[14],"quarter-rate":[15],"linear":[16,61],"phase":[17,82],"detector":[18,140],"(PD).":[19],"The":[20],"proposed":[21,91,132],"PD":[22,133],"not":[23],"only":[24],"reduces":[25],"the":[26,29,41,51,59,76,94,105,127,131,151,159,163,167],"complexity":[27],"of":[28,43,54,97,108,123,130,150,166],"structure":[31],"but":[32],"also":[33,68,90],"employs":[34],"an":[35],"UP":[36,46,64,98,111],"pulse-widening":[37,65],"technique":[38],"to":[39,74,92,125,146],"circumvent":[40],"problem":[42],"existing":[44],"narrow":[45],"pulses.":[47,114],"Meanwhile,":[48],"it":[49,173],"has":[50],"least":[52],"number":[53,107],"output":[55],"signals":[56],"among":[57],"all":[58],"other":[60],"PDs":[62],"technique.":[66],"It":[67],"provides":[69],"de-multiplex":[75],"input":[77],"no":[80],"systematic":[81],"offset.":[83],"An":[84],"unbalanced":[85,95],"charge":[86],"pump":[87],"(CP)":[88],"is":[89,134,144,170],"compensate":[93],"pulse-width":[96],"DN":[100,113],"pulses":[101],"as":[102,104],"well":[103],"unequal":[106],"signal":[109],"between":[110],"A":[115],"detailed":[116],"propagation":[117],"delay":[118],"analysis":[119],"set":[122],"equations":[124],"predict":[126],"characteristic":[128],"curve":[129],"given.":[135],"In":[136],"addition,":[137],"lock":[139],"hysteresis":[142],"property":[143],"implemented":[145],"ensure":[147],"proper":[148],"switching":[149],"loops.":[152],"Fabricated":[153],"in":[154],"0.18-":[155],"\u03bcm":[156],"CMOS":[157],"technology,":[158],"shows":[161],"that":[162],"peak-to-peak":[164],"jitter":[165],"recovered":[168],"30.4-ps":[171],"consumes":[174],"71.9-mW":[175],"from":[176],"1.8":[178],"V":[179],"supply.":[180]},"counts_by_year":[{"year":2025,"cited_by_count":1},{"year":2024,"cited_by_count":2},{"year":2023,"cited_by_count":2},{"year":2022,"cited_by_count":1},{"year":2019,"cited_by_count":2},{"year":2018,"cited_by_count":2},{"year":2017,"cited_by_count":3},{"year":2016,"cited_by_count":2},{"year":2015,"cited_by_count":1},{"year":2014,"cited_by_count":4},{"year":2013,"cited_by_count":3},{"year":2012,"cited_by_count":1}],"updated_date":"2026-06-11T09:08:48.828518","created_date":"2025-10-10T00:00:00"}