{"id":"https://openalex.org/W2144154842","doi":"https://doi.org/10.1109/tcsi.2011.2158708","title":"Adaptive Body Bias for Reducing the Impacts of NBTI and Process Variations on 6T SRAM Cells","display_name":"Adaptive Body Bias for Reducing the Impacts of NBTI and Process Variations on 6T SRAM Cells","publication_year":2011,"publication_date":"2011-07-20","ids":{"openalex":"https://openalex.org/W2144154842","doi":"https://doi.org/10.1109/tcsi.2011.2158708","mag":"2144154842"},"language":"en","primary_location":{"id":"doi:10.1109/tcsi.2011.2158708","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tcsi.2011.2158708","pdf_url":null,"source":{"id":"https://openalex.org/S116977442","display_name":"IEEE Transactions on Circuits and Systems I Regular Papers","issn_l":"1549-8328","issn":["1549-8328","1558-0806"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Circuits and Systems I: Regular Papers","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5063929219","display_name":"Hassan Mostafa","orcid":"https://orcid.org/0000-0003-0043-5007"},"institutions":[{"id":"https://openalex.org/I151746483","display_name":"University of Waterloo","ror":"https://ror.org/01aff2v68","country_code":"CA","type":"education","lineage":["https://openalex.org/I151746483"]}],"countries":["CA"],"is_corresponding":false,"raw_author_name":"Hassan Mostafa","raw_affiliation_strings":["Department of Electrical and Computer Engineering, University of Waterloo, Waterloo, ONT, Canada","[Dept. of Electr. & Comput. Eng., Univ. of Waterloo, Waterloo, ON, Canada]"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Electrical and Computer Engineering, University of Waterloo, Waterloo, ONT, Canada","institution_ids":["https://openalex.org/I151746483"]},{"raw_affiliation_string":"[Dept. of Electr. & Comput. Eng., Univ. of Waterloo, Waterloo, ON, Canada]","institution_ids":["https://openalex.org/I151746483"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5112829693","display_name":"Mohab Anis","orcid":null},"institutions":[{"id":"https://openalex.org/I80693520","display_name":"American University in Cairo","ror":"https://ror.org/0176yqn58","country_code":"EG","type":"education","lineage":["https://openalex.org/I80693520"]}],"countries":["EG"],"is_corresponding":false,"raw_author_name":"Mohab Anis","raw_affiliation_strings":["Department of Electronics Engineering, American University in Cairo, Cairo, Egypt","[Dept. of Electron. Eng., American Univ. in Cairo, Cairo, Egypt]"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Electronics Engineering, American University in Cairo, Cairo, Egypt","institution_ids":["https://openalex.org/I80693520"]},{"raw_affiliation_string":"[Dept. of Electron. Eng., American Univ. in Cairo, Cairo, Egypt]","institution_ids":["https://openalex.org/I80693520"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5111829312","display_name":"M.I. Elmasry","orcid":null},"institutions":[{"id":"https://openalex.org/I151746483","display_name":"University of Waterloo","ror":"https://ror.org/01aff2v68","country_code":"CA","type":"education","lineage":["https://openalex.org/I151746483"]}],"countries":["CA"],"is_corresponding":false,"raw_author_name":"Mohamed Elmasry","raw_affiliation_strings":["Department of Electrical and Computer Engineering, University of Waterloo, Waterloo, ONT, Canada","[Dept. of Electr. & Comput. Eng., Univ. of Waterloo, Waterloo, ON, Canada]"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Electrical and Computer Engineering, University of Waterloo, Waterloo, ONT, Canada","institution_ids":["https://openalex.org/I151746483"]},{"raw_affiliation_string":"[Dept. of Electr. & Comput. Eng., Univ. of Waterloo, Waterloo, ON, Canada]","institution_ids":["https://openalex.org/I151746483"]}]}],"institutions":[],"countries_distinct_count":2,"institutions_distinct_count":3,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":6.2169,"has_fulltext":false,"cited_by_count":80,"citation_normalized_percentile":{"value":0.96771334,"is_in_top_1_percent":false,"is_in_top_10_percent":true},"cited_by_percentile_year":{"min":94,"max":99},"biblio":{"volume":"58","issue":"12","first_page":"2859","last_page":"2871"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10472","display_name":"Semiconductor materials and devices","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10472","display_name":"Semiconductor materials and devices","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10558","display_name":"Advancements in Semiconductor Devices and Circuit Design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/static-random-access-memory","display_name":"Static random-access memory","score":0.8701494336128235},{"id":"https://openalex.org/keywords/reliability","display_name":"Reliability (semiconductor)","score":0.661028265953064},{"id":"https://openalex.org/keywords/negative-bias-temperature-instability","display_name":"Negative-bias temperature instability","score":0.6400085687637329},{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.6209783554077148},{"id":"https://openalex.org/keywords/transistor","display_name":"Transistor","score":0.586980938911438},{"id":"https://openalex.org/keywords/process","display_name":"Process (computing)","score":0.49743202328681946},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.45482826232910156},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.4493166506290436},{"id":"https://openalex.org/keywords/threshold-voltage","display_name":"Threshold voltage","score":0.4340498745441437},{"id":"https://openalex.org/keywords/chip","display_name":"Chip","score":0.42944106459617615},{"id":"https://openalex.org/keywords/reliability-engineering","display_name":"Reliability engineering","score":0.3457058072090149},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.32934582233428955},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.26352202892303467},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.2292538583278656},{"id":"https://openalex.org/keywords/power","display_name":"Power (physics)","score":0.11014330387115479},{"id":"https://openalex.org/keywords/physics","display_name":"Physics","score":0.06862157583236694}],"concepts":[{"id":"https://openalex.org/C68043766","wikidata":"https://www.wikidata.org/wiki/Q267416","display_name":"Static random-access memory","level":2,"score":0.8701494336128235},{"id":"https://openalex.org/C43214815","wikidata":"https://www.wikidata.org/wiki/Q7310987","display_name":"Reliability (semiconductor)","level":3,"score":0.661028265953064},{"id":"https://openalex.org/C557185","wikidata":"https://www.wikidata.org/wiki/Q6987194","display_name":"Negative-bias temperature instability","level":5,"score":0.6400085687637329},{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.6209783554077148},{"id":"https://openalex.org/C172385210","wikidata":"https://www.wikidata.org/wiki/Q5339","display_name":"Transistor","level":3,"score":0.586980938911438},{"id":"https://openalex.org/C98045186","wikidata":"https://www.wikidata.org/wiki/Q205663","display_name":"Process (computing)","level":2,"score":0.49743202328681946},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.45482826232910156},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.4493166506290436},{"id":"https://openalex.org/C195370968","wikidata":"https://www.wikidata.org/wiki/Q1754002","display_name":"Threshold voltage","level":4,"score":0.4340498745441437},{"id":"https://openalex.org/C165005293","wikidata":"https://www.wikidata.org/wiki/Q1074500","display_name":"Chip","level":2,"score":0.42944106459617615},{"id":"https://openalex.org/C200601418","wikidata":"https://www.wikidata.org/wiki/Q2193887","display_name":"Reliability engineering","level":1,"score":0.3457058072090149},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.32934582233428955},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.26352202892303467},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.2292538583278656},{"id":"https://openalex.org/C163258240","wikidata":"https://www.wikidata.org/wiki/Q25342","display_name":"Power (physics)","level":2,"score":0.11014330387115479},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.06862157583236694},{"id":"https://openalex.org/C62520636","wikidata":"https://www.wikidata.org/wiki/Q944","display_name":"Quantum mechanics","level":1,"score":0.0},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/tcsi.2011.2158708","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tcsi.2011.2158708","pdf_url":null,"source":{"id":"https://openalex.org/S116977442","display_name":"IEEE Transactions on Circuits and Systems I Regular Papers","issn_l":"1549-8328","issn":["1549-8328","1558-0806"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Circuits and Systems I: Regular Papers","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":36,"referenced_works":["https://openalex.org/W413878220","https://openalex.org/W1486302018","https://openalex.org/W1501443680","https://openalex.org/W1540206583","https://openalex.org/W1566916904","https://openalex.org/W1993083796","https://openalex.org/W1995561044","https://openalex.org/W2002612140","https://openalex.org/W2025029027","https://openalex.org/W2048874455","https://openalex.org/W2060385046","https://openalex.org/W2095823567","https://openalex.org/W2102785080","https://openalex.org/W2102913295","https://openalex.org/W2111702626","https://openalex.org/W2111798157","https://openalex.org/W2112147975","https://openalex.org/W2113115586","https://openalex.org/W2116597081","https://openalex.org/W2119591281","https://openalex.org/W2134067926","https://openalex.org/W2138787284","https://openalex.org/W2140823559","https://openalex.org/W2142908374","https://openalex.org/W2143260282","https://openalex.org/W2143676743","https://openalex.org/W2144726910","https://openalex.org/W2146750110","https://openalex.org/W2150280652","https://openalex.org/W2150526221","https://openalex.org/W2153808668","https://openalex.org/W2156227527","https://openalex.org/W2167369830","https://openalex.org/W2168525368","https://openalex.org/W6682527464","https://openalex.org/W6682642288"],"related_works":["https://openalex.org/W2944990515","https://openalex.org/W3150866391","https://openalex.org/W2942040471","https://openalex.org/W2028220610","https://openalex.org/W2573726612","https://openalex.org/W2088008649","https://openalex.org/W2112214579","https://openalex.org/W2166033074","https://openalex.org/W2036808971","https://openalex.org/W2310523918"],"abstract_inverted_index":{"Reliability":[0],"and":[1,31,39,52,80,98,109,129,146],"variability":[2],"have":[3],"become":[4],"big":[5],"design":[6],"challenges":[7],"facing":[8],"submicrometer":[9],"SRAM":[10,37,115,171],"designers.":[11],"A":[12],"low":[13],"area":[14],"overhead":[15],"adaptive":[16],"body":[17],"bias":[18],"(ABB)":[19],"circuit":[20,44,51],"is":[21],"proposed":[22,42,122,135,162],"in":[23],"this":[24],"paper":[25],"to":[26,34,61,90,104,144,152,181],"compensate":[27],"for":[28,126],"NBTI":[29,81,107,127],"aging":[30,82,108,128,157,186],"process":[32,78,110,130],"variations":[33,79,111],"improve":[35],"the":[36,106,114,121,134,138,147,161,165,170,175],"reliability":[38],"yield.":[40],"The":[41,74],"ABB":[43,123,136,163],"consists":[45],"of":[46,169],"a":[47],"threshold":[48],"voltage":[49],"sensing":[50],"an":[53,62],"on-chip":[54],"analog":[55],"controller.":[56],"Postlayout":[57],"simulation":[58],"results,":[59],"referring":[60],"industrial":[63],"hardware-calibrated":[64],"STMicroelectronics":[65,89],"65":[66],"nm":[67],"CMOS":[68],"technology":[69],"transistor":[70,75],"model,":[71],"are":[72,86,102],"presented.":[73],"model":[76,83],"contains":[77],"cards,":[84],"which":[85],"declared":[87],"by":[88,173],"be":[91],"silicon":[92],"verified.":[93],"Cadence":[94],"RelXpert,":[95],"Virtuoso":[96,99],"Spectre,":[97],"UltraSim":[100],"tools":[101],"used":[103],"estimate":[105],"impacts":[112],"on":[113],"array.":[116],"These":[117],"results":[118],"show":[119],"that":[120],"compensates":[124],"effectively":[125],"variations.":[131],"For":[132],"example,":[133],"reduces":[137],"read":[139],"failure":[140],"probability":[141],"from":[142,150,179],"0.32%":[143],"0.05%":[145],"SNM":[148],"degradation":[149,178],"10.9%":[151],"2.6%":[153],"at":[154,183],"10":[155,184],"years":[156,185],"time.":[158,187],"In":[159],"addition,":[160],"enhances":[164],"soft":[166],"errors":[167],"immunity":[168],"cell":[172],"reducing":[174],"critical":[176],"charge":[177],"12.7%":[180],"3.4%":[182]},"counts_by_year":[{"year":2025,"cited_by_count":6},{"year":2024,"cited_by_count":2},{"year":2023,"cited_by_count":3},{"year":2021,"cited_by_count":6},{"year":2020,"cited_by_count":4},{"year":2019,"cited_by_count":6},{"year":2018,"cited_by_count":10},{"year":2017,"cited_by_count":8},{"year":2016,"cited_by_count":5},{"year":2015,"cited_by_count":7},{"year":2014,"cited_by_count":11},{"year":2013,"cited_by_count":6},{"year":2012,"cited_by_count":5}],"updated_date":"2026-06-11T09:08:48.828518","created_date":"2025-10-10T00:00:00"}
