{"id":"https://openalex.org/W2155888461","doi":"https://doi.org/10.1109/tcsi.2011.2107171","title":"Novel Timing Yield Improvement Circuits for High-Performance Low-Power Wide Fan-In Dynamic OR Gates","display_name":"Novel Timing Yield Improvement Circuits for High-Performance Low-Power Wide Fan-In Dynamic OR Gates","publication_year":2011,"publication_date":"2011-02-11","ids":{"openalex":"https://openalex.org/W2155888461","doi":"https://doi.org/10.1109/tcsi.2011.2107171","mag":"2155888461"},"language":"en","primary_location":{"id":"doi:10.1109/tcsi.2011.2107171","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tcsi.2011.2107171","pdf_url":null,"source":{"id":"https://openalex.org/S116977442","display_name":"IEEE Transactions on Circuits and Systems I Regular Papers","issn_l":"1549-8328","issn":["1549-8328","1558-0806"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Circuits and Systems I: Regular Papers","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5063929219","display_name":"Hassan Mostafa","orcid":"https://orcid.org/0000-0003-0043-5007"},"institutions":[{"id":"https://openalex.org/I151746483","display_name":"University of Waterloo","ror":"https://ror.org/01aff2v68","country_code":"CA","type":"education","lineage":["https://openalex.org/I151746483"]}],"countries":["CA"],"is_corresponding":false,"raw_author_name":"Hassan Mostafa","raw_affiliation_strings":["Department of Electrical and Computer Engineering, University of Waterloo, Waterloo, ONT, Canada"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Electrical and Computer Engineering, University of Waterloo, Waterloo, ONT, Canada","institution_ids":["https://openalex.org/I151746483"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5112829693","display_name":"Mohab Anis","orcid":null},"institutions":[{"id":"https://openalex.org/I80693520","display_name":"American University in Cairo","ror":"https://ror.org/0176yqn58","country_code":"EG","type":"education","lineage":["https://openalex.org/I80693520"]}],"countries":["EG"],"is_corresponding":false,"raw_author_name":"Mohab Anis","raw_affiliation_strings":["Department of Electronics Engineering, American University, Cairo, Cairo, Egypt"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Electronics Engineering, American University, Cairo, Cairo, Egypt","institution_ids":["https://openalex.org/I80693520"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5017594611","display_name":"Mohamed Elmasry","orcid":null},"institutions":[{"id":"https://openalex.org/I151746483","display_name":"University of Waterloo","ror":"https://ror.org/01aff2v68","country_code":"CA","type":"education","lineage":["https://openalex.org/I151746483"]}],"countries":["CA"],"is_corresponding":false,"raw_author_name":"Mohamed Elmasry","raw_affiliation_strings":["Department of Electrical and Computer Engineering, University of Waterloo, Waterloo, ONT, Canada"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Electrical and Computer Engineering, University of Waterloo, Waterloo, ONT, Canada","institution_ids":["https://openalex.org/I151746483"]}]}],"institutions":[],"countries_distinct_count":2,"institutions_distinct_count":3,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":5.1357,"has_fulltext":false,"cited_by_count":28,"citation_normalized_percentile":{"value":0.95782586,"is_in_top_1_percent":false,"is_in_top_10_percent":true},"cited_by_percentile_year":{"min":89,"max":99},"biblio":{"volume":"58","issue":"8","first_page":"1785","last_page":"1797"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10472","display_name":"Semiconductor materials and devices","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/capacitance","display_name":"Capacitance","score":0.6752618551254272},{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.672939658164978},{"id":"https://openalex.org/keywords/electronic-circuit","display_name":"Electronic circuit","score":0.578278660774231},{"id":"https://openalex.org/keywords/overhead","display_name":"Overhead (engineering)","score":0.5771905183792114},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.5449066162109375},{"id":"https://openalex.org/keywords/dynamic-demand","display_name":"Dynamic demand","score":0.5135986804962158},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.4905089735984802},{"id":"https://openalex.org/keywords/static-timing-analysis","display_name":"Static timing analysis","score":0.49005138874053955},{"id":"https://openalex.org/keywords/power","display_name":"Power (physics)","score":0.4878275692462921},{"id":"https://openalex.org/keywords/delay-calculation","display_name":"Delay calculation","score":0.4743971824645996},{"id":"https://openalex.org/keywords/process","display_name":"Process (computing)","score":0.4646325409412384},{"id":"https://openalex.org/keywords/fan-in","display_name":"Fan-in","score":0.43900150060653687},{"id":"https://openalex.org/keywords/logic-gate","display_name":"Logic gate","score":0.4379277229309082},{"id":"https://openalex.org/keywords/propagation-delay","display_name":"Propagation delay","score":0.3921879231929779},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.29800814390182495},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.2557433843612671},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.06511637568473816}],"concepts":[{"id":"https://openalex.org/C30066665","wikidata":"https://www.wikidata.org/wiki/Q164399","display_name":"Capacitance","level":3,"score":0.6752618551254272},{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.672939658164978},{"id":"https://openalex.org/C134146338","wikidata":"https://www.wikidata.org/wiki/Q1815901","display_name":"Electronic circuit","level":2,"score":0.578278660774231},{"id":"https://openalex.org/C2779960059","wikidata":"https://www.wikidata.org/wiki/Q7113681","display_name":"Overhead (engineering)","level":2,"score":0.5771905183792114},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.5449066162109375},{"id":"https://openalex.org/C45872418","wikidata":"https://www.wikidata.org/wiki/Q5318966","display_name":"Dynamic demand","level":3,"score":0.5135986804962158},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.4905089735984802},{"id":"https://openalex.org/C93682380","wikidata":"https://www.wikidata.org/wiki/Q2025226","display_name":"Static timing analysis","level":2,"score":0.49005138874053955},{"id":"https://openalex.org/C163258240","wikidata":"https://www.wikidata.org/wiki/Q25342","display_name":"Power (physics)","level":2,"score":0.4878275692462921},{"id":"https://openalex.org/C174086752","wikidata":"https://www.wikidata.org/wiki/Q5253471","display_name":"Delay calculation","level":3,"score":0.4743971824645996},{"id":"https://openalex.org/C98045186","wikidata":"https://www.wikidata.org/wiki/Q205663","display_name":"Process (computing)","level":2,"score":0.4646325409412384},{"id":"https://openalex.org/C179431463","wikidata":"https://www.wikidata.org/wiki/Q1760638","display_name":"Fan-in","level":2,"score":0.43900150060653687},{"id":"https://openalex.org/C131017901","wikidata":"https://www.wikidata.org/wiki/Q170451","display_name":"Logic gate","level":2,"score":0.4379277229309082},{"id":"https://openalex.org/C90806461","wikidata":"https://www.wikidata.org/wiki/Q1144416","display_name":"Propagation delay","level":2,"score":0.3921879231929779},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.29800814390182495},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.2557433843612671},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.06511637568473816},{"id":"https://openalex.org/C185592680","wikidata":"https://www.wikidata.org/wiki/Q2329","display_name":"Chemistry","level":0,"score":0.0},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.0},{"id":"https://openalex.org/C62520636","wikidata":"https://www.wikidata.org/wiki/Q944","display_name":"Quantum mechanics","level":1,"score":0.0},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.0},{"id":"https://openalex.org/C147789679","wikidata":"https://www.wikidata.org/wiki/Q11372","display_name":"Physical chemistry","level":1,"score":0.0},{"id":"https://openalex.org/C17525397","wikidata":"https://www.wikidata.org/wiki/Q176140","display_name":"Electrode","level":2,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/tcsi.2011.2107171","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tcsi.2011.2107171","pdf_url":null,"source":{"id":"https://openalex.org/S116977442","display_name":"IEEE Transactions on Circuits and Systems I Regular Papers","issn_l":"1549-8328","issn":["1549-8328","1558-0806"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Circuits and Systems I: Regular Papers","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[{"score":0.800000011920929,"display_name":"Affordable and clean energy","id":"https://metadata.un.org/sdg/7"}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":33,"referenced_works":["https://openalex.org/W1508193266","https://openalex.org/W1830487160","https://openalex.org/W2005625397","https://openalex.org/W2006589289","https://openalex.org/W2033443176","https://openalex.org/W2040121641","https://openalex.org/W2043391515","https://openalex.org/W2098944725","https://openalex.org/W2099320289","https://openalex.org/W2100115371","https://openalex.org/W2104113688","https://openalex.org/W2105160257","https://openalex.org/W2110103617","https://openalex.org/W2111702626","https://openalex.org/W2112723377","https://openalex.org/W2116359224","https://openalex.org/W2116597081","https://openalex.org/W2117475675","https://openalex.org/W2117648153","https://openalex.org/W2119591281","https://openalex.org/W2133406150","https://openalex.org/W2133437640","https://openalex.org/W2134067926","https://openalex.org/W2134647140","https://openalex.org/W2140823559","https://openalex.org/W2149855589","https://openalex.org/W2155583994","https://openalex.org/W2163462485","https://openalex.org/W2168226525","https://openalex.org/W2326009939","https://openalex.org/W2540301466","https://openalex.org/W2949464251","https://openalex.org/W6638685829"],"related_works":["https://openalex.org/W2100329931","https://openalex.org/W3015599398","https://openalex.org/W4229446324","https://openalex.org/W2158805860","https://openalex.org/W2110367374","https://openalex.org/W1986294008","https://openalex.org/W2345182073","https://openalex.org/W2101512735","https://openalex.org/W2025241521","https://openalex.org/W4281385583"],"abstract_inverted_index":{"Dynamic":[0],"gates":[1,21],"are":[2,81],"preferred":[3],"in":[4,10,43,62,144],"the":[5,15,39,46,64,84,90,112,115,130,138,146,150],"design":[6],"of":[7,19,25,114,128,152],"high-performance":[8],"modules":[9,32],"modern":[11],"microprocessors":[12],"due":[13],"to":[14,38,87,101,119,135],"relatively":[16],"high":[17,30],"speed":[18],"dynamic":[20,47,123],"compared":[22],"with":[23],"that":[24,111],"standard":[26],"CMOS":[27,108],"gates.":[28],"These":[29],"performance":[31],"have":[33],"strict":[34],"timing":[35,65,71,91,131],"constraints.":[36],"Due":[37],"increased":[40],"process":[41,94],"variations":[42],"scaled":[44],"technologies,":[45],"circuit":[48,118,141],"delay":[49,59,147],"exhibits":[50],"a":[51,70,120],"substantial":[52],"variability":[53,60,148],"around":[54],"its":[55],"nominal":[56],"value.":[57],"This":[58],"results":[61,143],"violating":[63],"constraints,":[66],"and":[67],"correspondingly,":[68],"causes":[69],"yield":[72,92,132],"loss.":[73],"In":[74],"this":[75],"paper,":[76],"novel":[77],"negative":[78,116,139],"capacitance":[79,117,140],"circuits":[80],"developed,":[82],"for":[83],"first":[85],"time,":[86],"statistically":[88],"improve":[89],"under":[93],"variations.":[95],"Post":[96],"layout":[97],"simulation":[98],"results,":[99],"referring":[100],"an":[102],"industrial":[103],"hardware-calibrated":[104],"TSMC":[105],"65":[106],"nm":[107],"technology,":[109],"show":[110],"adoption":[113,142],"64-input":[121],"wide":[122],"OR":[124],"gate":[125],"is":[126],"capable":[127],"improving":[129],"from":[133],"50%":[134],"100%.":[136],"Moreover,":[137],"reducing":[145],"at":[149],"expense":[151],"excess":[153],"power":[154],"overhead.":[155]},"counts_by_year":[{"year":2022,"cited_by_count":2},{"year":2021,"cited_by_count":1},{"year":2020,"cited_by_count":2},{"year":2018,"cited_by_count":1},{"year":2016,"cited_by_count":1},{"year":2015,"cited_by_count":2},{"year":2014,"cited_by_count":9},{"year":2013,"cited_by_count":5},{"year":2012,"cited_by_count":3}],"updated_date":"2026-06-11T09:08:48.828518","created_date":"2025-10-10T00:00:00"}