{"id":"https://openalex.org/W2127628206","doi":"https://doi.org/10.1109/tcsi.2010.2103154","title":"An 8T Differential SRAM With Improved Noise Margin for Bit-Interleaving in 65 nm CMOS","display_name":"An 8T Differential SRAM With Improved Noise Margin for Bit-Interleaving in 65 nm CMOS","publication_year":2011,"publication_date":"2011-01-28","ids":{"openalex":"https://openalex.org/W2127628206","doi":"https://doi.org/10.1109/tcsi.2010.2103154","mag":"2127628206"},"language":"en","primary_location":{"id":"doi:10.1109/tcsi.2010.2103154","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tcsi.2010.2103154","pdf_url":null,"source":{"id":"https://openalex.org/S116977442","display_name":"IEEE Transactions on Circuits and Systems I Regular Papers","issn_l":"1549-8328","issn":["1549-8328","1558-0806"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Circuits and Systems I: Regular Papers","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5103582106","display_name":"Do Anh-Tuan","orcid":null},"institutions":[{"id":"https://openalex.org/I172675005","display_name":"Nanyang Technological University","ror":"https://ror.org/02e7b5302","country_code":"SG","type":"education","lineage":["https://openalex.org/I172675005"]}],"countries":["SG"],"is_corresponding":false,"raw_author_name":"Do Anh-Tuan","raw_affiliation_strings":["Centre for Integrated Circuits and Systems (CICS), School of Electrical and Electronics Engineering, Nanyang Technological University, Singapore","Centre for Integrated Circuits & Syst. (CICS), Nanyang Technol. Univ., Singapore, Singapore"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Centre for Integrated Circuits and Systems (CICS), School of Electrical and Electronics Engineering, Nanyang Technological University, Singapore","institution_ids":["https://openalex.org/I172675005"]},{"raw_affiliation_string":"Centre for Integrated Circuits & Syst. (CICS), Nanyang Technol. Univ., Singapore, Singapore","institution_ids":["https://openalex.org/I172675005"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5035102341","display_name":"Jeremy Yung Shern Low","orcid":null},"institutions":[{"id":"https://openalex.org/I172675005","display_name":"Nanyang Technological University","ror":"https://ror.org/02e7b5302","country_code":"SG","type":"education","lineage":["https://openalex.org/I172675005"]}],"countries":["SG"],"is_corresponding":false,"raw_author_name":"Jeremy Yung Shern Low","raw_affiliation_strings":["School of Electrical and Electronics Engineering, Nanyang Technological University, Singapore","Sch. of Electr. & Electron. Eng., Nanyang Technol. Univ., Singapore, , Singapore"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"School of Electrical and Electronics Engineering, Nanyang Technological University, Singapore","institution_ids":["https://openalex.org/I172675005"]},{"raw_affiliation_string":"Sch. of Electr. & Electron. Eng., Nanyang Technol. Univ., Singapore, , Singapore","institution_ids":["https://openalex.org/I172675005"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5019413100","display_name":"Joshua Yung Lih Low","orcid":null},"institutions":[{"id":"https://openalex.org/I172675005","display_name":"Nanyang Technological University","ror":"https://ror.org/02e7b5302","country_code":"SG","type":"education","lineage":["https://openalex.org/I172675005"]}],"countries":["SG"],"is_corresponding":false,"raw_author_name":"Joshua Yung Lih Low","raw_affiliation_strings":["School of Electrical and Electronics Engineering, Nanyang Technological University, Singapore","Sch. of Electr. & Electron. Eng., Nanyang Technol. Univ., Singapore, , Singapore"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"School of Electrical and Electronics Engineering, Nanyang Technological University, Singapore","institution_ids":["https://openalex.org/I172675005"]},{"raw_affiliation_string":"Sch. of Electr. & Electron. Eng., Nanyang Technol. Univ., Singapore, , Singapore","institution_ids":["https://openalex.org/I172675005"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5112074990","display_name":"Zhi\u2010Hui Kong","orcid":null},"institutions":[{"id":"https://openalex.org/I172675005","display_name":"Nanyang Technological University","ror":"https://ror.org/02e7b5302","country_code":"SG","type":"education","lineage":["https://openalex.org/I172675005"]}],"countries":["SG"],"is_corresponding":false,"raw_author_name":"Zhi-Hui Kong","raw_affiliation_strings":["School of Electrical and Electronics Engineering, Nanyang Technological University, Singapore","Sch. of Electr. & Electron. Eng., Nanyang Technol. Univ., Singapore, , Singapore"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"School of Electrical and Electronics Engineering, Nanyang Technological University, Singapore","institution_ids":["https://openalex.org/I172675005"]},{"raw_affiliation_string":"Sch. of Electr. & Electron. Eng., Nanyang Technol. Univ., Singapore, , Singapore","institution_ids":["https://openalex.org/I172675005"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5031548254","display_name":"Xiaoliang Tan","orcid":"https://orcid.org/0000-0001-7822-060X"},"institutions":[{"id":"https://openalex.org/I172675005","display_name":"Nanyang Technological University","ror":"https://ror.org/02e7b5302","country_code":"SG","type":"education","lineage":["https://openalex.org/I172675005"]}],"countries":["SG"],"is_corresponding":false,"raw_author_name":"Xiaoliang Tan","raw_affiliation_strings":["School of Electrical and Electronics Engineering, Nanyang Technological University, Singapore","Sch. of Electr. & Electron. Eng., Nanyang Technol. Univ., Singapore, , Singapore"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"School of Electrical and Electronics Engineering, Nanyang Technological University, Singapore","institution_ids":["https://openalex.org/I172675005"]},{"raw_affiliation_string":"Sch. of Electr. & Electron. Eng., Nanyang Technol. Univ., Singapore, , Singapore","institution_ids":["https://openalex.org/I172675005"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5009974389","display_name":"Kiat Seng Yeo","orcid":"https://orcid.org/0000-0002-4524-707X"},"institutions":[{"id":"https://openalex.org/I172675005","display_name":"Nanyang Technological University","ror":"https://ror.org/02e7b5302","country_code":"SG","type":"education","lineage":["https://openalex.org/I172675005"]}],"countries":["SG"],"is_corresponding":false,"raw_author_name":"Kiat-Seng Yeo","raw_affiliation_strings":["School of Electrical and Electronics Engineering, Nanyang Technological University, Singapore","Sch. of Electr. & Electron. Eng., Nanyang Technol. Univ., Singapore, , Singapore"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"School of Electrical and Electronics Engineering, Nanyang Technological University, Singapore","institution_ids":["https://openalex.org/I172675005"]},{"raw_affiliation_string":"Sch. of Electr. & Electron. Eng., Nanyang Technol. Univ., Singapore, , Singapore","institution_ids":["https://openalex.org/I172675005"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":[],"corresponding_institution_ids":["https://openalex.org/I172675005"],"apc_list":null,"apc_paid":null,"fwci":5.5916,"has_fulltext":false,"cited_by_count":114,"citation_normalized_percentile":{"value":0.9622512,"is_in_top_1_percent":false,"is_in_top_10_percent":true},"cited_by_percentile_year":{"min":96,"max":99},"biblio":{"volume":"58","issue":"6","first_page":"1252","last_page":"1263"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10558","display_name":"Advancements in Semiconductor Devices and Circuit Design","score":0.9994999766349792,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.9994000196456909,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/static-random-access-memory","display_name":"Static random-access memory","score":0.79892897605896},{"id":"https://openalex.org/keywords/interleaving","display_name":"Interleaving","score":0.772871732711792},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.5980047583580017},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.5914619565010071},{"id":"https://openalex.org/keywords/noise-margin","display_name":"Noise margin","score":0.5871376991271973},{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.573201596736908},{"id":"https://openalex.org/keywords/noise","display_name":"Noise (video)","score":0.5426623225212097},{"id":"https://openalex.org/keywords/margin","display_name":"Margin (machine learning)","score":0.5363261699676514},{"id":"https://openalex.org/keywords/power","display_name":"Power (physics)","score":0.48349764943122864},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.43383973836898804},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.26009058952331543},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.25173139572143555},{"id":"https://openalex.org/keywords/transistor","display_name":"Transistor","score":0.22384494543075562},{"id":"https://openalex.org/keywords/physics","display_name":"Physics","score":0.080850750207901}],"concepts":[{"id":"https://openalex.org/C68043766","wikidata":"https://www.wikidata.org/wiki/Q267416","display_name":"Static random-access memory","level":2,"score":0.79892897605896},{"id":"https://openalex.org/C28034677","wikidata":"https://www.wikidata.org/wiki/Q17092530","display_name":"Interleaving","level":2,"score":0.772871732711792},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.5980047583580017},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.5914619565010071},{"id":"https://openalex.org/C179499742","wikidata":"https://www.wikidata.org/wiki/Q1324892","display_name":"Noise margin","level":4,"score":0.5871376991271973},{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.573201596736908},{"id":"https://openalex.org/C99498987","wikidata":"https://www.wikidata.org/wiki/Q2210247","display_name":"Noise (video)","level":3,"score":0.5426623225212097},{"id":"https://openalex.org/C774472","wikidata":"https://www.wikidata.org/wiki/Q6760393","display_name":"Margin (machine learning)","level":2,"score":0.5363261699676514},{"id":"https://openalex.org/C163258240","wikidata":"https://www.wikidata.org/wiki/Q25342","display_name":"Power (physics)","level":2,"score":0.48349764943122864},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.43383973836898804},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.26009058952331543},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.25173139572143555},{"id":"https://openalex.org/C172385210","wikidata":"https://www.wikidata.org/wiki/Q5339","display_name":"Transistor","level":3,"score":0.22384494543075562},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.080850750207901},{"id":"https://openalex.org/C119857082","wikidata":"https://www.wikidata.org/wiki/Q2539","display_name":"Machine learning","level":1,"score":0.0},{"id":"https://openalex.org/C115961682","wikidata":"https://www.wikidata.org/wiki/Q860623","display_name":"Image (mathematics)","level":2,"score":0.0},{"id":"https://openalex.org/C154945302","wikidata":"https://www.wikidata.org/wiki/Q11660","display_name":"Artificial intelligence","level":1,"score":0.0},{"id":"https://openalex.org/C62520636","wikidata":"https://www.wikidata.org/wiki/Q944","display_name":"Quantum mechanics","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/tcsi.2010.2103154","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tcsi.2010.2103154","pdf_url":null,"source":{"id":"https://openalex.org/S116977442","display_name":"IEEE Transactions on Circuits and Systems I Regular Papers","issn_l":"1549-8328","issn":["1549-8328","1558-0806"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Circuits and Systems I: Regular Papers","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[{"id":"https://metadata.un.org/sdg/7","display_name":"Affordable and clean energy","score":0.8999999761581421}],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":24,"referenced_works":["https://openalex.org/W2001714442","https://openalex.org/W2002612140","https://openalex.org/W2066269170","https://openalex.org/W2089731760","https://openalex.org/W2090860290","https://openalex.org/W2095913060","https://openalex.org/W2099087448","https://openalex.org/W2101165123","https://openalex.org/W2106339466","https://openalex.org/W2123384112","https://openalex.org/W2135031174","https://openalex.org/W2135956512","https://openalex.org/W2141596871","https://openalex.org/W2144965240","https://openalex.org/W2155153274","https://openalex.org/W2155275912","https://openalex.org/W2155514194","https://openalex.org/W2155583994","https://openalex.org/W2160285928","https://openalex.org/W2166341017","https://openalex.org/W2169338656","https://openalex.org/W3148792909","https://openalex.org/W6682981187","https://openalex.org/W6683588402"],"related_works":["https://openalex.org/W2118528827","https://openalex.org/W2154145758","https://openalex.org/W2110839220","https://openalex.org/W2164440002","https://openalex.org/W2055212673","https://openalex.org/W1582224818","https://openalex.org/W2775062502","https://openalex.org/W3032966989","https://openalex.org/W2044270051","https://openalex.org/W2122999171"],"abstract_inverted_index":{"Lowering":[0],"power":[1,116,181],"consumption":[2],"and":[3,65,139,177],"increasing":[4],"noise":[5,137,175],"margin":[6,138,176],"have":[7,43,69],"become":[8],"two":[9],"central":[10],"topics":[11],"in":[12,24,41,157],"every":[13],"state":[14],"of":[15,150],"the":[16,46,73,120,135,140,144,151,169,185],"art":[17],"SRAM":[18,49,97,153],"design.":[19,123,188],"Due":[20],"to":[21,31,56,102,119,132,184],"parameter":[22],"fluctuations":[23],"scaled":[25],"technologies,":[26],"stable":[27],"operation":[28],"is":[29,130],"critical":[30],"obtain":[32],"high":[33],"yield":[34],"low-voltage,":[35],"low-power":[36,60],"SRAM.":[37],"Recent":[38],"published":[39],"works":[40],"literature":[42],"shown":[44],"that":[45,98,168],"conventional":[47,107,121,186],"6T":[48,122,187],"suffers":[50],"a":[51,93,146,158],"severe":[52],"stability":[53],"degradation":[54],"due":[55],"access":[57],"disturbances":[58],"at":[59],"mode.":[61],"Thus,":[62],"several":[63],"8T":[64,96],"10T":[66],"cell":[67,74],"designs":[68],"been":[70,155],"reported,":[71],"improving":[72],"stability.":[75],"However,":[76],"they":[77],"either":[78],"employ":[79],"single-ended":[80],"read":[81,136],"port":[82],"or":[83],"require":[84],"too":[85],"large":[86],"area.":[87],"In":[88],"this":[89],"paper,":[90],"we":[91],"use":[92],"fully":[94],"differential":[95],"allows":[99],"efficient":[100],"bit-interleaving":[101],"achieve":[103],"soft-error":[104],"tolerance":[105],"with":[106],"Error":[108],"Correcting":[109],"Code":[110],"(ECC).":[111],"It":[112],"also":[113],"consumes":[114,178],"less":[115,180],"when":[117,182],"compared":[118,183],"A":[124],"column-based":[125],"dynamic":[126],"supply":[127],"voltage":[128],"scheme":[129],"utilized":[131],"improve":[133],"both":[134],"write-ability.":[141],"To":[142],"verify":[143],"technique,":[145],"128":[147],"\u00d7":[148],"64-bit":[149],"proposed":[152,170],"has":[154,172],"implemented":[156],"standard":[159],"65":[160],"nm/1":[161],"V":[162],"CMOS":[163],"process.":[164],"Simulation":[165],"results":[166],"reaffirmed":[167],"design":[171],"2\u00d7":[173],"higher":[174],"54%":[179]},"counts_by_year":[{"year":2025,"cited_by_count":8},{"year":2024,"cited_by_count":5},{"year":2023,"cited_by_count":7},{"year":2022,"cited_by_count":14},{"year":2021,"cited_by_count":10},{"year":2020,"cited_by_count":6},{"year":2019,"cited_by_count":12},{"year":2018,"cited_by_count":5},{"year":2017,"cited_by_count":12},{"year":2016,"cited_by_count":10},{"year":2015,"cited_by_count":3},{"year":2014,"cited_by_count":8},{"year":2013,"cited_by_count":5},{"year":2012,"cited_by_count":6}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}
