{"id":"https://openalex.org/W2144289736","doi":"https://doi.org/10.1109/tcsi.2010.2071690","title":"Single-Ended Subthreshold SRAM With Asymmetrical Write/Read-Assist","display_name":"Single-Ended Subthreshold SRAM With Asymmetrical Write/Read-Assist","publication_year":2010,"publication_date":"2010-11-18","ids":{"openalex":"https://openalex.org/W2144289736","doi":"https://doi.org/10.1109/tcsi.2010.2071690","mag":"2144289736"},"language":"en","primary_location":{"id":"doi:10.1109/tcsi.2010.2071690","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tcsi.2010.2071690","pdf_url":null,"source":{"id":"https://openalex.org/S116977442","display_name":"IEEE Transactions on Circuits and Systems I Regular Papers","issn_l":"1549-8328","issn":["1549-8328","1558-0806"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Circuits and Systems I: Regular Papers","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5022834462","display_name":"Ming-Hsien Tu","orcid":null},"institutions":[{"id":"https://openalex.org/I148366613","display_name":"National Yang Ming Chiao Tung University","ror":"https://ror.org/00se2k293","country_code":"TW","type":"education","lineage":["https://openalex.org/I148366613"]}],"countries":["TW"],"is_corresponding":true,"raw_author_name":"Ming-Hsien Tu","raw_affiliation_strings":["Electronics Engineering Department and Institute of Electronics, National Chiao Tung University, Hsinchu, Taiwan","Electron. Eng. Dept. & Inst. of Electron., Nat. Chiao Tung Univ., Hsinchu, Taiwan"],"affiliations":[{"raw_affiliation_string":"Electronics Engineering Department and Institute of Electronics, National Chiao Tung University, Hsinchu, Taiwan","institution_ids":["https://openalex.org/I148366613"]},{"raw_affiliation_string":"Electron. Eng. Dept. & Inst. of Electron., Nat. Chiao Tung Univ., Hsinchu, Taiwan","institution_ids":["https://openalex.org/I148366613"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5102133705","display_name":"Jihi-Yu Lin","orcid":null},"institutions":[{"id":"https://openalex.org/I148366613","display_name":"National Yang Ming Chiao Tung University","ror":"https://ror.org/00se2k293","country_code":"TW","type":"education","lineage":["https://openalex.org/I148366613"]}],"countries":["TW"],"is_corresponding":false,"raw_author_name":"Jihi-Yu Lin","raw_affiliation_strings":["Electronics Engineering Department and Institute of Electronics, National Chiao Tung University, Hsinchu, Taiwan","Electron. Eng. Dept. & Inst. of Electron., Nat. Chiao Tung Univ., Hsinchu, Taiwan"],"affiliations":[{"raw_affiliation_string":"Electronics Engineering Department and Institute of Electronics, National Chiao Tung University, Hsinchu, Taiwan","institution_ids":["https://openalex.org/I148366613"]},{"raw_affiliation_string":"Electron. Eng. Dept. & Inst. of Electron., Nat. Chiao Tung Univ., Hsinchu, Taiwan","institution_ids":["https://openalex.org/I148366613"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5017416395","display_name":"Ming-Chien Tsai","orcid":null},"institutions":[{"id":"https://openalex.org/I148366613","display_name":"National Yang Ming Chiao Tung University","ror":"https://ror.org/00se2k293","country_code":"TW","type":"education","lineage":["https://openalex.org/I148366613"]}],"countries":["TW"],"is_corresponding":false,"raw_author_name":"Ming-Chien Tsai","raw_affiliation_strings":["Electronics Engineering Department and Institute of Electronics, National Chiao Tung University, Hsinchu, Taiwan","Electron. Eng. Dept. & Inst. of Electron., Nat. Chiao Tung Univ., Hsinchu, Taiwan"],"affiliations":[{"raw_affiliation_string":"Electronics Engineering Department and Institute of Electronics, National Chiao Tung University, Hsinchu, Taiwan","institution_ids":["https://openalex.org/I148366613"]},{"raw_affiliation_string":"Electron. Eng. Dept. & Inst. of Electron., Nat. Chiao Tung Univ., Hsinchu, Taiwan","institution_ids":["https://openalex.org/I148366613"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5061859062","display_name":"Shyh\u2010Jye Jou","orcid":"https://orcid.org/0000-0002-8821-3486"},"institutions":[{"id":"https://openalex.org/I148366613","display_name":"National Yang Ming Chiao Tung University","ror":"https://ror.org/00se2k293","country_code":"TW","type":"education","lineage":["https://openalex.org/I148366613"]}],"countries":["TW"],"is_corresponding":false,"raw_author_name":"Shyh-Jye Jou","raw_affiliation_strings":["Electronics Engineering Department and Institute of Electronics, National Chiao Tung University, Hsinchu, Taiwan","Electron. Eng. Dept. & Inst. of Electron., Nat. Chiao Tung Univ., Hsinchu, Taiwan"],"affiliations":[{"raw_affiliation_string":"Electronics Engineering Department and Institute of Electronics, National Chiao Tung University, Hsinchu, Taiwan","institution_ids":["https://openalex.org/I148366613"]},{"raw_affiliation_string":"Electron. Eng. Dept. & Inst. of Electron., Nat. Chiao Tung Univ., Hsinchu, Taiwan","institution_ids":["https://openalex.org/I148366613"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5039359237","display_name":"Ching-Te Chuang","orcid":null},"institutions":[{"id":"https://openalex.org/I148366613","display_name":"National Yang Ming Chiao Tung University","ror":"https://ror.org/00se2k293","country_code":"TW","type":"education","lineage":["https://openalex.org/I148366613"]}],"countries":["TW"],"is_corresponding":false,"raw_author_name":"Ching-Te Chuang","raw_affiliation_strings":["Electronics Engineering Department and Institute of Electronics, National Chiao Tung University, Hsinchu, Taiwan","Electron. Eng. Dept. & Inst. of Electron., Nat. Chiao Tung Univ., Hsinchu, Taiwan"],"affiliations":[{"raw_affiliation_string":"Electronics Engineering Department and Institute of Electronics, National Chiao Tung University, Hsinchu, Taiwan","institution_ids":["https://openalex.org/I148366613"]},{"raw_affiliation_string":"Electron. Eng. Dept. & Inst. of Electron., Nat. Chiao Tung Univ., Hsinchu, Taiwan","institution_ids":["https://openalex.org/I148366613"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":5,"corresponding_author_ids":["https://openalex.org/A5022834462"],"corresponding_institution_ids":["https://openalex.org/I148366613"],"apc_list":null,"apc_paid":null,"fwci":4.6183,"has_fulltext":false,"cited_by_count":137,"citation_normalized_percentile":{"value":0.95089012,"is_in_top_1_percent":false,"is_in_top_10_percent":true},"cited_by_percentile_year":{"min":96,"max":100},"biblio":{"volume":"57","issue":"12","first_page":"3039","last_page":"3047"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10472","display_name":"Semiconductor materials and devices","score":0.9995999932289124,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.9995999932289124,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/static-random-access-memory","display_name":"Static random-access memory","score":0.7561554312705994},{"id":"https://openalex.org/keywords/power-consumption","display_name":"Power consumption","score":0.6760430335998535},{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.6278449296951294},{"id":"https://openalex.org/keywords/chip","display_name":"Chip","score":0.6091429591178894},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.6009209156036377},{"id":"https://openalex.org/keywords/margin","display_name":"Margin (machine learning)","score":0.5392123460769653},{"id":"https://openalex.org/keywords/subthreshold-conduction","display_name":"Subthreshold conduction","score":0.5251573920249939},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.3606550693511963},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.3395065665245056},{"id":"https://openalex.org/keywords/power","display_name":"Power (physics)","score":0.30434322357177734},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.29818952083587646},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.262462854385376},{"id":"https://openalex.org/keywords/transistor","display_name":"Transistor","score":0.2606806755065918},{"id":"https://openalex.org/keywords/telecommunications","display_name":"Telecommunications","score":0.1689266562461853},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.14446163177490234},{"id":"https://openalex.org/keywords/physics","display_name":"Physics","score":0.1231965720653534}],"concepts":[{"id":"https://openalex.org/C68043766","wikidata":"https://www.wikidata.org/wiki/Q267416","display_name":"Static random-access memory","level":2,"score":0.7561554312705994},{"id":"https://openalex.org/C2984118289","wikidata":"https://www.wikidata.org/wiki/Q29954","display_name":"Power consumption","level":3,"score":0.6760430335998535},{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.6278449296951294},{"id":"https://openalex.org/C165005293","wikidata":"https://www.wikidata.org/wiki/Q1074500","display_name":"Chip","level":2,"score":0.6091429591178894},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.6009209156036377},{"id":"https://openalex.org/C774472","wikidata":"https://www.wikidata.org/wiki/Q6760393","display_name":"Margin (machine learning)","level":2,"score":0.5392123460769653},{"id":"https://openalex.org/C156465305","wikidata":"https://www.wikidata.org/wiki/Q1658601","display_name":"Subthreshold conduction","level":4,"score":0.5251573920249939},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.3606550693511963},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.3395065665245056},{"id":"https://openalex.org/C163258240","wikidata":"https://www.wikidata.org/wiki/Q25342","display_name":"Power (physics)","level":2,"score":0.30434322357177734},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.29818952083587646},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.262462854385376},{"id":"https://openalex.org/C172385210","wikidata":"https://www.wikidata.org/wiki/Q5339","display_name":"Transistor","level":3,"score":0.2606806755065918},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.1689266562461853},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.14446163177490234},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.1231965720653534},{"id":"https://openalex.org/C119857082","wikidata":"https://www.wikidata.org/wiki/Q2539","display_name":"Machine learning","level":1,"score":0.0},{"id":"https://openalex.org/C62520636","wikidata":"https://www.wikidata.org/wiki/Q944","display_name":"Quantum mechanics","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/tcsi.2010.2071690","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tcsi.2010.2071690","pdf_url":null,"source":{"id":"https://openalex.org/S116977442","display_name":"IEEE Transactions on Circuits and Systems I Regular Papers","issn_l":"1549-8328","issn":["1549-8328","1558-0806"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Circuits and Systems I: Regular Papers","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[{"score":0.8500000238418579,"id":"https://metadata.un.org/sdg/7","display_name":"Affordable and clean energy"}],"awards":[],"funders":[{"id":"https://openalex.org/F4320323229","display_name":"National Central University","ror":"https://ror.org/00944ve71"}],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":28,"referenced_works":["https://openalex.org/W1538116008","https://openalex.org/W1753784006","https://openalex.org/W1967279416","https://openalex.org/W1970601044","https://openalex.org/W2000410358","https://openalex.org/W2017195664","https://openalex.org/W2057899754","https://openalex.org/W2060385046","https://openalex.org/W2066728424","https://openalex.org/W2080768884","https://openalex.org/W2089731760","https://openalex.org/W2097825079","https://openalex.org/W2099087448","https://openalex.org/W2106837243","https://openalex.org/W2122497527","https://openalex.org/W2126770830","https://openalex.org/W2127190809","https://openalex.org/W2128876494","https://openalex.org/W2131833150","https://openalex.org/W2135796982","https://openalex.org/W2137177817","https://openalex.org/W2144289559","https://openalex.org/W2157743350","https://openalex.org/W2397682474","https://openalex.org/W3149884365","https://openalex.org/W6642077318","https://openalex.org/W6654702436","https://openalex.org/W6667248517"],"related_works":["https://openalex.org/W2155827627","https://openalex.org/W3151633427","https://openalex.org/W4242937255","https://openalex.org/W2131019417","https://openalex.org/W2018127069","https://openalex.org/W2132385758","https://openalex.org/W2212894501","https://openalex.org/W2117824263","https://openalex.org/W2134421493","https://openalex.org/W2119025037"],"abstract_inverted_index":{"In":[0],"this":[1],"paper,":[2],"asymmetrical":[3],"Write-assist":[4],"cell":[5],"virtual":[6],"ground":[7],"biasing":[8],"scheme":[9],"and":[10,29],"positive":[11],"feedback":[12],"sensing":[13],"keeper":[14],"schemes":[15],"are":[16],"proposed":[17],"to":[18],"improve":[19],"the":[20],"read":[21],"static":[22],"noise":[23],"margin":[24,27],"(RSNM),":[25],"write":[26],"(WM),":[28],"operation":[30,69],"speed":[31],"of":[32,71,80],"a":[33],"single-ended":[34],"read/write":[35],"8":[36],"T":[37],"SRAM":[38,43],"cell.":[39],"A":[40],"4":[41],"Kbit":[42],"test":[44,54],"chip":[45,55],"is":[46],"implemented":[47],"in":[48],"90":[49],"nm":[50],"CMOS":[51],"technology.":[52],"The":[53],"measurement":[56],"results":[57],"show":[58],"that":[59],"at":[60],"0.2":[61],"V":[62,63],"<sub":[64],"xmlns:mml=\"http://www.w3.org/1998/Math/MathML\"":[65],"xmlns:xlink=\"http://www.w3.org/1999/xlink\">DD</sub>":[66],",":[67],"an":[68],"frequency":[70],"6.0":[72],"MHz":[73],"can":[74],"be":[75],"achieved":[76],"with":[77],"power":[78],"consumption":[79],"10.4":[81],"\u03bcW.":[82]},"counts_by_year":[{"year":2026,"cited_by_count":1},{"year":2025,"cited_by_count":3},{"year":2024,"cited_by_count":5},{"year":2023,"cited_by_count":10},{"year":2022,"cited_by_count":13},{"year":2021,"cited_by_count":16},{"year":2020,"cited_by_count":10},{"year":2019,"cited_by_count":16},{"year":2018,"cited_by_count":11},{"year":2017,"cited_by_count":8},{"year":2016,"cited_by_count":15},{"year":2015,"cited_by_count":6},{"year":2014,"cited_by_count":7},{"year":2013,"cited_by_count":6},{"year":2012,"cited_by_count":7}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}
