{"id":"https://openalex.org/W2170528556","doi":"https://doi.org/10.1109/tcsi.2009.2038553","title":"Crosstalk Glitch Propagation Modeling for Asynchronous Interfaces in Globally Asynchronous Locally Synchronous Systems","display_name":"Crosstalk Glitch Propagation Modeling for Asynchronous Interfaces in Globally Asynchronous Locally Synchronous Systems","publication_year":2010,"publication_date":"2010-02-12","ids":{"openalex":"https://openalex.org/W2170528556","doi":"https://doi.org/10.1109/tcsi.2009.2038553","mag":"2170528556"},"language":"en","primary_location":{"id":"doi:10.1109/tcsi.2009.2038553","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tcsi.2009.2038553","pdf_url":null,"source":{"id":"https://openalex.org/S116977442","display_name":"IEEE Transactions on Circuits and Systems I Regular Papers","issn_l":"1549-8328","issn":["1549-8328","1558-0806"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Circuits and Systems I: Regular Papers","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5034599612","display_name":"Syed Rafay Hasan","orcid":"https://orcid.org/0000-0003-0183-8086"},"institutions":[{"id":"https://openalex.org/I60158472","display_name":"Concordia University","ror":"https://ror.org/0420zvk78","country_code":"CA","type":"education","lineage":["https://openalex.org/I60158472"]}],"countries":["CA"],"is_corresponding":true,"raw_author_name":"S R Hasan","raw_affiliation_strings":["Department of Electrical and Computer Engineering, Concordia University, Montreal, QC, Canada"],"affiliations":[{"raw_affiliation_string":"Department of Electrical and Computer Engineering, Concordia University, Montreal, QC, Canada","institution_ids":["https://openalex.org/I60158472"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5065902799","display_name":"Normand B\u00e9langer","orcid":null},"institutions":[{"id":"https://openalex.org/I45683168","display_name":"Polytechnique Montr\u00e9al","ror":"https://ror.org/05f8d4e86","country_code":"CA","type":"education","lineage":["https://openalex.org/I45683168"]}],"countries":["CA"],"is_corresponding":false,"raw_author_name":"Normand B\u00e9langer","raw_affiliation_strings":["Groupe de Recherche en Micro\u00e9lectronique et Microsyst\u00e8mes, \u00e9cole Polytechnique de Montr\u00e9al, Montreal, QC, Canada"],"affiliations":[{"raw_affiliation_string":"Groupe de Recherche en Micro\u00e9lectronique et Microsyst\u00e8mes, \u00e9cole Polytechnique de Montr\u00e9al, Montreal, QC, Canada","institution_ids":["https://openalex.org/I45683168"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5038488044","display_name":"Yvon Savaria","orcid":"https://orcid.org/0000-0002-3404-9959"},"institutions":[{"id":"https://openalex.org/I45683168","display_name":"Polytechnique Montr\u00e9al","ror":"https://ror.org/05f8d4e86","country_code":"CA","type":"education","lineage":["https://openalex.org/I45683168"]}],"countries":["CA"],"is_corresponding":false,"raw_author_name":"Y Savaria","raw_affiliation_strings":["Groupe de Recherche en Micro\u00e9lectronique et Microsyst\u00e8mes, \u00e9cole Polytechnique de Montr\u00e9al, Montreal, QC, Canada"],"affiliations":[{"raw_affiliation_string":"Groupe de Recherche en Micro\u00e9lectronique et Microsyst\u00e8mes, \u00e9cole Polytechnique de Montr\u00e9al, Montreal, QC, Canada","institution_ids":["https://openalex.org/I45683168"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5068820891","display_name":"M. Omair Ahmad","orcid":"https://orcid.org/0000-0002-2924-6659"},"institutions":[{"id":"https://openalex.org/I60158472","display_name":"Concordia University","ror":"https://ror.org/0420zvk78","country_code":"CA","type":"education","lineage":["https://openalex.org/I60158472"]}],"countries":["CA"],"is_corresponding":false,"raw_author_name":"M O Ahmad","raw_affiliation_strings":["Department of Electrical and Computer Engineering, Concordia University, Montreal, QC, Canada"],"affiliations":[{"raw_affiliation_string":"Department of Electrical and Computer Engineering, Concordia University, Montreal, QC, Canada","institution_ids":["https://openalex.org/I60158472"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":4,"corresponding_author_ids":["https://openalex.org/A5034599612"],"corresponding_institution_ids":["https://openalex.org/I60158472"],"apc_list":null,"apc_paid":null,"fwci":1.4675,"has_fulltext":false,"cited_by_count":9,"citation_normalized_percentile":{"value":0.84787145,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":96},"biblio":{"volume":"57","issue":"8","first_page":"2020","last_page":"2031"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.9988999962806702,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/asynchronous-communication","display_name":"Asynchronous communication","score":0.9019523859024048},{"id":"https://openalex.org/keywords/glitch","display_name":"Glitch","score":0.738090991973877},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.7019203901290894},{"id":"https://openalex.org/keywords/asynchronous-circuit","display_name":"Asynchronous circuit","score":0.6832853555679321},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.5858082175254822},{"id":"https://openalex.org/keywords/asynchronous-system","display_name":"Asynchronous system","score":0.5801390409469604},{"id":"https://openalex.org/keywords/electronic-circuit","display_name":"Electronic circuit","score":0.5783142447471619},{"id":"https://openalex.org/keywords/crosstalk","display_name":"Crosstalk","score":0.5019397735595703},{"id":"https://openalex.org/keywords/digital-electronics","display_name":"Digital electronics","score":0.4330720603466034},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.2356003224849701},{"id":"https://openalex.org/keywords/synchronous-circuit","display_name":"Synchronous circuit","score":0.17531225085258484},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.15688112378120422},{"id":"https://openalex.org/keywords/telecommunications","display_name":"Telecommunications","score":0.13088706135749817},{"id":"https://openalex.org/keywords/detector","display_name":"Detector","score":0.12568894028663635},{"id":"https://openalex.org/keywords/clock-signal","display_name":"Clock signal","score":0.11655908823013306}],"concepts":[{"id":"https://openalex.org/C151319957","wikidata":"https://www.wikidata.org/wiki/Q752739","display_name":"Asynchronous communication","level":2,"score":0.9019523859024048},{"id":"https://openalex.org/C191287063","wikidata":"https://www.wikidata.org/wiki/Q543281","display_name":"Glitch","level":3,"score":0.738090991973877},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7019203901290894},{"id":"https://openalex.org/C87695204","wikidata":"https://www.wikidata.org/wiki/Q629971","display_name":"Asynchronous circuit","level":5,"score":0.6832853555679321},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.5858082175254822},{"id":"https://openalex.org/C7923308","wikidata":"https://www.wikidata.org/wiki/Q4812211","display_name":"Asynchronous system","level":5,"score":0.5801390409469604},{"id":"https://openalex.org/C134146338","wikidata":"https://www.wikidata.org/wiki/Q1815901","display_name":"Electronic circuit","level":2,"score":0.5783142447471619},{"id":"https://openalex.org/C169822122","wikidata":"https://www.wikidata.org/wiki/Q230187","display_name":"Crosstalk","level":2,"score":0.5019397735595703},{"id":"https://openalex.org/C81843906","wikidata":"https://www.wikidata.org/wiki/Q173156","display_name":"Digital electronics","level":3,"score":0.4330720603466034},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.2356003224849701},{"id":"https://openalex.org/C42196554","wikidata":"https://www.wikidata.org/wiki/Q1186179","display_name":"Synchronous circuit","level":4,"score":0.17531225085258484},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.15688112378120422},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.13088706135749817},{"id":"https://openalex.org/C94915269","wikidata":"https://www.wikidata.org/wiki/Q1834857","display_name":"Detector","level":2,"score":0.12568894028663635},{"id":"https://openalex.org/C137059387","wikidata":"https://www.wikidata.org/wiki/Q426882","display_name":"Clock signal","level":3,"score":0.11655908823013306}],"mesh":[],"locations_count":2,"locations":[{"id":"doi:10.1109/tcsi.2009.2038553","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tcsi.2009.2038553","pdf_url":null,"source":{"id":"https://openalex.org/S116977442","display_name":"IEEE Transactions on Circuits and Systems I Regular Papers","issn_l":"1549-8328","issn":["1549-8328","1558-0806"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Circuits and Systems I: Regular Papers","raw_type":"journal-article"},{"id":"pmh:oai:publications.polymtl.ca:18199","is_oa":false,"landing_page_url":"https://publications.polymtl.ca/18199/","pdf_url":null,"source":{"id":"https://openalex.org/S4306401013","display_name":"PolyPublie (\u00c9cole Polytechnique de Montr\u00e9al)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/I45683168","host_organization_name":"Polytechnique Montr\u00e9al","host_organization_lineage":["https://openalex.org/I45683168"],"host_organization_lineage_names":[],"type":"repository"},"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"","raw_type":"Article de revue"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[{"id":"https://openalex.org/F4320310709","display_name":"CMC Microsystems","ror":"https://ror.org/03k70ea39"},{"id":"https://openalex.org/F4320320994","display_name":"Canada Research Chairs","ror":"https://ror.org/0517h6h17"},{"id":"https://openalex.org/F4320321588","display_name":"Concordia University","ror":"https://ror.org/0420zvk78"}],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":31,"referenced_works":["https://openalex.org/W186740131","https://openalex.org/W270615609","https://openalex.org/W1554885925","https://openalex.org/W1556480701","https://openalex.org/W1609287256","https://openalex.org/W1801108598","https://openalex.org/W1999619437","https://openalex.org/W2031273683","https://openalex.org/W2058948603","https://openalex.org/W2061782544","https://openalex.org/W2085239468","https://openalex.org/W2098414078","https://openalex.org/W2107216007","https://openalex.org/W2109012813","https://openalex.org/W2111903248","https://openalex.org/W2111994103","https://openalex.org/W2116252189","https://openalex.org/W2117897741","https://openalex.org/W2118031963","https://openalex.org/W2136757500","https://openalex.org/W2139349254","https://openalex.org/W2139882509","https://openalex.org/W2148618053","https://openalex.org/W2149578545","https://openalex.org/W2150872535","https://openalex.org/W2157617940","https://openalex.org/W2162082574","https://openalex.org/W2171825402","https://openalex.org/W2487142227","https://openalex.org/W4233101964","https://openalex.org/W6650159003"],"related_works":["https://openalex.org/W4312516786","https://openalex.org/W1502478103","https://openalex.org/W2109350679","https://openalex.org/W2093992207","https://openalex.org/W4300849150","https://openalex.org/W2146990170","https://openalex.org/W364924225","https://openalex.org/W2085028021","https://openalex.org/W304800142","https://openalex.org/W1592424226"],"abstract_inverted_index":{"This":[0,95,128,145],"paper":[1],"characterizes":[2],"the":[3,24,114,133,150,155,164,182,192],"potentially":[4],"catastrophic":[5],"effect":[6],"of":[7,14,110,152],"crosstalk":[8,25,55,85,103,143,158],"glitches":[9,26,86],"on":[10,185],"representative":[11],"circuit":[12,47],"implementations":[13],"two":[15],"widely":[16],"used":[17],"asynchronous":[18,36,58,82,139,156,161,196],"protocols.":[19],"It":[20],"is":[21,73,96,126,181],"demonstrated":[22],"that":[23,78],"can":[27,32,61,147],"induce":[28],"false":[29],"events,":[30],"which":[31],"undesirably":[33],"propagate":[34],"into":[35],"interface":[37,140],"circuits":[38,83,162],"and":[39],"may":[40],"cause":[41],"system":[42],"failure.":[43],"Conventionally,":[44],"to":[45,53,76,93,99,107,120,136,142,172,189],"a":[46,97,100,122,170],"designer,":[48],"glitch":[49,104],"propagation":[50],"(GP)":[51],"due":[52,106,119,188],"aggressor-to-quiet-line":[54],"(AQX)":[56],"in":[57,160],"handshake":[59],"schemes":[60],"only":[62],"be":[63],"observed":[64],"through":[65],"circuit-level":[66,71],"analysis/simulation.":[67],"In":[68],"this":[69,180],"paper,":[70],"analysis":[72],"first":[74,183],"performed":[75],"prove":[77],"even":[79],"optimized":[80],"conventional":[81],"allow":[84],"produced":[87],"over":[88],"moderate-length":[89],"interconnects":[90],"(1.5":[91],"mm)":[92],"propagate.":[94],"precursor":[98],"more":[101],"problematic":[102],"occurrence":[105],"further":[108],"scaling":[109],"technologies.":[111],"To":[112,177],"warn":[113],"digital":[115],"designers":[116],"from":[117],"GP":[118,159,187],"AQX,":[121],"novel":[123],"modeling":[124,129,186],"technique":[125],"proposed.":[127],"method":[130],"works":[131],"at":[132,163,191],"logic":[134,165,193],"level":[135,166,194],"facilitate":[137],"asserting":[138],"robustness":[141],"glitches.":[144],"model":[146],"accurately":[148],"identify":[149],"possibility":[151],"intrinsic":[153],"(to":[154],"interface)":[157],"and,":[167],"hence,":[168],"provides":[169],"foundation":[171],"formally":[173],"verify":[174],"such":[175],"circuits.":[176,197],"our":[178],"knowledge,":[179],"work":[184],"AQX":[190],"for":[195]},"counts_by_year":[{"year":2023,"cited_by_count":1},{"year":2022,"cited_by_count":1},{"year":2014,"cited_by_count":2},{"year":2012,"cited_by_count":2}],"updated_date":"2026-03-20T23:20:44.827607","created_date":"2025-10-10T00:00:00"}