{"id":"https://openalex.org/W4388739343","doi":"https://doi.org/10.1109/tce.2023.3333417","title":"A Less-Delay and Wide Conversion-Voltage-Range Level Shifter by Using Switched-Capacitor Technique for Power-Efficiency Health Electronics","display_name":"A Less-Delay and Wide Conversion-Voltage-Range Level Shifter by Using Switched-Capacitor Technique for Power-Efficiency Health Electronics","publication_year":2023,"publication_date":"2023-11-16","ids":{"openalex":"https://openalex.org/W4388739343","doi":"https://doi.org/10.1109/tce.2023.3333417"},"language":"en","primary_location":{"id":"doi:10.1109/tce.2023.3333417","is_oa":false,"landing_page_url":"http://dx.doi.org/10.1109/tce.2023.3333417","pdf_url":null,"source":{"id":"https://openalex.org/S126824455","display_name":"IEEE Transactions on Consumer Electronics","issn_l":"0098-3063","issn":["0098-3063","1558-4127"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Consumer Electronics","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5035904638","display_name":"Quanzhen Duan","orcid":"https://orcid.org/0000-0003-0236-3019"},"institutions":[{"id":"https://openalex.org/I157773358","display_name":"Sun Yat-sen University","ror":"https://ror.org/0064kty71","country_code":"CN","type":"education","lineage":["https://openalex.org/I157773358"]},{"id":"https://openalex.org/I180726961","display_name":"Shenzhen University","ror":"https://ror.org/01vy4gh70","country_code":"CN","type":"education","lineage":["https://openalex.org/I180726961"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Quanzhen Duan","raw_affiliation_strings":["School of Integrated Circuits, Sun Yat-sen University (Shenzhen), Shenzhen, P. R. China","School of Integrated Circuits, Shenzhen Campus of Sun Yat-Sen University, Shenzhen, China"],"raw_orcid":"https://orcid.org/0000-0003-0236-3019","affiliations":[{"raw_affiliation_string":"School of Integrated Circuits, Sun Yat-sen University (Shenzhen), Shenzhen, P. R. China","institution_ids":["https://openalex.org/I180726961"]},{"raw_affiliation_string":"School of Integrated Circuits, Shenzhen Campus of Sun Yat-Sen University, Shenzhen, China","institution_ids":["https://openalex.org/I157773358"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5104359065","display_name":"Tao Tao","orcid":"https://orcid.org/0000-0002-5659-4050"},"institutions":[{"id":"https://openalex.org/I136765683","display_name":"Tianjin University of Technology","ror":"https://ror.org/00zbe0w13","country_code":"CN","type":"education","lineage":["https://openalex.org/I136765683"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Tao Tao","raw_affiliation_strings":["School of Integrated Circuit Science Engineering, Tianjin University of Technology, Tianjin, China"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"School of Integrated Circuit Science Engineering, Tianjin University of Technology, Tianjin, China","institution_ids":["https://openalex.org/I136765683"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5044603648","display_name":"Wuxiong Weng","orcid":null},"institutions":[{"id":"https://openalex.org/I157773358","display_name":"Sun Yat-sen University","ror":"https://ror.org/0064kty71","country_code":"CN","type":"education","lineage":["https://openalex.org/I157773358"]},{"id":"https://openalex.org/I180726961","display_name":"Shenzhen University","ror":"https://ror.org/01vy4gh70","country_code":"CN","type":"education","lineage":["https://openalex.org/I180726961"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Wuxiong Weng","raw_affiliation_strings":["School of Integrated Circuits, Sun Yat-sen University (Shenzhen), Shenzhen, P. R. China","School of Integrated Circuits, Shenzhen Campus of Sun Yat-Sen University, Shenzhen, China"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"School of Integrated Circuits, Sun Yat-sen University (Shenzhen), Shenzhen, P. R. China","institution_ids":["https://openalex.org/I180726961"]},{"raw_affiliation_string":"School of Integrated Circuits, Shenzhen Campus of Sun Yat-Sen University, Shenzhen, China","institution_ids":["https://openalex.org/I157773358"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5101986869","display_name":"Shengming Huang","orcid":null},"institutions":[{"id":"https://openalex.org/I136765683","display_name":"Tianjin University of Technology","ror":"https://ror.org/00zbe0w13","country_code":"CN","type":"education","lineage":["https://openalex.org/I136765683"]},{"id":"https://openalex.org/I180726961","display_name":"Shenzhen University","ror":"https://ror.org/01vy4gh70","country_code":"CN","type":"education","lineage":["https://openalex.org/I180726961"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Shengming Huang","raw_affiliation_strings":["School of Integrated Circuits, Sun Yat-sen University (Shenzhen), Shenzhen, P. R. China","School of Integrated Circuit Science Engineering, Tianjin University of Technology, Tianjin, China"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"School of Integrated Circuits, Sun Yat-sen University (Shenzhen), Shenzhen, P. R. China","institution_ids":["https://openalex.org/I180726961"]},{"raw_affiliation_string":"School of Integrated Circuit Science Engineering, Tianjin University of Technology, Tianjin, China","institution_ids":["https://openalex.org/I136765683"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5001685886","display_name":"Yuhua Liang","orcid":"https://orcid.org/0000-0003-1240-2878"},"institutions":[{"id":"https://openalex.org/I149594827","display_name":"Xidian University","ror":"https://ror.org/05s92vm98","country_code":"CN","type":"education","lineage":["https://openalex.org/I149594827"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Yuhua Liang","raw_affiliation_strings":["Key Laboratory of Analog Integrated Circuits and Systems (Ministry of Education) and the School of Microelectronics, Xidian University, Xi’an, China"],"raw_orcid":"https://orcid.org/0000-0003-1240-2878","affiliations":[{"raw_affiliation_string":"Key Laboratory of Analog Integrated Circuits and Systems (Ministry of Education) and the School of Microelectronics, Xidian University, Xi’an, China","institution_ids":["https://openalex.org/I149594827"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5010398207","display_name":"Jeongjin Roh","orcid":"https://orcid.org/0000-0001-6930-8183"},"institutions":[{"id":"https://openalex.org/I4575257","display_name":"Hanyang University","ror":"https://ror.org/046865y68","country_code":"KR","type":"education","lineage":["https://openalex.org/I4575257"]}],"countries":["KR"],"is_corresponding":false,"raw_author_name":"Jeongjin Roh","raw_affiliation_strings":["Department of Electrical Engineering, Hanyang University, Ansan, South Korea"],"raw_orcid":"https://orcid.org/0000-0001-6930-8183","affiliations":[{"raw_affiliation_string":"Department of Electrical Engineering, Hanyang University, Ansan, South Korea","institution_ids":["https://openalex.org/I4575257"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5064229348","display_name":"Xinpeng Xing","orcid":"https://orcid.org/0000-0002-5535-9577"},"institutions":[{"id":"https://openalex.org/I157773358","display_name":"Sun Yat-sen University","ror":"https://ror.org/0064kty71","country_code":"CN","type":"education","lineage":["https://openalex.org/I157773358"]},{"id":"https://openalex.org/I180726961","display_name":"Shenzhen University","ror":"https://ror.org/01vy4gh70","country_code":"CN","type":"education","lineage":["https://openalex.org/I180726961"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Xinpeng Xing","raw_affiliation_strings":["School of Integrated Circuits, Sun Yat-sen University (Shenzhen), Shenzhen, P. R. China","School of Integrated Circuits, Shenzhen Campus of Sun Yat-Sen University, Shenzhen, China"],"raw_orcid":"https://orcid.org/0000-0002-5535-9577","affiliations":[{"raw_affiliation_string":"School of Integrated Circuits, Sun Yat-sen University (Shenzhen), Shenzhen, P. R. China","institution_ids":["https://openalex.org/I180726961"]},{"raw_affiliation_string":"School of Integrated Circuits, Shenzhen Campus of Sun Yat-Sen University, Shenzhen, China","institution_ids":["https://openalex.org/I157773358"]}]}],"institutions":[],"countries_distinct_count":2,"institutions_distinct_count":7,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":0.1025,"has_fulltext":false,"cited_by_count":1,"citation_normalized_percentile":{"value":0.41730149,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":95,"max":98},"biblio":{"volume":"70","issue":"1","first_page":"2382","last_page":"2390"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11417","display_name":"Advancements in PLL and VCO Technologies","score":0.9987999796867371,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/capacitor","display_name":"Capacitor","score":0.6436587572097778},{"id":"https://openalex.org/keywords/clock-generator","display_name":"Clock generator","score":0.5896775722503662},{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.5716190338134766},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.5711283087730408},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.5664324164390564},{"id":"https://openalex.org/keywords/switched-capacitor","display_name":"Switched capacitor","score":0.5252204537391663},{"id":"https://openalex.org/keywords/transistor","display_name":"Transistor","score":0.4816216826438904},{"id":"https://openalex.org/keywords/clock-signal","display_name":"Clock signal","score":0.4440731406211853},{"id":"https://openalex.org/keywords/signal","display_name":"SIGNAL (programming language)","score":0.413896769285202},{"id":"https://openalex.org/keywords/propagation-delay","display_name":"Propagation delay","score":0.41261938214302063},{"id":"https://openalex.org/keywords/pulse-generator","display_name":"Pulse generator","score":0.41081929206848145},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.3796146512031555},{"id":"https://openalex.org/keywords/materials-science","display_name":"Materials science","score":0.35300272703170776},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.3139139711856842},{"id":"https://openalex.org/keywords/electronic-circuit","display_name":"Electronic circuit","score":0.30165910720825195},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.22579634189605713}],"concepts":[{"id":"https://openalex.org/C52192207","wikidata":"https://www.wikidata.org/wiki/Q5322","display_name":"Capacitor","level":3,"score":0.6436587572097778},{"id":"https://openalex.org/C2778023540","wikidata":"https://www.wikidata.org/wiki/Q2164847","display_name":"Clock generator","level":4,"score":0.5896775722503662},{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.5716190338134766},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.5711283087730408},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.5664324164390564},{"id":"https://openalex.org/C103357873","wikidata":"https://www.wikidata.org/wiki/Q572656","display_name":"Switched capacitor","level":4,"score":0.5252204537391663},{"id":"https://openalex.org/C172385210","wikidata":"https://www.wikidata.org/wiki/Q5339","display_name":"Transistor","level":3,"score":0.4816216826438904},{"id":"https://openalex.org/C137059387","wikidata":"https://www.wikidata.org/wiki/Q426882","display_name":"Clock signal","level":3,"score":0.4440731406211853},{"id":"https://openalex.org/C2779843651","wikidata":"https://www.wikidata.org/wiki/Q7390335","display_name":"SIGNAL (programming language)","level":2,"score":0.413896769285202},{"id":"https://openalex.org/C90806461","wikidata":"https://www.wikidata.org/wiki/Q1144416","display_name":"Propagation delay","level":2,"score":0.41261938214302063},{"id":"https://openalex.org/C51319974","wikidata":"https://www.wikidata.org/wiki/Q3509564","display_name":"Pulse generator","level":3,"score":0.41081929206848145},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.3796146512031555},{"id":"https://openalex.org/C192562407","wikidata":"https://www.wikidata.org/wiki/Q228736","display_name":"Materials science","level":0,"score":0.35300272703170776},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.3139139711856842},{"id":"https://openalex.org/C134146338","wikidata":"https://www.wikidata.org/wiki/Q1815901","display_name":"Electronic circuit","level":2,"score":0.30165910720825195},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.22579634189605713},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/tce.2023.3333417","is_oa":false,"landing_page_url":"http://dx.doi.org/10.1109/tce.2023.3333417","pdf_url":null,"source":{"id":"https://openalex.org/S126824455","display_name":"IEEE Transactions on Consumer Electronics","issn_l":"0098-3063","issn":["0098-3063","1558-4127"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Consumer Electronics","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[{"score":0.7900000214576721,"id":"https://metadata.un.org/sdg/7","display_name":"Affordable and clean energy"}],"awards":[{"id":"https://openalex.org/G5015170670","display_name":null,"funder_award_id":"61904124","funder_id":"https://openalex.org/F4320321001","funder_display_name":"National Natural Science Foundation of China"}],"funders":[{"id":"https://openalex.org/F4320321001","display_name":"National Natural Science Foundation of China","ror":"https://ror.org/01h0zpd94"}],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":13,"referenced_works":["https://openalex.org/W1965484872","https://openalex.org/W2152583886","https://openalex.org/W2443919716","https://openalex.org/W2512974020","https://openalex.org/W2522145311","https://openalex.org/W2755618956","https://openalex.org/W2892708117","https://openalex.org/W2896806491","https://openalex.org/W3011715584","https://openalex.org/W3080975391","https://openalex.org/W3133104577","https://openalex.org/W3162943204","https://openalex.org/W4316661096"],"related_works":["https://openalex.org/W2085381517","https://openalex.org/W2132410050","https://openalex.org/W4284685595","https://openalex.org/W3013924136","https://openalex.org/W2121552467","https://openalex.org/W999775051","https://openalex.org/W4238211836","https://openalex.org/W2125901692","https://openalex.org/W1964469260","https://openalex.org/W2119142269"],"abstract_inverted_index":{"This":[0],"study":[1],"proposes":[2],"a":[3,23,37,41,114,134,147,153,157,166,174],"novel":[4],"less-delay":[5],"and":[6,40,58,63,87,112,140,165],"wide":[7],"conversion-voltage-range":[8],"(CVR)":[9],"level":[10],"shifter":[11],"(LS)":[12],"for":[13,173],"high":[14],"power-efficiency":[15],"healthy":[16],"electronics.":[17],"The":[18,100,127],"proposed":[19,128],"LS":[20,42,120,129],"consisting":[21],"of":[22,84,170],"control":[24,90],"signal":[25,118],"generator":[26],"with":[27,103,119,156],"the":[28,46,78,81,104,108],"switched-capacitor":[29],"technique":[30],"(CSG-SC),":[31],"an":[32],"internal":[33],"converting":[34],"stage":[35],"(ICS),":[36],"latch-up":[38,105],"circuit,":[39],"core":[43,121],"based":[44,122],"on":[45,94,123],"differential":[47],"cascade":[48],"voltage":[49],"switch":[50],"(DCVS)":[51],"was":[52],"implemented":[53,132],"by":[54,66,70],"both":[55],"high-threshold-voltage":[56],"(HTV)":[57],"low-threshold-voltage":[59],"(LTV)":[60],"transistors.":[61],"Switches":[62],"capacitors":[64,86],"controlled":[65],"input-clock":[67],"signals":[68,91],"generating":[69],"CSG-SC":[71],"are":[72],"used":[73],"to":[74,92,152],"respectively":[75],"shift":[76],"up":[77],"voltages":[79],"(at":[80],"top":[82],"plate)":[83],"two":[85],"obtain":[88],"higher-voltage":[89],"turn":[93],"HTV":[95],"transistor":[96],"switches":[97],"in":[98,133],"ICS.":[99],"ICS":[101],"working":[102],"circuit":[106],"obtained":[107],"level-shifted":[109],"output":[110,116],"signals,":[111],"finally":[113],"fast":[115],"clock":[117],"DCVS":[124],"is":[125],"generated.":[126],"has":[130],"been":[131],"standard":[135],"180":[136],"nm":[137],"CMOS":[138],"process,":[139],"simulation":[141],"results":[142],"show":[143],"that":[144],"it":[145],"achieves":[146],"large":[148],"CVR":[149],"from":[150],"0.6":[151],"3":[154],"V,":[155],"propagation":[158],"delay":[159],"as":[160,162],"low":[161],"2.5":[163],"ns,":[164],"total":[167],"average":[168],"power":[169],"704":[171],"nw":[172],"1":[175],"MHz":[176],"input":[177],"pulse.":[178]},"counts_by_year":[{"year":2026,"cited_by_count":1}],"updated_date":"2026-06-11T09:08:48.828518","created_date":"2025-10-10T00:00:00"}