{"id":"https://openalex.org/W4404239161","doi":"https://doi.org/10.1109/tcasai.2024.3495587","title":"Algorithm Hardware Co-Design for ADC-Less Compute In-Memory Accelerator","display_name":"Algorithm Hardware Co-Design for ADC-Less Compute In-Memory Accelerator","publication_year":2024,"publication_date":"2024-11-11","ids":{"openalex":"https://openalex.org/W4404239161","doi":"https://doi.org/10.1109/tcasai.2024.3495587"},"language":"en","primary_location":{"id":"doi:10.1109/tcasai.2024.3495587","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tcasai.2024.3495587","pdf_url":null,"source":{"id":"https://openalex.org/S4404675360","display_name":"IEEE transactions on circuits and systems for artificial intelligence.","issn_l":"2996-6647","issn":["2996-6647"],"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":null,"host_organization_name":null,"host_organization_lineage":[],"host_organization_lineage_names":[],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Circuits and Systems for Artificial Intelligence","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5114949255","display_name":"Shubham Negi","orcid":"https://orcid.org/0000-0001-7413-9636"},"institutions":[{"id":"https://openalex.org/I219193219","display_name":"Purdue University West Lafayette","ror":"https://ror.org/02dqehb95","country_code":"US","type":"education","lineage":["https://openalex.org/I219193219"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Shubham Negi","raw_affiliation_strings":["Elmore Family School of Electrical and Computer Engineering, Purdue University, West Lafayette, IN, USA"],"raw_orcid":"https://orcid.org/0000-0001-7413-9636","affiliations":[{"raw_affiliation_string":"Elmore Family School of Electrical and Computer Engineering, Purdue University, West Lafayette, IN, USA","institution_ids":["https://openalex.org/I219193219"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5114858941","display_name":"Utkarsh Saxena","orcid":"https://orcid.org/0009-0007-0042-2413"},"institutions":[{"id":"https://openalex.org/I219193219","display_name":"Purdue University West Lafayette","ror":"https://ror.org/02dqehb95","country_code":"US","type":"education","lineage":["https://openalex.org/I219193219"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Utkarsh Saxena","raw_affiliation_strings":["Elmore Family School of Electrical and Computer Engineering, Purdue University, West Lafayette, IN, USA"],"raw_orcid":"https://orcid.org/0009-0007-0042-2413","affiliations":[{"raw_affiliation_string":"Elmore Family School of Electrical and Computer Engineering, Purdue University, West Lafayette, IN, USA","institution_ids":["https://openalex.org/I219193219"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5100664110","display_name":"Deepika Sharma","orcid":"https://orcid.org/0000-0002-8244-7919"},"institutions":[{"id":"https://openalex.org/I219193219","display_name":"Purdue University West Lafayette","ror":"https://ror.org/02dqehb95","country_code":"US","type":"education","lineage":["https://openalex.org/I219193219"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Deepika Sharma","raw_affiliation_strings":["Elmore Family School of Electrical and Computer Engineering, Purdue University, West Lafayette, IN, USA"],"raw_orcid":"https://orcid.org/0000-0002-8244-7919","affiliations":[{"raw_affiliation_string":"Elmore Family School of Electrical and Computer Engineering, Purdue University, West Lafayette, IN, USA","institution_ids":["https://openalex.org/I219193219"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5102694093","display_name":"Jeffry Victor","orcid":"https://orcid.org/0000-0002-9487-8177"},"institutions":[{"id":"https://openalex.org/I219193219","display_name":"Purdue University West Lafayette","ror":"https://ror.org/02dqehb95","country_code":"US","type":"education","lineage":["https://openalex.org/I219193219"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Jeffry Victor","raw_affiliation_strings":["Elmore Family School of Electrical and Computer Engineering, Purdue University, West Lafayette, IN, USA"],"raw_orcid":"https://orcid.org/0000-0002-9487-8177","affiliations":[{"raw_affiliation_string":"Elmore Family School of Electrical and Computer Engineering, Purdue University, West Lafayette, IN, USA","institution_ids":["https://openalex.org/I219193219"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5080209061","display_name":"Imtiaz Ahmed","orcid":"https://orcid.org/0009-0001-4486-6653"},"institutions":[{"id":"https://openalex.org/I219193219","display_name":"Purdue University West Lafayette","ror":"https://ror.org/02dqehb95","country_code":"US","type":"education","lineage":["https://openalex.org/I219193219"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Imtiaz Ahmed","raw_affiliation_strings":["Elmore Family School of Electrical and Computer Engineering, Purdue University, West Lafayette, IN, USA"],"raw_orcid":"https://orcid.org/0009-0001-4486-6653","affiliations":[{"raw_affiliation_string":"Elmore Family School of Electrical and Computer Engineering, Purdue University, West Lafayette, IN, USA","institution_ids":["https://openalex.org/I219193219"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5044276472","display_name":"Sumeet Kumar Gupta","orcid":"https://orcid.org/0000-0001-5609-9722"},"institutions":[{"id":"https://openalex.org/I219193219","display_name":"Purdue University West Lafayette","ror":"https://ror.org/02dqehb95","country_code":"US","type":"education","lineage":["https://openalex.org/I219193219"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Sumeet Kumar Gupta","raw_affiliation_strings":["Elmore Family School of Electrical and Computer Engineering, Purdue University, West Lafayette, IN, USA"],"raw_orcid":"https://orcid.org/0000-0001-5609-9722","affiliations":[{"raw_affiliation_string":"Elmore Family School of Electrical and Computer Engineering, Purdue University, West Lafayette, IN, USA","institution_ids":["https://openalex.org/I219193219"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5031161187","display_name":"Kaushik Roy","orcid":"https://orcid.org/0000-0002-0735-9695"},"institutions":[{"id":"https://openalex.org/I219193219","display_name":"Purdue University West Lafayette","ror":"https://ror.org/02dqehb95","country_code":"US","type":"education","lineage":["https://openalex.org/I219193219"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Kaushik Roy","raw_affiliation_strings":["Elmore Family School of Electrical and Computer Engineering, Purdue University, West Lafayette, IN, USA"],"raw_orcid":"https://orcid.org/0000-0002-0735-9695","affiliations":[{"raw_affiliation_string":"Elmore Family School of Electrical and Computer Engineering, Purdue University, West Lafayette, IN, USA","institution_ids":["https://openalex.org/I219193219"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":7,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":1.1137,"has_fulltext":false,"cited_by_count":6,"citation_normalized_percentile":{"value":0.78406177,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":96,"max":99},"biblio":{"volume":"1","issue":"2","first_page":"191","last_page":"203"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11992","display_name":"CCD and CMOS Imaging Sensors","score":0.9872999787330627,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11992","display_name":"CCD and CMOS Imaging Sensors","score":0.9872999787330627,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.968500018119812,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10320","display_name":"Neural Networks and Applications","score":0.9528999924659729,"subfield":{"id":"https://openalex.org/subfields/1702","display_name":"Artificial Intelligence"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/hardware-acceleration","display_name":"Hardware acceleration","score":0.6034471988677979},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.5959241390228271},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.5199357867240906},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.39290153980255127},{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.34371745586395264},{"id":"https://openalex.org/keywords/arithmetic","display_name":"Arithmetic","score":0.32727575302124023},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.3231987953186035},{"id":"https://openalex.org/keywords/mathematics","display_name":"Mathematics","score":0.20915719866752625}],"concepts":[{"id":"https://openalex.org/C13164978","wikidata":"https://www.wikidata.org/wiki/Q600158","display_name":"Hardware acceleration","level":3,"score":0.6034471988677979},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.5959241390228271},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.5199357867240906},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.39290153980255127},{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.34371745586395264},{"id":"https://openalex.org/C94375191","wikidata":"https://www.wikidata.org/wiki/Q11205","display_name":"Arithmetic","level":1,"score":0.32727575302124023},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.3231987953186035},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.20915719866752625}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/tcasai.2024.3495587","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tcasai.2024.3495587","pdf_url":null,"source":{"id":"https://openalex.org/S4404675360","display_name":"IEEE transactions on circuits and systems for artificial intelligence.","issn_l":"2996-6647","issn":["2996-6647"],"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":null,"host_organization_name":null,"host_organization_lineage":[],"host_organization_lineage_names":[],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Circuits and Systems for Artificial Intelligence","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[{"score":0.6100000143051147,"display_name":"Affordable and clean energy","id":"https://metadata.un.org/sdg/7"}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":48,"referenced_works":["https://openalex.org/W2045322931","https://openalex.org/W2092608522","https://openalex.org/W2137440475","https://openalex.org/W2167067352","https://openalex.org/W2518281301","https://openalex.org/W2899682588","https://openalex.org/W2913104037","https://openalex.org/W2916954108","https://openalex.org/W3000301330","https://openalex.org/W3045216746","https://openalex.org/W3089015596","https://openalex.org/W3090816752","https://openalex.org/W3091835145","https://openalex.org/W3092137903","https://openalex.org/W3092601938","https://openalex.org/W3133754064","https://openalex.org/W3134304371","https://openalex.org/W3161867321","https://openalex.org/W3176381399","https://openalex.org/W3185449816","https://openalex.org/W3194056411","https://openalex.org/W3207359372","https://openalex.org/W4200001938","https://openalex.org/W4280578694","https://openalex.org/W4284974526","https://openalex.org/W4292169167","https://openalex.org/W4300228436","https://openalex.org/W4313478540","https://openalex.org/W4318685314","https://openalex.org/W4366389026","https://openalex.org/W4376134047","https://openalex.org/W4386802940","https://openalex.org/W4386859314","https://openalex.org/W4387070976","https://openalex.org/W4387490588","https://openalex.org/W4390421974","https://openalex.org/W4392746193","https://openalex.org/W4393063681","https://openalex.org/W4399251789","https://openalex.org/W4399487419","https://openalex.org/W6680160309","https://openalex.org/W6733335540","https://openalex.org/W6756551553","https://openalex.org/W6760069825","https://openalex.org/W6790356579","https://openalex.org/W6839700459","https://openalex.org/W6857347690","https://openalex.org/W6862833652"],"related_works":["https://openalex.org/W2111241003","https://openalex.org/W2355315220","https://openalex.org/W4200391368","https://openalex.org/W2210979487","https://openalex.org/W2316202402","https://openalex.org/W2074043759","https://openalex.org/W2082487009","https://openalex.org/W2518118925","https://openalex.org/W3159273459","https://openalex.org/W3152699334"],"abstract_inverted_index":{"The":[0],"increasing":[1],"pervasiveness":[2],"of":[3,50,140,204],"artificial":[4],"intelligence":[5],"(AI),":[6],"particularly":[7],"deep":[8,91],"learning":[9],"demands":[10],"high-performing":[11],"yet":[12],"efficient":[13],"hardware":[14,101,122],"resources":[15],"at":[16,29],"the":[17,30,48,59,129,138,162,202],"edge.":[18],"Analog":[19],"compute-in-memory":[20],"(CiM)":[21],"architectures":[22],"have":[23],"tremendous":[24],"potential":[25],"to":[26,45,56,80,98,166,173,189,209],"accelerate":[27],"AI":[28],"edge":[31],"by":[32,66],"reducing":[33],"data":[34],"movement":[35],"between":[36],"memory":[37],"and":[38,41,62,110,160,181,194],"compute":[39],"units":[40],"exploiting":[42],"parallelism.":[43],"However,":[44],"fully":[46],"reap":[47],"benefits":[49],"analog":[51,85,99,143,175,205],"CiM,":[52],"it":[53],"is":[54],"imperative":[55],"deal":[57],"with":[58],"area,":[60],"latency,":[61],"power":[63],"overheads":[64],"introduced":[65],"high-precision":[67],"analog-to-digital":[68],"converters":[69],"(ADCs).":[70],"In":[71],"this":[72],"work,":[73],"we":[74,114,136,153],"propose":[75],"a":[76,90,212],"hardware-algorithm":[77],"co-design":[78],"approach":[79],"reduce":[81,161],"ADC":[82,164],"overhead":[83],"in":[84,142,201,215],"CiM":[86,100,121,144,176],"architectures.":[87],"We":[88],"designed":[89],"neural":[92],"network":[93],"(DNN)":[94],"quantization":[95,159],"framework":[96],"tailored":[97],"architectures,":[102],"integrating":[103],"essential":[104],"features":[105],"such":[106],"as":[107],"tiling,":[108],"bit-slicing,":[109],"layer":[111],"mapping.":[112],"Moreover,":[113],"also":[115],"developed":[116],"an":[117,174],"ADC-Less":[118],"hybrid":[119],"analog-digital":[120],"architecture":[123,178],"HCiM":[124,184,210],"that":[125],"can":[126,154],"efficiently":[127],"process":[128],"DNNs":[130],"trained":[131],"using":[132,179],"our":[133,149],"framework.":[134],"Additionally,":[135],"studied":[137],"effects":[139],"non-idealities":[141],"on":[145],"DNN":[146,207],"accuracy.":[147,216],"Using":[148],"hardware-aware":[150],"training":[151],"methodology,":[152],"perform":[155],"extremely":[156],"low":[157],"precision":[158,165],"required":[163],"binary":[167],"(1-bit)":[168],"or":[169],"ternary":[170],"(1.5-bit).":[171],"Compared":[172],"baseline":[177],"7":[180],"4-bit":[182],"ADC,":[183],"achieves":[185],"energy":[186],"reductions":[187],"up":[188],"28<inline-formula":[190],"xmlns:mml=\"http://www.w3.org/1998/Math/MathML\"":[191,196],"xmlns:xlink=\"http://www.w3.org/1999/xlink\"><tex-math":[192,197],"notation=\"LaTeX\">$\\boldsymbol{\\times}$</tex-math></inline-formula>":[193],"12<inline-formula":[195],"notation=\"LaTeX\">$\\boldsymbol{\\times}$</tex-math></inline-formula>,":[198],"respectively.":[199],"Furthermore,":[200],"presence":[203],"non-idealities,":[206],"mapped":[208],"exhibits":[211],"minimal":[213],"drop":[214]},"counts_by_year":[{"year":2026,"cited_by_count":3},{"year":2025,"cited_by_count":3}],"updated_date":"2026-06-11T09:08:48.828518","created_date":"2025-10-10T00:00:00"}
