{"id":"https://openalex.org/W4412164056","doi":"https://doi.org/10.1109/tcad.2025.3587534","title":"An Open-Source High-Concurrency and High-Performance Parallel Router for UltraScale FPGAs","display_name":"An Open-Source High-Concurrency and High-Performance Parallel Router for UltraScale FPGAs","publication_year":2025,"publication_date":"2025-07-09","ids":{"openalex":"https://openalex.org/W4412164056","doi":"https://doi.org/10.1109/tcad.2025.3587534"},"language":"en","primary_location":{"id":"doi:10.1109/tcad.2025.3587534","is_oa":true,"landing_page_url":"https://doi.org/10.1109/tcad.2025.3587534","pdf_url":null,"source":{"id":"https://openalex.org/S100835903","display_name":"IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems","issn_l":"0278-0070","issn":["0278-0070","1937-4151"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":"cc-by","license_id":"https://openalex.org/licenses/cc-by","version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":true,"oa_status":"hybrid","oa_url":"https://doi.org/10.1109/tcad.2025.3587534","any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5020755860","display_name":"Wenhao Lin","orcid":"https://orcid.org/0009-0007-3189-7868"},"institutions":[{"id":"https://openalex.org/I4210116924","display_name":"Chinese University of Hong Kong, Shenzhen","ror":"https://ror.org/02d5ks197","country_code":"CN","type":"education","lineage":["https://openalex.org/I177725633","https://openalex.org/I180726961","https://openalex.org/I4210116924"]}],"countries":["CN"],"is_corresponding":true,"raw_author_name":"Wenhao Lin","raw_affiliation_strings":["Department of Computer Science and Engineering, The Chinese University of Hong Kong, Shenzhen, Hong Kong"],"affiliations":[{"raw_affiliation_string":"Department of Computer Science and Engineering, The Chinese University of Hong Kong, Shenzhen, Hong Kong","institution_ids":["https://openalex.org/I4210116924"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5037988878","display_name":"Xinshi Zang","orcid":"https://orcid.org/0009-0002-7889-4481"},"institutions":[{"id":"https://openalex.org/I4210116924","display_name":"Chinese University of Hong Kong, Shenzhen","ror":"https://ror.org/02d5ks197","country_code":"CN","type":"education","lineage":["https://openalex.org/I177725633","https://openalex.org/I180726961","https://openalex.org/I4210116924"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Xinshi Zang","raw_affiliation_strings":["Department of Computer Science and Engineering, The Chinese University of Hong Kong, Shenzhen, Hong Kong"],"affiliations":[{"raw_affiliation_string":"Department of Computer Science and Engineering, The Chinese University of Hong Kong, Shenzhen, Hong Kong","institution_ids":["https://openalex.org/I4210116924"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5060676969","display_name":"Z. Li","orcid":null},"institutions":[{"id":"https://openalex.org/I4210116924","display_name":"Chinese University of Hong Kong, Shenzhen","ror":"https://ror.org/02d5ks197","country_code":"CN","type":"education","lineage":["https://openalex.org/I177725633","https://openalex.org/I180726961","https://openalex.org/I4210116924"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Zewen Li","raw_affiliation_strings":["Department of Computer Science and Engineering, The Chinese University of Hong Kong, Shenzhen, Hong Kong"],"affiliations":[{"raw_affiliation_string":"Department of Computer Science and Engineering, The Chinese University of Hong Kong, Shenzhen, Hong Kong","institution_ids":["https://openalex.org/I4210116924"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5070795253","display_name":"Evangeline F. Y. Young","orcid":"https://orcid.org/0000-0003-0623-1590"},"institutions":[{"id":"https://openalex.org/I4210116924","display_name":"Chinese University of Hong Kong, Shenzhen","ror":"https://ror.org/02d5ks197","country_code":"CN","type":"education","lineage":["https://openalex.org/I177725633","https://openalex.org/I180726961","https://openalex.org/I4210116924"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Evangeline F. Y. Young","raw_affiliation_strings":["Department of Computer Science and Engineering, The Chinese University of Hong Kong, Shenzhen, Hong Kong"],"affiliations":[{"raw_affiliation_string":"Department of Computer Science and Engineering, The Chinese University of Hong Kong, Shenzhen, Hong Kong","institution_ids":["https://openalex.org/I4210116924"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":4,"corresponding_author_ids":["https://openalex.org/A5020755860"],"corresponding_institution_ids":["https://openalex.org/I4210116924"],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":0,"citation_normalized_percentile":{"value":0.18073441,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":"45","issue":"2","first_page":"659","last_page":"672"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":0.9994999766349792,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":0.9994999766349792,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9986000061035156,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9979000091552734,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.7152729034423828},{"id":"https://openalex.org/keywords/router","display_name":"Router","score":0.6677224040031433},{"id":"https://openalex.org/keywords/concurrency","display_name":"Concurrency","score":0.6331437826156616},{"id":"https://openalex.org/keywords/open-source","display_name":"Open source","score":0.47313275933265686},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.4731230139732361},{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.46123170852661133},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.347426176071167},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.324639230966568},{"id":"https://openalex.org/keywords/distributed-computing","display_name":"Distributed computing","score":0.24663540720939636},{"id":"https://openalex.org/keywords/computer-network","display_name":"Computer network","score":0.1994151473045349},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.16597270965576172},{"id":"https://openalex.org/keywords/software","display_name":"Software","score":0.06403368711471558}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7152729034423828},{"id":"https://openalex.org/C2775896111","wikidata":"https://www.wikidata.org/wiki/Q642560","display_name":"Router","level":2,"score":0.6677224040031433},{"id":"https://openalex.org/C193702766","wikidata":"https://www.wikidata.org/wiki/Q1414548","display_name":"Concurrency","level":2,"score":0.6331437826156616},{"id":"https://openalex.org/C3018397939","wikidata":"https://www.wikidata.org/wiki/Q3644502","display_name":"Open source","level":3,"score":0.47313275933265686},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.4731230139732361},{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.46123170852661133},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.347426176071167},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.324639230966568},{"id":"https://openalex.org/C120314980","wikidata":"https://www.wikidata.org/wiki/Q180634","display_name":"Distributed computing","level":1,"score":0.24663540720939636},{"id":"https://openalex.org/C31258907","wikidata":"https://www.wikidata.org/wiki/Q1301371","display_name":"Computer network","level":1,"score":0.1994151473045349},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.16597270965576172},{"id":"https://openalex.org/C2777904410","wikidata":"https://www.wikidata.org/wiki/Q7397","display_name":"Software","level":2,"score":0.06403368711471558}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/tcad.2025.3587534","is_oa":true,"landing_page_url":"https://doi.org/10.1109/tcad.2025.3587534","pdf_url":null,"source":{"id":"https://openalex.org/S100835903","display_name":"IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems","issn_l":"0278-0070","issn":["0278-0070","1937-4151"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":"cc-by","license_id":"https://openalex.org/licenses/cc-by","version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems","raw_type":"journal-article"}],"best_oa_location":{"id":"doi:10.1109/tcad.2025.3587534","is_oa":true,"landing_page_url":"https://doi.org/10.1109/tcad.2025.3587534","pdf_url":null,"source":{"id":"https://openalex.org/S100835903","display_name":"IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems","issn_l":"0278-0070","issn":["0278-0070","1937-4151"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":"cc-by","license_id":"https://openalex.org/licenses/cc-by","version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems","raw_type":"journal-article"},"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":22,"referenced_works":["https://openalex.org/W2065255302","https://openalex.org/W2181150664","https://openalex.org/W2525280901","https://openalex.org/W2583892184","https://openalex.org/W2760841755","https://openalex.org/W2792745633","https://openalex.org/W2891839221","https://openalex.org/W2915693550","https://openalex.org/W2950858046","https://openalex.org/W2962766617","https://openalex.org/W3003216923","https://openalex.org/W3013952364","https://openalex.org/W3033033241","https://openalex.org/W3080438181","https://openalex.org/W3207680987","https://openalex.org/W3215473801","https://openalex.org/W4211082391","https://openalex.org/W4285232152","https://openalex.org/W4286655084","https://openalex.org/W4399487167","https://openalex.org/W4403278520","https://openalex.org/W4413278532"],"related_works":["https://openalex.org/W2122026593","https://openalex.org/W2582203024","https://openalex.org/W1588358165","https://openalex.org/W4237683758","https://openalex.org/W2370711413","https://openalex.org/W2052038519","https://openalex.org/W2375932043","https://openalex.org/W1967938402","https://openalex.org/W2386041993","https://openalex.org/W1608572506"],"abstract_inverted_index":{"With":[0],"the":[1,53,58,69,73,96,115,119,164,204,213,227,232,239,249],"growth":[2],"of":[3,76],"circuit":[4,81],"size":[5],"and":[6,14,118,150,220],"FPGA":[7,22],"complexity,":[8],"routing":[9,33,43,98,166,185,206],"becomes":[10],"an":[11,174],"increasingly":[12],"complicated":[13],"timeconsuming":[15],"task":[16],"for":[17,34,86,99],"modern":[18,80],"FPGAs.":[19],"To":[20],"accelerate":[21,160],"routing,":[23],"many":[24],"parallel":[25,97,109,252],"algorithms":[26],"have":[27,39],"been":[28],"proposed":[29,158,210],"to":[30,72,84,94,130,159,180,196,231],"perform":[31],"concurrent":[32],"multiple":[35],"independent":[36],"nets":[37,78,132],"that":[38],"no":[40],"overlaps":[41,139,198],"in":[42,61,79,163,178,216],"resources.":[44],"The":[45],"requirement":[46],"on":[47,170,243],"net":[48,127,141,144,191,201],"independence":[49],"can":[50,256],"help":[51],"reduce":[52],"synchronization":[54,176],"overhead":[55],"by":[56],"circumventing":[57],"data":[59],"race":[60],"different":[62,200],"threads,":[63],"but":[64,236],"it":[65,89],"will":[66],"significantly":[67],"limit":[68],"parallelism":[70],"due":[71],"large":[74],"number":[75],"overlapping":[77,100,186],"designs.":[82],"Therefore,":[83],"strive":[85],"large-scale":[87],"parallelism,":[88],"is":[90,157,194],"a":[91,108,124],"promising":[92],"direction":[93],"explore":[95],"nets.":[101,187],"In":[102,203],"this":[103],"work,":[104],"we":[105,172],"first":[106],"propose":[107],"overlap-tolerant":[110],"router,":[111],"called":[112],"Potter,":[113],"including":[114],"runtimefirst":[116],"Potter-R":[117,122,223],"stability-first":[120],"Potter-S.":[121],"employs":[123],"partitioning-based":[125],"recursive":[126],"scheduling":[128,192],"algorithm":[129],"divide":[131],"into":[133],"balanced":[134],"groups":[135,145],"while":[136],"minimizing":[137],"resource":[138],"among":[140,199],"groups.":[142,202],"These":[143],"are":[146],"then":[147],"routed":[148],"independently":[149],"concurrently.":[151],"A":[152],"novel":[153],"factor":[154],"updating":[155],"mechanism":[156],"solving":[161],"congestion":[162],"negotiation-based":[165],"algorithm.":[167],"Furthermore,":[168,246],"based":[169],"Potter-R,":[171],"devise":[173],"efficient":[175],"strategy":[177],"Potter-S":[179,255],"maintain":[181],"determinism":[182],"when":[183],"concurrently":[184],"An":[188],"enhanced":[189],"clustering-based":[190],"method":[193,211],"developed":[195],"minimize":[197],"FPGA24":[205],"contest":[207],"benchmarks,":[208],"our":[209],"outperforms":[212],"state-of-the-art":[214],"methods":[215],"both":[217],"running":[218],"time":[219],"wire":[221,244],"length.":[222,245],"not":[224],"only":[225],"achieves":[226],"largest":[228],"12.34\u00d7":[229],"speedup":[230],"sequential":[233],"router":[234,253],"RWRoute":[235],"also":[237],"has":[238],"best":[240],"4%":[241],"improvements":[242],"compared":[247],"with":[248],"fastest":[250],"deterministic":[251],"CUFR,":[254]},"counts_by_year":[],"updated_date":"2026-03-27T05:58:40.876381","created_date":"2025-10-10T00:00:00"}
