{"id":"https://openalex.org/W4398199971","doi":"https://doi.org/10.1109/tcad.2024.3402988","title":"Constructive Place-and-Route for FinFET-Based Transistor Arrays in Analog Circuits Under Nonlinear Gradients","display_name":"Constructive Place-and-Route for FinFET-Based Transistor Arrays in Analog Circuits Under Nonlinear Gradients","publication_year":2024,"publication_date":"2024-05-22","ids":{"openalex":"https://openalex.org/W4398199971","doi":"https://doi.org/10.1109/tcad.2024.3402988"},"language":"en","primary_location":{"id":"doi:10.1109/tcad.2024.3402988","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tcad.2024.3402988","pdf_url":null,"source":{"id":"https://openalex.org/S100835903","display_name":"IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems","issn_l":"0278-0070","issn":["0278-0070","1937-4151"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5100732194","display_name":"Arvind Sharma","orcid":"https://orcid.org/0000-0002-9250-9642"},"institutions":[{"id":"https://openalex.org/I130238516","display_name":"University of Minnesota","ror":"https://ror.org/017zqws13","country_code":"US","type":"education","lineage":["https://openalex.org/I130238516"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Arvind K. Sharma","raw_affiliation_strings":["Department of Electrical and Computer Engineering, University of Minnesota, Minneapolis, MN, USA"],"raw_orcid":"https://orcid.org/0000-0002-9250-9642","affiliations":[{"raw_affiliation_string":"Department of Electrical and Computer Engineering, University of Minnesota, Minneapolis, MN, USA","institution_ids":["https://openalex.org/I130238516"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5063857392","display_name":"Meghna Madhusudan","orcid":"https://orcid.org/0000-0001-5101-2421"},"institutions":[{"id":"https://openalex.org/I130238516","display_name":"University of Minnesota","ror":"https://ror.org/017zqws13","country_code":"US","type":"education","lineage":["https://openalex.org/I130238516"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Meghna Madhusudan","raw_affiliation_strings":["Department of Electrical and Computer Engineering, University of Minnesota, Minneapolis, MN, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Electrical and Computer Engineering, University of Minnesota, Minneapolis, MN, USA","institution_ids":["https://openalex.org/I130238516"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5053468539","display_name":"Steven M. Burns","orcid":"https://orcid.org/0000-0003-0248-5403"},"institutions":[{"id":"https://openalex.org/I1343180700","display_name":"Intel (United States)","ror":"https://ror.org/01ek73717","country_code":"US","type":"company","lineage":["https://openalex.org/I1343180700"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Steven M. Burns","raw_affiliation_strings":["Circuit Research Lab, Intel Labs, Hillsboro, OR, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Circuit Research Lab, Intel Labs, Hillsboro, OR, USA","institution_ids":["https://openalex.org/I1343180700"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5055160439","display_name":"Soner Yaldiz","orcid":"https://orcid.org/0000-0002-0715-0859"},"institutions":[{"id":"https://openalex.org/I1343180700","display_name":"Intel (United States)","ror":"https://ror.org/01ek73717","country_code":"US","type":"company","lineage":["https://openalex.org/I1343180700"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Soner Yaldiz","raw_affiliation_strings":["Circuit Research Lab, Intel Labs, Hillsboro, OR, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Circuit Research Lab, Intel Labs, Hillsboro, OR, USA","institution_ids":["https://openalex.org/I1343180700"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5028130545","display_name":"Parijat Mukherjee","orcid":"https://orcid.org/0000-0002-2532-7347"},"institutions":[{"id":"https://openalex.org/I1343180700","display_name":"Intel (United States)","ror":"https://ror.org/01ek73717","country_code":"US","type":"company","lineage":["https://openalex.org/I1343180700"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Parijat Mukherjee","raw_affiliation_strings":["Circuit Research Lab, Intel Labs, Hillsboro, OR, USA"],"raw_orcid":"https://orcid.org/0000-0002-2532-7347","affiliations":[{"raw_affiliation_string":"Circuit Research Lab, Intel Labs, Hillsboro, OR, USA","institution_ids":["https://openalex.org/I1343180700"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5059037025","display_name":"Ramesh Harjani","orcid":"https://orcid.org/0000-0001-7691-566X"},"institutions":[{"id":"https://openalex.org/I130238516","display_name":"University of Minnesota","ror":"https://ror.org/017zqws13","country_code":"US","type":"education","lineage":["https://openalex.org/I130238516"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Ramesh Harjani","raw_affiliation_strings":["Department of Electrical and Computer Engineering, University of Minnesota, Minneapolis, MN, USA"],"raw_orcid":"https://orcid.org/0000-0001-7691-566X","affiliations":[{"raw_affiliation_string":"Department of Electrical and Computer Engineering, University of Minnesota, Minneapolis, MN, USA","institution_ids":["https://openalex.org/I130238516"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5068714995","display_name":"Sachin S. Sapatnekar","orcid":"https://orcid.org/0000-0002-5353-2364"},"institutions":[{"id":"https://openalex.org/I130238516","display_name":"University of Minnesota","ror":"https://ror.org/017zqws13","country_code":"US","type":"education","lineage":["https://openalex.org/I130238516"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Sachin S. Sapatnekar","raw_affiliation_strings":["Department of Electrical and Computer Engineering, University of Minnesota, Minneapolis, MN, USA"],"raw_orcid":"https://orcid.org/0000-0002-5353-2364","affiliations":[{"raw_affiliation_string":"Department of Electrical and Computer Engineering, University of Minnesota, Minneapolis, MN, USA","institution_ids":["https://openalex.org/I130238516"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":2,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":0.1731,"has_fulltext":false,"cited_by_count":1,"citation_normalized_percentile":{"value":0.44606667,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":90,"max":94},"biblio":{"volume":"43","issue":"12","first_page":"4373","last_page":"4385"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10558","display_name":"Advancements in Semiconductor Devices and Circuit Design","score":0.9994999766349792,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10558","display_name":"Advancements in Semiconductor Devices and Circuit Design","score":0.9994999766349792,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10472","display_name":"Semiconductor materials and devices","score":0.9987000226974487,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10022","display_name":"Semiconductor Quantum Structures and Devices","score":0.9980999827384949,"subfield":{"id":"https://openalex.org/subfields/3107","display_name":"Atomic and Molecular Physics, and Optics"},"field":{"id":"https://openalex.org/fields/31","display_name":"Physics and Astronomy"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/constructive","display_name":"Constructive","score":0.7451611757278442},{"id":"https://openalex.org/keywords/transistor","display_name":"Transistor","score":0.6426513195037842},{"id":"https://openalex.org/keywords/electronic-circuit","display_name":"Electronic circuit","score":0.5879511833190918},{"id":"https://openalex.org/keywords/nonlinear-system","display_name":"Nonlinear system","score":0.5762175917625427},{"id":"https://openalex.org/keywords/analogue-electronics","display_name":"Analogue electronics","score":0.5576850771903992},{"id":"https://openalex.org/keywords/materials-science","display_name":"Materials science","score":0.40116190910339355},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.36971521377563477},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.361366331577301},{"id":"https://openalex.org/keywords/optoelectronics","display_name":"Optoelectronics","score":0.3357948660850525},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.27956777811050415},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.22198531031608582},{"id":"https://openalex.org/keywords/physics","display_name":"Physics","score":0.1784343421459198},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.07763111591339111},{"id":"https://openalex.org/keywords/quantum-mechanics","display_name":"Quantum mechanics","score":0.05646413564682007},{"id":"https://openalex.org/keywords/process","display_name":"Process (computing)","score":0.05624598264694214}],"concepts":[{"id":"https://openalex.org/C2778701210","wikidata":"https://www.wikidata.org/wiki/Q28130034","display_name":"Constructive","level":3,"score":0.7451611757278442},{"id":"https://openalex.org/C172385210","wikidata":"https://www.wikidata.org/wiki/Q5339","display_name":"Transistor","level":3,"score":0.6426513195037842},{"id":"https://openalex.org/C134146338","wikidata":"https://www.wikidata.org/wiki/Q1815901","display_name":"Electronic circuit","level":2,"score":0.5879511833190918},{"id":"https://openalex.org/C158622935","wikidata":"https://www.wikidata.org/wiki/Q660848","display_name":"Nonlinear system","level":2,"score":0.5762175917625427},{"id":"https://openalex.org/C29074008","wikidata":"https://www.wikidata.org/wiki/Q174925","display_name":"Analogue electronics","level":3,"score":0.5576850771903992},{"id":"https://openalex.org/C192562407","wikidata":"https://www.wikidata.org/wiki/Q228736","display_name":"Materials science","level":0,"score":0.40116190910339355},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.36971521377563477},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.361366331577301},{"id":"https://openalex.org/C49040817","wikidata":"https://www.wikidata.org/wiki/Q193091","display_name":"Optoelectronics","level":1,"score":0.3357948660850525},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.27956777811050415},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.22198531031608582},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.1784343421459198},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.07763111591339111},{"id":"https://openalex.org/C62520636","wikidata":"https://www.wikidata.org/wiki/Q944","display_name":"Quantum mechanics","level":1,"score":0.05646413564682007},{"id":"https://openalex.org/C98045186","wikidata":"https://www.wikidata.org/wiki/Q205663","display_name":"Process (computing)","level":2,"score":0.05624598264694214},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/tcad.2024.3402988","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tcad.2024.3402988","pdf_url":null,"source":{"id":"https://openalex.org/S100835903","display_name":"IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems","issn_l":"0278-0070","issn":["0278-0070","1937-4151"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[{"id":"https://metadata.un.org/sdg/7","score":0.6299999952316284,"display_name":"Affordable and clean energy"}],"awards":[{"id":"https://openalex.org/G6407469064","display_name":null,"funder_award_id":"2810.083","funder_id":"https://openalex.org/F4320306087","funder_display_name":"Semiconductor Research Corporation"}],"funders":[{"id":"https://openalex.org/F4320306087","display_name":"Semiconductor Research Corporation","ror":"https://ror.org/047z4n946"}],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":31,"referenced_works":["https://openalex.org/W199421064","https://openalex.org/W1636724061","https://openalex.org/W1967709031","https://openalex.org/W2015090561","https://openalex.org/W2015428081","https://openalex.org/W2027568818","https://openalex.org/W2095665333","https://openalex.org/W2096760280","https://openalex.org/W2124222398","https://openalex.org/W2140823559","https://openalex.org/W2148808647","https://openalex.org/W2149233875","https://openalex.org/W2153190775","https://openalex.org/W2162005677","https://openalex.org/W2163883796","https://openalex.org/W2166763847","https://openalex.org/W2198887658","https://openalex.org/W2335894895","https://openalex.org/W2343400064","https://openalex.org/W2527129440","https://openalex.org/W2606983183","https://openalex.org/W2735093406","https://openalex.org/W3108107800","https://openalex.org/W3186013690","https://openalex.org/W4200579073","https://openalex.org/W4213218418","https://openalex.org/W4253367659","https://openalex.org/W4280488898","https://openalex.org/W4387251152","https://openalex.org/W6687711587","https://openalex.org/W6742536331"],"related_works":["https://openalex.org/W2377770720","https://openalex.org/W94411513","https://openalex.org/W4311883357","https://openalex.org/W160889949","https://openalex.org/W2197168648","https://openalex.org/W2113626999","https://openalex.org/W2364696089","https://openalex.org/W4300816516","https://openalex.org/W309910862","https://openalex.org/W2375192119"],"abstract_inverted_index":{"The":[0,68,89],"design":[1],"of":[2,16],"active":[3],"array":[4],"structures":[5],"in":[6,83],"analog":[7,81],"circuits":[8],"requires":[9],"careful":[10],"matching":[11,101],"to":[12,28,33,43,56,59,73,98],"minimize":[13],"the":[14,62,93],"impact":[15],"variations.":[17],"This":[18],"work":[19],"presents":[20],"a":[21,84],"constructive":[22],"approach":[23],"for":[24,45,79],"building":[25],"these":[26],"arrays":[27],"directly":[29],"incorporate":[30],"shifts":[31],"due":[32,55],"process":[34],"variations,":[35],"considering":[36],"systematic":[37,46],"first-order":[38],"and":[39,52,58,76,102],"second":[40],"order":[41],"gradients;":[42],"account":[44],"layout":[47,64],"effects,":[48],"including":[49],"parasitic":[50],"mismatch":[51],"layout-dependent":[53],"effects":[54],"stress;":[57],"ensure":[60],"that":[61],"resulting":[63],"delivers":[65],"high":[66],"performance.":[67],"proposed":[69,94],"algorithms":[70],"are":[71,77,96],"targeted":[72],"FinFET":[74,87],"technologies":[75],"validated":[78],"multiple":[80],"blocks":[82],"commercial":[85],"12nm":[86],"process.":[88],"layouts":[90],"generated":[91],"by":[92],"method":[95],"demonstrated":[97],"provide":[99],"better":[100],"performance":[103],"than":[104],"prior":[105],"methods.":[106]},"counts_by_year":[{"year":2024,"cited_by_count":1}],"updated_date":"2026-03-27T05:58:40.876381","created_date":"2025-10-10T00:00:00"}