{"id":"https://openalex.org/W4385695859","doi":"https://doi.org/10.1109/tcad.2023.3303851","title":"DiagNNose: Toward Error Localization in Deep Learning Hardware-Based on VTA-TVM Stack","display_name":"DiagNNose: Toward Error Localization in Deep Learning Hardware-Based on VTA-TVM Stack","publication_year":2023,"publication_date":"2023-08-09","ids":{"openalex":"https://openalex.org/W4385695859","doi":"https://doi.org/10.1109/tcad.2023.3303851"},"language":"en","primary_location":{"id":"doi:10.1109/tcad.2023.3303851","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tcad.2023.3303851","pdf_url":null,"source":{"id":"https://openalex.org/S100835903","display_name":"IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems","issn_l":"0278-0070","issn":["0278-0070","1937-4151"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5066094401","display_name":"Shamik Kundu","orcid":"https://orcid.org/0000-0002-5992-8554"},"institutions":[{"id":"https://openalex.org/I162577319","display_name":"The University of Texas at Dallas","ror":"https://ror.org/049emcs32","country_code":"US","type":"education","lineage":["https://openalex.org/I162577319"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Shamik Kundu","raw_affiliation_strings":["Department of Electrical and Computer Engineering, University of Texas at Dallas, Richardson, TX, USA"],"raw_orcid":"https://orcid.org/0000-0002-5992-8554","affiliations":[{"raw_affiliation_string":"Department of Electrical and Computer Engineering, University of Texas at Dallas, Richardson, TX, USA","institution_ids":["https://openalex.org/I162577319"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5083178603","display_name":"Suvadeep Banerjee","orcid":"https://orcid.org/0000-0001-5188-1651"},"institutions":[{"id":"https://openalex.org/I1343180700","display_name":"Intel (United States)","ror":"https://ror.org/01ek73717","country_code":"US","type":"company","lineage":["https://openalex.org/I1343180700"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Suvadeep Banerjee","raw_affiliation_strings":["Strategic CAD Labs, Intel Corporation, Santa Clara, CA, USA"],"raw_orcid":"https://orcid.org/0000-0001-5188-1651","affiliations":[{"raw_affiliation_string":"Strategic CAD Labs, Intel Corporation, Santa Clara, CA, USA","institution_ids":["https://openalex.org/I1343180700"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5066464351","display_name":"Arnab Raha","orcid":"https://orcid.org/0000-0002-8848-1069"},"institutions":[{"id":"https://openalex.org/I1343180700","display_name":"Intel (United States)","ror":"https://ror.org/01ek73717","country_code":"US","type":"company","lineage":["https://openalex.org/I1343180700"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Arnab Raha","raw_affiliation_strings":["Advanced Architecture Research Group, Intel Corporation, Santa Clara, CA, USA"],"raw_orcid":"https://orcid.org/0000-0002-8848-1069","affiliations":[{"raw_affiliation_string":"Advanced Architecture Research Group, Intel Corporation, Santa Clara, CA, USA","institution_ids":["https://openalex.org/I1343180700"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5113724917","display_name":"Suriyaprakash Natarajan","orcid":"https://orcid.org/0000-0002-5499-4341"},"institutions":[{"id":"https://openalex.org/I1343180700","display_name":"Intel (United States)","ror":"https://ror.org/01ek73717","country_code":"US","type":"company","lineage":["https://openalex.org/I1343180700"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Suriyaprakash Natarajan","raw_affiliation_strings":["Manufacturing and Product Engineering, Intel Corporation, Santa Clara, CA, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Manufacturing and Product Engineering, Intel Corporation, Santa Clara, CA, USA","institution_ids":["https://openalex.org/I1343180700"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5066320524","display_name":"Kanad Basu","orcid":"https://orcid.org/0000-0002-6431-7512"},"institutions":[{"id":"https://openalex.org/I162577319","display_name":"The University of Texas at Dallas","ror":"https://ror.org/049emcs32","country_code":"US","type":"education","lineage":["https://openalex.org/I162577319"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Kanad Basu","raw_affiliation_strings":["Department of Electrical and Computer Engineering, University of Texas at Dallas, Richardson, TX, USA"],"raw_orcid":"https://orcid.org/0000-0002-6431-7512","affiliations":[{"raw_affiliation_string":"Department of Electrical and Computer Engineering, University of Texas at Dallas, Richardson, TX, USA","institution_ids":["https://openalex.org/I162577319"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":2,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":1.1601,"has_fulltext":false,"cited_by_count":5,"citation_normalized_percentile":{"value":0.77039068,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":96,"max":98},"biblio":{"volume":"43","issue":"1","first_page":"217","last_page":"229"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.9973999857902527,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.9973999857902527,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11005","display_name":"Radiation Effects in Electronics","score":0.996999979019165,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10743","display_name":"Software Testing and Debugging Techniques","score":0.9947999715805054,"subfield":{"id":"https://openalex.org/subfields/1712","display_name":"Software"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.7511063814163208},{"id":"https://openalex.org/keywords/deep-learning","display_name":"Deep learning","score":0.6154296398162842},{"id":"https://openalex.org/keywords/datapath","display_name":"Datapath","score":0.5656427145004272},{"id":"https://openalex.org/keywords/overhead","display_name":"Overhead (engineering)","score":0.5539386868476868},{"id":"https://openalex.org/keywords/dataflow","display_name":"Dataflow","score":0.5396035313606262},{"id":"https://openalex.org/keywords/artificial-neural-network","display_name":"Artificial neural network","score":0.4875049293041229},{"id":"https://openalex.org/keywords/artificial-intelligence","display_name":"Artificial intelligence","score":0.4503532648086548},{"id":"https://openalex.org/keywords/perceptron","display_name":"Perceptron","score":0.43159329891204834},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.3973068296909332},{"id":"https://openalex.org/keywords/computer-engineering","display_name":"Computer engineering","score":0.36945661902427673},{"id":"https://openalex.org/keywords/pattern-recognition","display_name":"Pattern recognition (psychology)","score":0.34600138664245605},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.3059741258621216},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.2760095000267029}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7511063814163208},{"id":"https://openalex.org/C108583219","wikidata":"https://www.wikidata.org/wiki/Q197536","display_name":"Deep learning","level":2,"score":0.6154296398162842},{"id":"https://openalex.org/C2781198647","wikidata":"https://www.wikidata.org/wiki/Q1633673","display_name":"Datapath","level":2,"score":0.5656427145004272},{"id":"https://openalex.org/C2779960059","wikidata":"https://www.wikidata.org/wiki/Q7113681","display_name":"Overhead (engineering)","level":2,"score":0.5539386868476868},{"id":"https://openalex.org/C96324660","wikidata":"https://www.wikidata.org/wiki/Q205446","display_name":"Dataflow","level":2,"score":0.5396035313606262},{"id":"https://openalex.org/C50644808","wikidata":"https://www.wikidata.org/wiki/Q192776","display_name":"Artificial neural network","level":2,"score":0.4875049293041229},{"id":"https://openalex.org/C154945302","wikidata":"https://www.wikidata.org/wiki/Q11660","display_name":"Artificial intelligence","level":1,"score":0.4503532648086548},{"id":"https://openalex.org/C60908668","wikidata":"https://www.wikidata.org/wiki/Q690207","display_name":"Perceptron","level":3,"score":0.43159329891204834},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.3973068296909332},{"id":"https://openalex.org/C113775141","wikidata":"https://www.wikidata.org/wiki/Q428691","display_name":"Computer engineering","level":1,"score":0.36945661902427673},{"id":"https://openalex.org/C153180895","wikidata":"https://www.wikidata.org/wiki/Q7148389","display_name":"Pattern recognition (psychology)","level":2,"score":0.34600138664245605},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.3059741258621216},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.2760095000267029},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/tcad.2023.3303851","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tcad.2023.3303851","pdf_url":null,"source":{"id":"https://openalex.org/S100835903","display_name":"IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems","issn_l":"0278-0070","issn":["0278-0070","1937-4151"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[{"id":"https://openalex.org/G7526799016","display_name":null,"funder_award_id":"2930.001","funder_id":"https://openalex.org/F4320306087","funder_display_name":"Semiconductor Research Corporation"}],"funders":[{"id":"https://openalex.org/F4320306087","display_name":"Semiconductor Research Corporation","ror":"https://ror.org/047z4n946"}],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":39,"referenced_works":["https://openalex.org/W1973965874","https://openalex.org/W1983394510","https://openalex.org/W2035890032","https://openalex.org/W2040809673","https://openalex.org/W2040996287","https://openalex.org/W2063473175","https://openalex.org/W2067523571","https://openalex.org/W2090308255","https://openalex.org/W2101234009","https://openalex.org/W2133575467","https://openalex.org/W2154790323","https://openalex.org/W2158923166","https://openalex.org/W2163417450","https://openalex.org/W2163590173","https://openalex.org/W2167865703","https://openalex.org/W2185040577","https://openalex.org/W2442974303","https://openalex.org/W2612076670","https://openalex.org/W2944349874","https://openalex.org/W2953212265","https://openalex.org/W2962772482","https://openalex.org/W2963114857","https://openalex.org/W2964108906","https://openalex.org/W2968729794","https://openalex.org/W2973942527","https://openalex.org/W3006692106","https://openalex.org/W3016542674","https://openalex.org/W3128389908","https://openalex.org/W3131039502","https://openalex.org/W3193311994","https://openalex.org/W3215311643","https://openalex.org/W4233384578","https://openalex.org/W4233573690","https://openalex.org/W4236868170","https://openalex.org/W4243681061","https://openalex.org/W4252174618","https://openalex.org/W4321608010","https://openalex.org/W6675354045","https://openalex.org/W6751349269"],"related_works":["https://openalex.org/W2109699519","https://openalex.org/W970262775","https://openalex.org/W2998381397","https://openalex.org/W1831618318","https://openalex.org/W4236419692","https://openalex.org/W2006568360","https://openalex.org/W4233616027","https://openalex.org/W2059591361","https://openalex.org/W4244724753","https://openalex.org/W2535673728"],"abstract_inverted_index":{"Low-level":[0],"hardware":[1],"faults":[2],"manifested":[3],"in":[4,11,39,77,100,103,131,204,208],"a":[5,66,82,90,123,146,193],"Deep":[6],"learning":[7],"(DL)":[8],"accelerator":[9,102,148,154,207],"usher":[10],"graceless":[12],"degradation":[13],"of":[14,31,93,116,190],"high-level":[15],"classification":[16],"accuracy,":[17],"which":[18,36],"can":[19],"eventuate":[20],"to":[21,52,88,145,157,183],"catastrophic":[22],"circumstances.":[23],"This":[24],"violates":[25],"the":[26,32,53,101,113,117,151,205],"crucial":[27],"Functional":[28],"Safety":[29],"(FuSa)":[30],"DL":[33,58,78,206],"accelerator,":[34],"maintaining":[35],"is":[37],"imperative":[38],"high-assurance":[40],"applications.":[41],"Conventional":[42],"techniques":[43],"for":[44,73],"error":[45,70,129,172],"localization":[46,71,130,173],"incur":[47],"high-test":[48],"efforts,":[49],"without":[50],"regards":[51],"unique":[54],"challenges":[55],"posed":[56],"by":[57],"systems.":[59],"In":[60],"this":[61],"direction,":[62],"we":[63],"propose":[64],"DiagNNose,":[65],"two-tier":[67],"machine":[68],"learning-based":[69],"framework":[72],"on-line":[74],"fault":[75],"management":[76],"accelerators.":[79],"We":[80,141],"develop":[81],"novel":[83],"diagnostic":[84,177],"pattern":[85,196],"selection":[86],"algorithm":[87],"obtain":[89],"minimal":[91],"subset":[92],"functional":[94,178],"test":[95,179,195],"patterns,":[96],"that":[97],"are":[98],"executed":[99],"mission":[104,209],"mode.":[105,210],"By":[106],"extracting":[107],"and":[108,134],"analyzing":[109],"dataflow-based":[110],"features":[111],"from":[112],"intermediate":[114],"computations":[115],"general":[118],"matrix":[119],"multiply":[120],"(GEMM)":[121],"core,":[122],"lightweight":[124],"multilayer":[125],"perceptron":[126],"accomplishes":[127],"bit-level":[128],"8-bit,":[132],"16-bit,":[133],"32-bit":[135],"datapath":[136],"units":[137],"with":[138,198],"high":[139],"fidelity.":[140],"have":[142],"limited":[143],"ourselves":[144],"single":[147],"design,":[149],"i.e.,":[150],"versatile":[152],"tensor":[153],"(VTA)":[155],"architecture":[156],"evaluate":[158],"our":[159],"proposed":[160],"DiagNNose":[161],"framework.":[162],"On":[163],"executing":[164],"state-of-the-art":[165],"deep":[166],"neural":[167],"networks":[168],"trained":[169],"on":[170],"ImageNet;":[171],"using":[174],"only":[175],"30":[176],"patterns":[180],"demonstrate":[181],"up":[182],"98.4%":[184],"diagnosability,":[185],"thereby":[186],"demonstrating":[187],"an":[188],"improvement":[189],"54.63%":[191],"over":[192],"random":[194],"set,":[197],"as":[199,201],"low":[200],"4.95%":[202],"overhead":[203]},"counts_by_year":[{"year":2026,"cited_by_count":2},{"year":2025,"cited_by_count":3}],"updated_date":"2026-07-23T08:03:31.855105","created_date":"2025-10-10T00:00:00"}