{"id":"https://openalex.org/W4317795302","doi":"https://doi.org/10.1109/tcad.2023.3238880","title":"Constructive Placement and Routing for Common-Centroid Capacitor Arrays in Binary-Weighted and Split DACs","display_name":"Constructive Placement and Routing for Common-Centroid Capacitor Arrays in Binary-Weighted and Split DACs","publication_year":2023,"publication_date":"2023-01-23","ids":{"openalex":"https://openalex.org/W4317795302","doi":"https://doi.org/10.1109/tcad.2023.3238880"},"language":"en","primary_location":{"id":"doi:10.1109/tcad.2023.3238880","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tcad.2023.3238880","pdf_url":null,"source":{"id":"https://openalex.org/S100835903","display_name":"IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems","issn_l":"0278-0070","issn":["0278-0070","1937-4151"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5057480511","display_name":"Nibedita Karmokar","orcid":"https://orcid.org/0000-0002-8429-5656"},"institutions":[{"id":"https://openalex.org/I130238516","display_name":"University of Minnesota","ror":"https://ror.org/017zqws13","country_code":"US","type":"education","lineage":["https://openalex.org/I130238516"]},{"id":"https://openalex.org/I4210101327","display_name":"Twin Cities Orthopedics","ror":"https://ror.org/01en4s460","country_code":"US","type":"healthcare","lineage":["https://openalex.org/I4210101327"]}],"countries":["US"],"is_corresponding":true,"raw_author_name":"Nibedita Karmokar","raw_affiliation_strings":["Department of Electrical and Computer Engineering, University of Minnesota Twin Cities, Minneapolis, MN, USA"],"raw_orcid":"https://orcid.org/0000-0002-8429-5656","affiliations":[{"raw_affiliation_string":"Department of Electrical and Computer Engineering, University of Minnesota Twin Cities, Minneapolis, MN, USA","institution_ids":["https://openalex.org/I4210101327","https://openalex.org/I130238516"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5100732194","display_name":"Arvind Sharma","orcid":"https://orcid.org/0000-0002-9250-9642"},"institutions":[{"id":"https://openalex.org/I130238516","display_name":"University of Minnesota","ror":"https://ror.org/017zqws13","country_code":"US","type":"education","lineage":["https://openalex.org/I130238516"]},{"id":"https://openalex.org/I4210101327","display_name":"Twin Cities Orthopedics","ror":"https://ror.org/01en4s460","country_code":"US","type":"healthcare","lineage":["https://openalex.org/I4210101327"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Arvind K. Sharma","raw_affiliation_strings":["Department of Electrical and Computer Engineering, University of Minnesota Twin Cities, Minneapolis, MN, USA"],"raw_orcid":"https://orcid.org/0000-0002-9250-9642","affiliations":[{"raw_affiliation_string":"Department of Electrical and Computer Engineering, University of Minnesota Twin Cities, Minneapolis, MN, USA","institution_ids":["https://openalex.org/I4210101327","https://openalex.org/I130238516"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5004779677","display_name":"Jitesh Poojary","orcid":"https://orcid.org/0000-0001-7548-9064"},"institutions":[{"id":"https://openalex.org/I130238516","display_name":"University of Minnesota","ror":"https://ror.org/017zqws13","country_code":"US","type":"education","lineage":["https://openalex.org/I130238516"]},{"id":"https://openalex.org/I4210101327","display_name":"Twin Cities Orthopedics","ror":"https://ror.org/01en4s460","country_code":"US","type":"healthcare","lineage":["https://openalex.org/I4210101327"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Jitesh Poojary","raw_affiliation_strings":["Department of Electrical and Computer Engineering, University of Minnesota Twin Cities, Minneapolis, MN, USA"],"raw_orcid":"https://orcid.org/0000-0001-7548-9064","affiliations":[{"raw_affiliation_string":"Department of Electrical and Computer Engineering, University of Minnesota Twin Cities, Minneapolis, MN, USA","institution_ids":["https://openalex.org/I4210101327","https://openalex.org/I130238516"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5063857392","display_name":"Meghna Madhusudan","orcid":"https://orcid.org/0000-0001-5101-2421"},"institutions":[{"id":"https://openalex.org/I130238516","display_name":"University of Minnesota","ror":"https://ror.org/017zqws13","country_code":"US","type":"education","lineage":["https://openalex.org/I130238516"]},{"id":"https://openalex.org/I4210101327","display_name":"Twin Cities Orthopedics","ror":"https://ror.org/01en4s460","country_code":"US","type":"healthcare","lineage":["https://openalex.org/I4210101327"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Meghna Madhusudan","raw_affiliation_strings":["Department of Electrical and Computer Engineering, University of Minnesota Twin Cities, Minneapolis, MN, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Electrical and Computer Engineering, University of Minnesota Twin Cities, Minneapolis, MN, USA","institution_ids":["https://openalex.org/I4210101327","https://openalex.org/I130238516"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5059037025","display_name":"Ramesh Harjani","orcid":"https://orcid.org/0000-0001-7691-566X"},"institutions":[{"id":"https://openalex.org/I130238516","display_name":"University of Minnesota","ror":"https://ror.org/017zqws13","country_code":"US","type":"education","lineage":["https://openalex.org/I130238516"]},{"id":"https://openalex.org/I4210101327","display_name":"Twin Cities Orthopedics","ror":"https://ror.org/01en4s460","country_code":"US","type":"healthcare","lineage":["https://openalex.org/I4210101327"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Ramesh Harjani","raw_affiliation_strings":["Department of Electrical and Computer Engineering, University of Minnesota Twin Cities, Minneapolis, MN, USA"],"raw_orcid":"https://orcid.org/0000-0001-7691-566X","affiliations":[{"raw_affiliation_string":"Department of Electrical and Computer Engineering, University of Minnesota Twin Cities, Minneapolis, MN, USA","institution_ids":["https://openalex.org/I4210101327","https://openalex.org/I130238516"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5068714995","display_name":"Sachin S. Sapatnekar","orcid":"https://orcid.org/0000-0002-5353-2364"},"institutions":[{"id":"https://openalex.org/I130238516","display_name":"University of Minnesota","ror":"https://ror.org/017zqws13","country_code":"US","type":"education","lineage":["https://openalex.org/I130238516"]},{"id":"https://openalex.org/I4210101327","display_name":"Twin Cities Orthopedics","ror":"https://ror.org/01en4s460","country_code":"US","type":"healthcare","lineage":["https://openalex.org/I4210101327"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Sachin S. Sapatnekar","raw_affiliation_strings":["Department of Electrical and Computer Engineering, University of Minnesota Twin Cities, Minneapolis, MN, USA"],"raw_orcid":"https://orcid.org/0000-0002-5353-2364","affiliations":[{"raw_affiliation_string":"Department of Electrical and Computer Engineering, University of Minnesota Twin Cities, Minneapolis, MN, USA","institution_ids":["https://openalex.org/I4210101327","https://openalex.org/I130238516"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":6,"corresponding_author_ids":["https://openalex.org/A5057480511"],"corresponding_institution_ids":["https://openalex.org/I130238516","https://openalex.org/I4210101327"],"apc_list":null,"apc_paid":null,"fwci":1.1803,"has_fulltext":false,"cited_by_count":11,"citation_normalized_percentile":{"value":0.75207033,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":91,"max":99},"biblio":{"volume":"42","issue":"9","first_page":"2782","last_page":"2795"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10558","display_name":"Advancements in Semiconductor Devices and Circuit Design","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/parasitic-extraction","display_name":"Parasitic extraction","score":0.8170852661132812},{"id":"https://openalex.org/keywords/converters","display_name":"Converters","score":0.6712136268615723},{"id":"https://openalex.org/keywords/capacitor","display_name":"Capacitor","score":0.6630698442459106},{"id":"https://openalex.org/keywords/centroid","display_name":"Centroid","score":0.6575066447257996},{"id":"https://openalex.org/keywords/routing","display_name":"Routing (electronic design automation)","score":0.600548267364502},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.5568952560424805},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.5547682046890259},{"id":"https://openalex.org/keywords/binary-number","display_name":"Binary number","score":0.5086418390274048},{"id":"https://openalex.org/keywords/topology","display_name":"Topology (electrical circuits)","score":0.47077271342277527},{"id":"https://openalex.org/keywords/network-topology","display_name":"Network topology","score":0.45856109261512756},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.3131228983402252},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.30621981620788574},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.2707957625389099},{"id":"https://openalex.org/keywords/mathematics","display_name":"Mathematics","score":0.16464892029762268},{"id":"https://openalex.org/keywords/computer-network","display_name":"Computer network","score":0.12137603759765625},{"id":"https://openalex.org/keywords/arithmetic","display_name":"Arithmetic","score":0.09370526671409607}],"concepts":[{"id":"https://openalex.org/C159818811","wikidata":"https://www.wikidata.org/wiki/Q7135947","display_name":"Parasitic extraction","level":2,"score":0.8170852661132812},{"id":"https://openalex.org/C2778422915","wikidata":"https://www.wikidata.org/wiki/Q10302051","display_name":"Converters","level":3,"score":0.6712136268615723},{"id":"https://openalex.org/C52192207","wikidata":"https://www.wikidata.org/wiki/Q5322","display_name":"Capacitor","level":3,"score":0.6630698442459106},{"id":"https://openalex.org/C146599234","wikidata":"https://www.wikidata.org/wiki/Q511093","display_name":"Centroid","level":2,"score":0.6575066447257996},{"id":"https://openalex.org/C74172769","wikidata":"https://www.wikidata.org/wiki/Q1446839","display_name":"Routing (electronic design automation)","level":2,"score":0.600548267364502},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.5568952560424805},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.5547682046890259},{"id":"https://openalex.org/C48372109","wikidata":"https://www.wikidata.org/wiki/Q3913","display_name":"Binary number","level":2,"score":0.5086418390274048},{"id":"https://openalex.org/C184720557","wikidata":"https://www.wikidata.org/wiki/Q7825049","display_name":"Topology (electrical circuits)","level":2,"score":0.47077271342277527},{"id":"https://openalex.org/C199845137","wikidata":"https://www.wikidata.org/wiki/Q145490","display_name":"Network topology","level":2,"score":0.45856109261512756},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.3131228983402252},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.30621981620788574},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.2707957625389099},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.16464892029762268},{"id":"https://openalex.org/C31258907","wikidata":"https://www.wikidata.org/wiki/Q1301371","display_name":"Computer network","level":1,"score":0.12137603759765625},{"id":"https://openalex.org/C94375191","wikidata":"https://www.wikidata.org/wiki/Q11205","display_name":"Arithmetic","level":1,"score":0.09370526671409607},{"id":"https://openalex.org/C154945302","wikidata":"https://www.wikidata.org/wiki/Q11660","display_name":"Artificial intelligence","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/tcad.2023.3238880","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tcad.2023.3238880","pdf_url":null,"source":{"id":"https://openalex.org/S100835903","display_name":"IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems","issn_l":"0278-0070","issn":["0278-0070","1937-4151"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[{"id":"https://openalex.org/F4320306087","display_name":"Semiconductor Research Corporation","ror":"https://ror.org/047z4n946"}],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":24,"referenced_works":["https://openalex.org/W2009453974","https://openalex.org/W2010921337","https://openalex.org/W2048251158","https://openalex.org/W2062158912","https://openalex.org/W2082979872","https://openalex.org/W2103937095","https://openalex.org/W2121437951","https://openalex.org/W2157680838","https://openalex.org/W2163883796","https://openalex.org/W2175322436","https://openalex.org/W2343400064","https://openalex.org/W2347135674","https://openalex.org/W2577762902","https://openalex.org/W2593589223","https://openalex.org/W2603623014","https://openalex.org/W2606983183","https://openalex.org/W2613339586","https://openalex.org/W2941797510","https://openalex.org/W3146178383","https://openalex.org/W4213218418","https://openalex.org/W4231501498","https://openalex.org/W4237435002","https://openalex.org/W4280488898","https://openalex.org/W6682815025"],"related_works":["https://openalex.org/W1905216755","https://openalex.org/W2104218257","https://openalex.org/W2117417104","https://openalex.org/W2534619547","https://openalex.org/W2381926679","https://openalex.org/W1923048618","https://openalex.org/W1990010037","https://openalex.org/W2198432996","https://openalex.org/W2161636646","https://openalex.org/W4387546336"],"abstract_inverted_index":{"Process":[0],"variations":[1],"and":[2,30,34,51,81,86,94,107],"the":[3,13,61,65,71,88,99],"effect":[4],"of":[5,16,39,64],"interconnect":[6],"parasitics":[7],"can":[8,74],"cause":[9],"significant":[10],"perturbations":[11],"in":[12,54],"performance":[14],"metrics":[15],"capacitive":[17],"digital-to-analog":[18],"converters":[19],"(DACs).":[20],"This":[21],"article":[22],"develops":[23],"fast":[24],"constructive":[25],"procedures":[26],"for":[27,32,91],"common-centroid":[28],"placement":[29],"routing":[31],"binary-weighted":[33,93],"split":[35,95],"capacitor":[36,66,89],"array":[37],"topologies":[38],"charge-sharing":[40],"DACs.":[41],"Our":[42],"approach":[43,120],"particularly":[44],"targets":[45],"FinFET":[46],"technologies":[47],"with":[48,117,124],"high":[49],"wire":[50],"via":[52,115],"parasitics:":[53],"these":[55,79],"technology":[56],"nodes,":[57],"we":[58],"show":[59],"that":[60],"switching":[62,100],"speed":[63],"array,":[67,90],"as":[68],"measured":[69],"by":[70,78,112],"3-dB":[72,105],"frequency,":[73],"be":[75],"severely":[76],"degraded":[77],"parasitics,":[80],"develop":[82],"techniques":[83],"to":[84,97],"place":[85],"route":[87],"both":[92],"DACs,":[96],"optimize":[98],"speed.":[101],"A":[102],"balance":[103],"between":[104],"frequency":[106],"DAC":[108],"INL/DNL":[109],"is":[110],"shown":[111],"trading":[113],"off":[114],"counts":[116],"dispersion.":[118],"The":[119],"delivers":[121],"high-quality":[122],"results":[123],"low":[125],"runtimes.":[126]},"counts_by_year":[{"year":2025,"cited_by_count":1},{"year":2024,"cited_by_count":8},{"year":2023,"cited_by_count":2}],"updated_date":"2026-03-27T05:58:40.876381","created_date":"2025-10-10T00:00:00"}