{"id":"https://openalex.org/W4312675908","doi":"https://doi.org/10.1109/tcad.2022.3220711","title":"TRUST: Through-Silicon via Repair Using Switch Matrix Topology","display_name":"TRUST: Through-Silicon via Repair Using Switch Matrix Topology","publication_year":2022,"publication_date":"2022-11-08","ids":{"openalex":"https://openalex.org/W4312675908","doi":"https://doi.org/10.1109/tcad.2022.3220711"},"language":"en","primary_location":{"id":"doi:10.1109/tcad.2022.3220711","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tcad.2022.3220711","pdf_url":null,"source":{"id":"https://openalex.org/S100835903","display_name":"IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems","issn_l":"0278-0070","issn":["0278-0070","1937-4151"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5100782289","display_name":"Hayoung Lee","orcid":"https://orcid.org/0000-0002-6868-0829"},"institutions":[{"id":"https://openalex.org/I193775966","display_name":"Yonsei University","ror":"https://ror.org/01wjejq96","country_code":"KR","type":"education","lineage":["https://openalex.org/I193775966"]}],"countries":["KR"],"is_corresponding":false,"raw_author_name":"Hayoung Lee","raw_affiliation_strings":["Department of Electrical and Electronic Engineering, Yonsei University, Seoul, South Korea"],"raw_orcid":"https://orcid.org/0000-0002-6868-0829","affiliations":[{"raw_affiliation_string":"Department of Electrical and Electronic Engineering, Yonsei University, Seoul, South Korea","institution_ids":["https://openalex.org/I193775966"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5114585267","display_name":"Seung Ho Shin","orcid":"https://orcid.org/0009-0002-1153-0034"},"institutions":[{"id":"https://openalex.org/I193775966","display_name":"Yonsei University","ror":"https://ror.org/01wjejq96","country_code":"KR","type":"education","lineage":["https://openalex.org/I193775966"]}],"countries":["KR"],"is_corresponding":false,"raw_author_name":"Seung Ho Shin","raw_affiliation_strings":["Department of Electrical and Electronic Engineering, Yonsei University, Seoul, South Korea"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Electrical and Electronic Engineering, Yonsei University, Seoul, South Korea","institution_ids":["https://openalex.org/I193775966"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5064791965","display_name":"Younwoo Yoo","orcid":null},"institutions":[{"id":"https://openalex.org/I193775966","display_name":"Yonsei University","ror":"https://ror.org/01wjejq96","country_code":"KR","type":"education","lineage":["https://openalex.org/I193775966"]}],"countries":["KR"],"is_corresponding":false,"raw_author_name":"Younwoo Yoo","raw_affiliation_strings":["Department of Electrical and Electronic Engineering, Yonsei University, Seoul, South Korea"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Electrical and Electronic Engineering, Yonsei University, Seoul, South Korea","institution_ids":["https://openalex.org/I193775966"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5068528309","display_name":"Sungho Kang","orcid":"https://orcid.org/0000-0002-7093-2095"},"institutions":[{"id":"https://openalex.org/I193775966","display_name":"Yonsei University","ror":"https://ror.org/01wjejq96","country_code":"KR","type":"education","lineage":["https://openalex.org/I193775966"]}],"countries":["KR"],"is_corresponding":false,"raw_author_name":"Sungho Kang","raw_affiliation_strings":["Department of Electrical and Electronic Engineering, Yonsei University, Seoul, South Korea"],"raw_orcid":"https://orcid.org/0000-0002-7093-2095","affiliations":[{"raw_affiliation_string":"Department of Electrical and Electronic Engineering, Yonsei University, Seoul, South Korea","institution_ids":["https://openalex.org/I193775966"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":[],"corresponding_institution_ids":["https://openalex.org/I193775966"],"apc_list":null,"apc_paid":null,"fwci":0.6185,"has_fulltext":false,"cited_by_count":9,"citation_normalized_percentile":{"value":0.66027403,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":98},"biblio":{"volume":"42","issue":"7","first_page":"2377","last_page":"2390"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11527","display_name":"3D IC and TSV technologies","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11527","display_name":"3D IC and TSV technologies","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10472","display_name":"Semiconductor materials and devices","score":0.9943000078201294,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10623","display_name":"Thin-Film Transistor Technologies","score":0.9934999942779541,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/topology","display_name":"Topology (electrical circuits)","score":0.5280792713165283},{"id":"https://openalex.org/keywords/three-dimensional-integrated-circuit","display_name":"Three-dimensional integrated circuit","score":0.5256242156028748},{"id":"https://openalex.org/keywords/through-silicon-via","display_name":"Through-silicon via","score":0.5207529067993164},{"id":"https://openalex.org/keywords/reliability","display_name":"Reliability (semiconductor)","score":0.4967389702796936},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.49578937888145447},{"id":"https://openalex.org/keywords/flexibility","display_name":"Flexibility (engineering)","score":0.47451895475387573},{"id":"https://openalex.org/keywords/reduction","display_name":"Reduction (mathematics)","score":0.4735105335712433},{"id":"https://openalex.org/keywords/routing","display_name":"Routing (electronic design automation)","score":0.4258689284324646},{"id":"https://openalex.org/keywords/path","display_name":"Path (computing)","score":0.415187805891037},{"id":"https://openalex.org/keywords/integrated-circuit","display_name":"Integrated circuit","score":0.3812888562679291},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.37071871757507324},{"id":"https://openalex.org/keywords/materials-science","display_name":"Materials science","score":0.3634924292564392},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.19845497608184814},{"id":"https://openalex.org/keywords/silicon","display_name":"Silicon","score":0.19113236665725708},{"id":"https://openalex.org/keywords/computer-network","display_name":"Computer network","score":0.1827353537082672},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.14964064955711365},{"id":"https://openalex.org/keywords/optoelectronics","display_name":"Optoelectronics","score":0.13005712628364563},{"id":"https://openalex.org/keywords/power","display_name":"Power (physics)","score":0.09914731979370117}],"concepts":[{"id":"https://openalex.org/C184720557","wikidata":"https://www.wikidata.org/wiki/Q7825049","display_name":"Topology (electrical circuits)","level":2,"score":0.5280792713165283},{"id":"https://openalex.org/C59088047","wikidata":"https://www.wikidata.org/wiki/Q229370","display_name":"Three-dimensional integrated circuit","level":3,"score":0.5256242156028748},{"id":"https://openalex.org/C45632049","wikidata":"https://www.wikidata.org/wiki/Q1578120","display_name":"Through-silicon via","level":3,"score":0.5207529067993164},{"id":"https://openalex.org/C43214815","wikidata":"https://www.wikidata.org/wiki/Q7310987","display_name":"Reliability (semiconductor)","level":3,"score":0.4967389702796936},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.49578937888145447},{"id":"https://openalex.org/C2780598303","wikidata":"https://www.wikidata.org/wiki/Q65921492","display_name":"Flexibility (engineering)","level":2,"score":0.47451895475387573},{"id":"https://openalex.org/C111335779","wikidata":"https://www.wikidata.org/wiki/Q3454686","display_name":"Reduction (mathematics)","level":2,"score":0.4735105335712433},{"id":"https://openalex.org/C74172769","wikidata":"https://www.wikidata.org/wiki/Q1446839","display_name":"Routing (electronic design automation)","level":2,"score":0.4258689284324646},{"id":"https://openalex.org/C2777735758","wikidata":"https://www.wikidata.org/wiki/Q817765","display_name":"Path (computing)","level":2,"score":0.415187805891037},{"id":"https://openalex.org/C530198007","wikidata":"https://www.wikidata.org/wiki/Q80831","display_name":"Integrated circuit","level":2,"score":0.3812888562679291},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.37071871757507324},{"id":"https://openalex.org/C192562407","wikidata":"https://www.wikidata.org/wiki/Q228736","display_name":"Materials science","level":0,"score":0.3634924292564392},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.19845497608184814},{"id":"https://openalex.org/C544956773","wikidata":"https://www.wikidata.org/wiki/Q670","display_name":"Silicon","level":2,"score":0.19113236665725708},{"id":"https://openalex.org/C31258907","wikidata":"https://www.wikidata.org/wiki/Q1301371","display_name":"Computer network","level":1,"score":0.1827353537082672},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.14964064955711365},{"id":"https://openalex.org/C49040817","wikidata":"https://www.wikidata.org/wiki/Q193091","display_name":"Optoelectronics","level":1,"score":0.13005712628364563},{"id":"https://openalex.org/C163258240","wikidata":"https://www.wikidata.org/wiki/Q25342","display_name":"Power (physics)","level":2,"score":0.09914731979370117},{"id":"https://openalex.org/C105795698","wikidata":"https://www.wikidata.org/wiki/Q12483","display_name":"Statistics","level":1,"score":0.0},{"id":"https://openalex.org/C62520636","wikidata":"https://www.wikidata.org/wiki/Q944","display_name":"Quantum mechanics","level":1,"score":0.0},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.0},{"id":"https://openalex.org/C2524010","wikidata":"https://www.wikidata.org/wiki/Q8087","display_name":"Geometry","level":1,"score":0.0},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.0},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/tcad.2022.3220711","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tcad.2022.3220711","pdf_url":null,"source":{"id":"https://openalex.org/S100835903","display_name":"IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems","issn_l":"0278-0070","issn":["0278-0070","1937-4151"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[{"id":"https://metadata.un.org/sdg/9","score":0.5299999713897705,"display_name":"Industry, innovation and infrastructure"}],"awards":[],"funders":[{"id":"https://openalex.org/F4320317879","display_name":"SK Hynix","ror":null}],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":39,"referenced_works":["https://openalex.org/W1655990431","https://openalex.org/W1977546455","https://openalex.org/W1981220134","https://openalex.org/W1998234398","https://openalex.org/W2005613478","https://openalex.org/W2034429812","https://openalex.org/W2038176281","https://openalex.org/W2054124866","https://openalex.org/W2061141647","https://openalex.org/W2062143991","https://openalex.org/W2062899780","https://openalex.org/W2068746002","https://openalex.org/W2090910005","https://openalex.org/W2097643666","https://openalex.org/W2107304970","https://openalex.org/W2131875329","https://openalex.org/W2136323667","https://openalex.org/W2137893918","https://openalex.org/W2151755625","https://openalex.org/W2152425525","https://openalex.org/W2156941351","https://openalex.org/W2169087039","https://openalex.org/W2338152143","https://openalex.org/W2397543037","https://openalex.org/W2522720996","https://openalex.org/W2546503017","https://openalex.org/W2588191434","https://openalex.org/W2603592157","https://openalex.org/W2771448003","https://openalex.org/W2783723606","https://openalex.org/W2789385241","https://openalex.org/W2900334641","https://openalex.org/W2954055522","https://openalex.org/W2959880105","https://openalex.org/W2979746556","https://openalex.org/W3001290849","https://openalex.org/W3089000715","https://openalex.org/W3140564856","https://openalex.org/W3157237844"],"related_works":["https://openalex.org/W1990828594","https://openalex.org/W2016970881","https://openalex.org/W2027159884","https://openalex.org/W2333804548","https://openalex.org/W2534942874","https://openalex.org/W3093450488","https://openalex.org/W2016589506","https://openalex.org/W2376702355","https://openalex.org/W4385062230","https://openalex.org/W4237709086"],"abstract_inverted_index":{"To":[0],"address":[1],"the":[2,24,30,75,146,155,161],"demand":[3],"for":[4,74],"memory":[5,167],"scaling":[6],"capabilities,":[7],"3-D":[8],"integrated":[9],"circuits":[10],"(3D-ICs)":[11],"based":[12],"on":[13],"short":[14],"and":[15,32,119,132,140,169,174],"dense":[16],"through-silicon":[17],"vias":[18],"(TSVs)":[19],"have":[20,78],"been":[21],"introduced.":[22],"However,":[23],"defects":[25,121],"of":[26,34,122],"TSVs":[27,80],"considerably":[28],"influence":[29],"yield":[31],"reliability":[33],"3D-ICs.":[35],"For":[36,109],"this":[37,50,110],"reason,":[38,111],"TSV":[39,64,98,104,149],"repair":[40,69,99,105,117,150,157],"using":[41],"switch":[42],"matrix":[43],"(SM)":[44],"topology":[45],"(TRUST)":[46],"is":[47],"proposed":[48],"in":[49,93,164],"article.":[51],"TRUST":[52,89,112,125],"adopts":[53],"an":[54],"SM,":[55],"which":[56],"has":[57],"a":[58,67,102],"high":[59,165],"routing":[60],"flexibility,":[61],"to":[62,85,96,116,145],"realize":[63],"connections.":[65],"Consequently,":[66],"100%":[68],"rate":[70],"can":[71,113,126,153],"be":[72,114,127],"achieved":[73],"3D-ICs":[76],"that":[77,152],"faulty":[79],"smaller":[81,176],"than":[82,177],"or":[83],"equal":[84],"redundant":[86],"TSVs.":[87,123],"Furthermore,":[88],"utilizes":[90],"content-addressable":[91],"memories":[92],"built-in":[94],"self-repair":[95],"identify":[97],"paths":[100],"via":[101],"simple":[103],"path":[106],"search":[107],"algorithm.":[108],"applied":[115,128],"manufacturing":[118],"aging":[120],"Nevertheless,":[124],"with":[129],"reasonable":[130],"area":[131,138,162],"delay":[133,142],"overheads,":[134],"such":[135],"as":[136],"58.3%":[137],"reduction":[139,143],"55.1%":[141],"compared":[144],"only":[147,172],"conventional":[148],"architecture":[151],"achieve":[154],"optimal":[156],"rate.":[158],"In":[159],"addition,":[160],"ratios":[163],"bandwidth":[166],"(HBM)":[168],"HBM2":[170],"are":[171,182],"5.3%":[173],"much":[175],"0.1%,":[178],"respectively.":[179],"The":[180],"advantages":[181],"experimentally":[183],"verified.":[184]},"counts_by_year":[{"year":2026,"cited_by_count":2},{"year":2025,"cited_by_count":4},{"year":2024,"cited_by_count":2},{"year":2023,"cited_by_count":1}],"updated_date":"2026-07-14T08:27:34.040176","created_date":"2025-10-10T00:00:00"}
