{"id":"https://openalex.org/W4226484922","doi":"https://doi.org/10.1109/tcad.2022.3168257","title":"Thermal and Voltage-Aware Performance Management of 3-D MPSoCs With Flow Cell Arrays and Integrated SC Converters","display_name":"Thermal and Voltage-Aware Performance Management of 3-D MPSoCs With Flow Cell Arrays and Integrated SC Converters","publication_year":2022,"publication_date":"2022-04-19","ids":{"openalex":"https://openalex.org/W4226484922","doi":"https://doi.org/10.1109/tcad.2022.3168257"},"language":"en","primary_location":{"id":"doi:10.1109/tcad.2022.3168257","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tcad.2022.3168257","pdf_url":null,"source":{"id":"https://openalex.org/S100835903","display_name":"IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems","issn_l":"0278-0070","issn":["0278-0070","1937-4151"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":true,"oa_status":"green","oa_url":"http://infoscience.epfl.ch/record/293453","any_repository_has_fulltext":true},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5055235714","display_name":"Halima Najibi","orcid":null},"institutions":[],"countries":[],"is_corresponding":true,"raw_author_name":"Halima Najibi","raw_affiliation_strings":["Embedded Systems Laboratory, &#x00C9;cole Polytechnique F&#x00E9;d&#x00E9;rale de Lausanne, Lausanne, Switzerland"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Embedded Systems Laboratory, &#x00C9;cole Polytechnique F&#x00E9;d&#x00E9;rale de Lausanne, Lausanne, Switzerland","institution_ids":[]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5090359025","display_name":"Alexandre Levisse","orcid":"https://orcid.org/0000-0002-8984-9793"},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Alexandre Levisse","raw_affiliation_strings":["Embedded Systems Laboratory, &#x00C9;cole Polytechnique F&#x00E9;d&#x00E9;rale de Lausanne, Lausanne, Switzerland"],"raw_orcid":"https://orcid.org/0000-0002-8984-9793","affiliations":[{"raw_affiliation_string":"Embedded Systems Laboratory, &#x00C9;cole Polytechnique F&#x00E9;d&#x00E9;rale de Lausanne, Lausanne, Switzerland","institution_ids":[]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5044467469","display_name":"Giovanni Ansaloni","orcid":"https://orcid.org/0000-0002-8940-3775"},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Giovanni Ansaloni","raw_affiliation_strings":["Embedded Systems Laboratory, &#x00C9;cole Polytechnique F&#x00E9;d&#x00E9;rale de Lausanne, Lausanne, Switzerland"],"raw_orcid":"https://orcid.org/0000-0002-8940-3775","affiliations":[{"raw_affiliation_string":"Embedded Systems Laboratory, &#x00C9;cole Polytechnique F&#x00E9;d&#x00E9;rale de Lausanne, Lausanne, Switzerland","institution_ids":[]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5050801793","display_name":"Marina Zapater","orcid":"https://orcid.org/0000-0002-6971-1965"},"institutions":[{"id":"https://openalex.org/I173439891","display_name":"HES-SO University of Applied Sciences and Arts Western Switzerland","ror":"https://ror.org/01xkakk17","country_code":"CH","type":"education","lineage":["https://openalex.org/I173439891"]}],"countries":["CH"],"is_corresponding":false,"raw_author_name":"Marina Zapater","raw_affiliation_strings":["REDS Institute, University of Applied Sciences Western Switzerland, Del&#x00E9;mont, Switzerland"],"raw_orcid":"https://orcid.org/0000-0002-6971-1965","affiliations":[{"raw_affiliation_string":"REDS Institute, University of Applied Sciences Western Switzerland, Del&#x00E9;mont, Switzerland","institution_ids":["https://openalex.org/I173439891"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5075577958","display_name":"Miroslav Vasi\u0107","orcid":"https://orcid.org/0000-0001-9597-6409"},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Miroslav Vasic","raw_affiliation_strings":["Centro de Electr&#x00F3;nica Industrial, Universidad Polit&#x00E9;cnica de Madrid, Madrid, Spain"],"raw_orcid":"https://orcid.org/0000-0001-9597-6409","affiliations":[{"raw_affiliation_string":"Centro de Electr&#x00F3;nica Industrial, Universidad Polit&#x00E9;cnica de Madrid, Madrid, Spain","institution_ids":[]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5074236306","display_name":"David Atienza","orcid":"https://orcid.org/0000-0001-9536-4947"},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"David Atienza","raw_affiliation_strings":["Embedded Systems Laboratory, &#x00C9;cole Polytechnique F&#x00E9;d&#x00E9;rale de Lausanne, Lausanne, Switzerland"],"raw_orcid":"https://orcid.org/0000-0001-9536-4947","affiliations":[{"raw_affiliation_string":"Embedded Systems Laboratory, &#x00C9;cole Polytechnique F&#x00E9;d&#x00E9;rale de Lausanne, Lausanne, Switzerland","institution_ids":[]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":6,"corresponding_author_ids":["https://openalex.org/A5055235714"],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":0.1847,"has_fulltext":false,"cited_by_count":2,"citation_normalized_percentile":{"value":0.46475151,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":90,"max":94},"biblio":{"volume":"42","issue":"1","first_page":"2","last_page":"15"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10502","display_name":"Advanced Memory and Neural Computing","score":0.9991999864578247,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10502","display_name":"Advanced Memory and Neural Computing","score":0.9991999864578247,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9991000294685364,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10472","display_name":"Semiconductor materials and devices","score":0.998199999332428,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/mpsoc","display_name":"MPSoC","score":0.8647162914276123},{"id":"https://openalex.org/keywords/converters","display_name":"Converters","score":0.5650249719619751},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.5260348916053772},{"id":"https://openalex.org/keywords/power-management","display_name":"Power management","score":0.5232521295547485},{"id":"https://openalex.org/keywords/system-on-a-chip","display_name":"System on a chip","score":0.5069258809089661},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.490956574678421},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.42541104555130005},{"id":"https://openalex.org/keywords/power-network-design","display_name":"Power network design","score":0.4177369773387909},{"id":"https://openalex.org/keywords/design-flow","display_name":"Design flow","score":0.41211074590682983},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.40501707792282104},{"id":"https://openalex.org/keywords/power","display_name":"Power (physics)","score":0.3861924707889557},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.2691216766834259},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.23909631371498108}],"concepts":[{"id":"https://openalex.org/C2777187653","wikidata":"https://www.wikidata.org/wiki/Q975106","display_name":"MPSoC","level":3,"score":0.8647162914276123},{"id":"https://openalex.org/C2778422915","wikidata":"https://www.wikidata.org/wiki/Q10302051","display_name":"Converters","level":3,"score":0.5650249719619751},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.5260348916053772},{"id":"https://openalex.org/C2778774385","wikidata":"https://www.wikidata.org/wiki/Q4437810","display_name":"Power management","level":3,"score":0.5232521295547485},{"id":"https://openalex.org/C118021083","wikidata":"https://www.wikidata.org/wiki/Q610398","display_name":"System on a chip","level":2,"score":0.5069258809089661},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.490956574678421},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.42541104555130005},{"id":"https://openalex.org/C164565468","wikidata":"https://www.wikidata.org/wiki/Q7236535","display_name":"Power network design","level":3,"score":0.4177369773387909},{"id":"https://openalex.org/C37135326","wikidata":"https://www.wikidata.org/wiki/Q931942","display_name":"Design flow","level":2,"score":0.41211074590682983},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.40501707792282104},{"id":"https://openalex.org/C163258240","wikidata":"https://www.wikidata.org/wiki/Q25342","display_name":"Power (physics)","level":2,"score":0.3861924707889557},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.2691216766834259},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.23909631371498108},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.0},{"id":"https://openalex.org/C62520636","wikidata":"https://www.wikidata.org/wiki/Q944","display_name":"Quantum mechanics","level":1,"score":0.0}],"mesh":[],"locations_count":3,"locations":[{"id":"doi:10.1109/tcad.2022.3168257","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tcad.2022.3168257","pdf_url":null,"source":{"id":"https://openalex.org/S100835903","display_name":"IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems","issn_l":"0278-0070","issn":["0278-0070","1937-4151"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems","raw_type":"journal-article"},{"id":"pmh:oai:hesso.tind.io:10119","is_oa":false,"landing_page_url":"https://arodes.hes-so.ch/record/10119/files/Zapater_2022_Thermal_and_Voltage-Aware_Performance_Management_of_3D_MPSoCs_with_Flow_Cell_Arrays_and_Integrated_SC_Converters.pdf","pdf_url":null,"source":{"id":"https://openalex.org/S4306402432","display_name":"ArODES (HES-SO (https://www.hes-so.ch/))","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/I4210088449","host_organization_name":"HES-SO Gen\u00e8ve","host_organization_lineage":["https://openalex.org/I4210088449"],"host_organization_lineage_names":[],"type":"repository"},"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"http://arodes.hes-so.ch/record/10119","raw_type":"Text"},{"id":"pmh:oai:infoscience.epfl.ch:293453","is_oa":true,"landing_page_url":"http://infoscience.epfl.ch/record/293453","pdf_url":null,"source":{"id":"https://openalex.org/S4306400487","display_name":"Infoscience (Ecole Polytechnique F\u00e9d\u00e9rale de Lausanne)","issn_l":null,"issn":null,"is_oa":true,"is_in_doaj":false,"is_core":false,"host_organization":null,"host_organization_name":null,"host_organization_lineage":[],"host_organization_lineage_names":[],"type":"repository"},"license":"cc-by-nc-nd","license_id":"https://openalex.org/licenses/cc-by-nc-nd","version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":null,"raw_type":"research article"}],"best_oa_location":{"id":"pmh:oai:infoscience.epfl.ch:293453","is_oa":true,"landing_page_url":"http://infoscience.epfl.ch/record/293453","pdf_url":null,"source":{"id":"https://openalex.org/S4306400487","display_name":"Infoscience (Ecole Polytechnique F\u00e9d\u00e9rale de Lausanne)","issn_l":null,"issn":null,"is_oa":true,"is_in_doaj":false,"is_core":false,"host_organization":null,"host_organization_name":null,"host_organization_lineage":[],"host_organization_lineage_names":[],"type":"repository"},"license":"cc-by-nc-nd","license_id":"https://openalex.org/licenses/cc-by-nc-nd","version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":null,"raw_type":"research article"},"sustainable_development_goals":[{"id":"https://metadata.un.org/sdg/7","display_name":"Affordable and clean energy","score":0.8799999952316284}],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":41,"referenced_works":["https://openalex.org/W1581887721","https://openalex.org/W1980173753","https://openalex.org/W1987131925","https://openalex.org/W1990884219","https://openalex.org/W2006288141","https://openalex.org/W2015237073","https://openalex.org/W2025110944","https://openalex.org/W2031449300","https://openalex.org/W2059753868","https://openalex.org/W2080592089","https://openalex.org/W2094607079","https://openalex.org/W2097766592","https://openalex.org/W2108302928","https://openalex.org/W2114727053","https://openalex.org/W2118505671","https://openalex.org/W2138302616","https://openalex.org/W2141248142","https://openalex.org/W2142760988","https://openalex.org/W2150206286","https://openalex.org/W2159643889","https://openalex.org/W2183341477","https://openalex.org/W2194775991","https://openalex.org/W2398625041","https://openalex.org/W2727094291","https://openalex.org/W2794250035","https://openalex.org/W2796645376","https://openalex.org/W2933138175","https://openalex.org/W2945969444","https://openalex.org/W2964350391","https://openalex.org/W2971747182","https://openalex.org/W2979580835","https://openalex.org/W3006667757","https://openalex.org/W3034284292","https://openalex.org/W3083254028","https://openalex.org/W3111684448","https://openalex.org/W4231907117","https://openalex.org/W4250330822","https://openalex.org/W4250815704","https://openalex.org/W6639947262","https://openalex.org/W6670852294","https://openalex.org/W6687566353"],"related_works":["https://openalex.org/W2116793508","https://openalex.org/W2051542972","https://openalex.org/W2108827571","https://openalex.org/W2072190555","https://openalex.org/W362367721","https://openalex.org/W2150187345","https://openalex.org/W2189281836","https://openalex.org/W2001832570","https://openalex.org/W4235354341","https://openalex.org/W4226484922"],"abstract_inverted_index":{"Flow":[0],"cell":[1],"arrays":[2],"(FCAs)":[3],"concurrently":[4],"provide":[5,170],"efficient":[6],"on-chip":[7],"liquid":[8,140],"cooling":[9,141],"and":[10,35,60,81,93,111,128,194,221,234],"electrochemical":[11],"power":[12,34,42,94,131,202],"generation.":[13],"This":[14],"technology":[15,115],"is":[16],"especially":[17],"promising":[18],"for":[19],"3-D":[20,98,123,175,228],"multiprocessor":[21],"systems-on-chip":[22,62],"(3-D":[23],"MPSoCs)":[24],"realized":[25],"in":[26,88,102],"deeply":[27],"scaled":[28],"technologies,":[29],"which":[30],"present":[31],"very":[32],"challenging":[33],"thermal":[36,92],"requirements.":[37],"Indeed,":[38],"FCAs":[39,147],"effectively":[40],"improve":[41],"delivery":[43,95],"network":[44],"(PDN)":[45],"performance,":[46],"particularly":[47],"if":[48],"switched":[49],"capacitor":[50],"(SC)":[51],"converters":[52,159],"are":[53],"employed":[54],"to":[55,66,136,150,173,212],"decouple":[56],"the":[57,61,73,91,118,144,165,181,227],"flow":[58],"cells":[59],"voltages,":[63],"allowing":[64],"each":[65],"operate":[67],"at":[68],"their":[69,85],"optimal":[70],"point.":[71],"Nonetheless,":[72],"design":[74,109],"of":[75,97,120,164,184,210],"FCA-based":[76],"solutions":[77],"entails":[78],"nonobvious":[79],"considerations":[80],"tradeoffs,":[82],"stemming":[83],"from":[84],"dual":[86],"role":[87],"governing":[89],"both":[90],"characteristics":[96],"MPSoCs.":[99],"Showcasing":[100],"them":[101],"this":[103,114],"article,":[104],"we":[105,189],"explore":[106],"multiple":[107],"FCA":[108],"configurations":[110],"demonstrate":[112],"that":[113,200],"can":[116],"decrease":[117],"temperature":[119,193,230],"a":[121,137,161,191],"heterogeneous":[122],"MPSoC":[124,176,229],"by":[125,133,179],"78":[126],"\u00b0C,":[127],"its":[129],"total":[130],"consumption":[132],"46%,":[134],"compared":[135],"high-performance":[138,223],"cold-plate-based":[139],"solution.":[142],"At":[143],"same":[145],"time,":[146],"enable":[148],"up":[149,211],"90%":[151],"voltage":[152,235],"drop":[153],"recovery":[154],"across":[155],"dies,":[156],"using":[157],"SC":[158],"occupying":[160],"small":[162],"fraction":[163],"chip":[166],"area.":[167],"Such":[168],"outcomes":[169],"an":[171],"opportunity":[172],"boost":[174],"computing":[177],"performance":[178],"increasing":[180],"operating":[182],"frequency":[183],"dies.":[185],"Leveraging":[186],"these":[187],"results,":[188],"introduce":[190],"novel":[192],"voltage-aware":[195],"model-predictive":[196],"control":[197],"(MPC)":[198],"strategy":[199],"optimizes":[201],"efficiency":[203],"during":[204],"runtime.":[205],"We":[206],"achieve":[207],"application-wide":[208],"speedups":[209],"16%":[213],"on":[214],"various":[215],"machine":[216],"learning":[217],"(ML),":[218],"data":[219],"mining,":[220],"other":[222],"benchmarks":[224],"while":[225],"keeping":[226],"below":[231,237],"83":[232],"\u00b0C":[233],"drops":[236],"5%.":[238]},"counts_by_year":[{"year":2024,"cited_by_count":1},{"year":2023,"cited_by_count":1}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}
