{"id":"https://openalex.org/W4225525504","doi":"https://doi.org/10.1109/tcad.2022.3157686","title":"The CoveRT Approach for Coverage Management in Analog and Mixed-Signal Integrated Circuits","display_name":"The CoveRT Approach for Coverage Management in Analog and Mixed-Signal Integrated Circuits","publication_year":2022,"publication_date":"2022-03-08","ids":{"openalex":"https://openalex.org/W4225525504","doi":"https://doi.org/10.1109/tcad.2022.3157686"},"language":"en","primary_location":{"id":"doi:10.1109/tcad.2022.3157686","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tcad.2022.3157686","pdf_url":null,"source":{"id":"https://openalex.org/S100835903","display_name":"IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems","issn_l":"0278-0070","issn":["0278-0070","1937-4151"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5080012092","display_name":"S. Sanyal","orcid":"https://orcid.org/0000-0002-6652-9113"},"institutions":[{"id":"https://openalex.org/I145894827","display_name":"Indian Institute of Technology Kharagpur","ror":"https://ror.org/03w5sq511","country_code":"IN","type":"education","lineage":["https://openalex.org/I145894827"]}],"countries":["IN"],"is_corresponding":false,"raw_author_name":"Sayandeep Sanyal","raw_affiliation_strings":["Department of Computer Science and Engineering, Indian Institute of Technology Kharagpur, Kharagpur, India"],"raw_orcid":"https://orcid.org/0000-0002-6652-9113","affiliations":[{"raw_affiliation_string":"Department of Computer Science and Engineering, Indian Institute of Technology Kharagpur, Kharagpur, India","institution_ids":["https://openalex.org/I145894827"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5033329960","display_name":"Pallab Dasgupta","orcid":"https://orcid.org/0000-0002-2178-8154"},"institutions":[{"id":"https://openalex.org/I145894827","display_name":"Indian Institute of Technology Kharagpur","ror":"https://ror.org/03w5sq511","country_code":"IN","type":"education","lineage":["https://openalex.org/I145894827"]}],"countries":["IN"],"is_corresponding":false,"raw_author_name":"Pallab Dasgupta","raw_affiliation_strings":["Department of Computer Science and Engineering, Indian Institute of Technology Kharagpur, Kharagpur, India"],"raw_orcid":"https://orcid.org/0000-0002-2178-8154","affiliations":[{"raw_affiliation_string":"Department of Computer Science and Engineering, Indian Institute of Technology Kharagpur, Kharagpur, India","institution_ids":["https://openalex.org/I145894827"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5022880201","display_name":"Aritra Hazra","orcid":"https://orcid.org/0000-0003-2076-3577"},"institutions":[{"id":"https://openalex.org/I145894827","display_name":"Indian Institute of Technology Kharagpur","ror":"https://ror.org/03w5sq511","country_code":"IN","type":"education","lineage":["https://openalex.org/I145894827"]}],"countries":["IN"],"is_corresponding":false,"raw_author_name":"Aritra Hazra","raw_affiliation_strings":["Department of Computer Science and Engineering, Indian Institute of Technology Kharagpur, Kharagpur, India"],"raw_orcid":"https://orcid.org/0000-0003-2076-3577","affiliations":[{"raw_affiliation_string":"Department of Computer Science and Engineering, Indian Institute of Technology Kharagpur, Kharagpur, India","institution_ids":["https://openalex.org/I145894827"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5000985364","display_name":"Sourav Das","orcid":"https://orcid.org/0000-0001-9514-141X"},"institutions":[{"id":"https://openalex.org/I145894827","display_name":"Indian Institute of Technology Kharagpur","ror":"https://ror.org/03w5sq511","country_code":"IN","type":"education","lineage":["https://openalex.org/I145894827"]}],"countries":["IN"],"is_corresponding":false,"raw_author_name":"Sourav Das","raw_affiliation_strings":["Department of Computer Science and Engineering, Indian Institute of Technology Kharagpur, Kharagpur, India"],"raw_orcid":"https://orcid.org/0000-0001-9514-141X","affiliations":[{"raw_affiliation_string":"Department of Computer Science and Engineering, Indian Institute of Technology Kharagpur, Kharagpur, India","institution_ids":["https://openalex.org/I145894827"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5082777109","display_name":"Scott Morrison","orcid":"https://orcid.org/0000-0003-4918-4552"},"institutions":[{"id":"https://openalex.org/I74760111","display_name":"Texas Instruments (United States)","ror":"https://ror.org/03vsmv677","country_code":"US","type":"company","lineage":["https://openalex.org/I74760111"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Scott Morrison","raw_affiliation_strings":["Custom SC ACS, Texas Instruments, Dallas, TX, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Custom SC ACS, Texas Instruments, Dallas, TX, USA","institution_ids":["https://openalex.org/I74760111"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5040810102","display_name":"Sudhakar Surendran","orcid":null},"institutions":[{"id":"https://openalex.org/I4210109535","display_name":"Texas Instruments (India)","ror":"https://ror.org/01t305n31","country_code":"IN","type":"company","lineage":["https://openalex.org/I4210109535","https://openalex.org/I74760111"]}],"countries":["IN"],"is_corresponding":false,"raw_author_name":"Sudhakar Surendran","raw_affiliation_strings":["MSP-EP, Texas Instruments (India) Pvt. Ltd., Bengaluru, India"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"MSP-EP, Texas Instruments (India) Pvt. Ltd., Bengaluru, India","institution_ids":["https://openalex.org/I4210109535"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5088184974","display_name":"Lakshmanan Balasubramanian","orcid":"https://orcid.org/0000-0002-3883-820X"},"institutions":[{"id":"https://openalex.org/I4210109535","display_name":"Texas Instruments (India)","ror":"https://ror.org/01t305n31","country_code":"IN","type":"company","lineage":["https://openalex.org/I4210109535","https://openalex.org/I74760111"]}],"countries":["IN"],"is_corresponding":false,"raw_author_name":"Lakshmanan Balasubramanian","raw_affiliation_strings":["Embedded Processing—Connectivity HW, Texas Instruments (India) Pvt. Ltd., Bengaluru, India"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Embedded Processing—Connectivity HW, Texas Instruments (India) Pvt. Ltd., Bengaluru, India","institution_ids":["https://openalex.org/I4210109535"]}]}],"institutions":[],"countries_distinct_count":2,"institutions_distinct_count":7,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":0.2333,"has_fulltext":false,"cited_by_count":1,"citation_normalized_percentile":{"value":0.47401434,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":90,"max":94},"biblio":{"volume":"41","issue":"12","first_page":"5695","last_page":"5708"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11005","display_name":"Radiation Effects in Electronics","score":0.9993000030517578,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T12122","display_name":"Physical Unclonable Functions (PUFs) and Hardware Security","score":0.9991000294685364,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.7155633568763733},{"id":"https://openalex.org/keywords/context","display_name":"Context (archaeology)","score":0.6424057483673096},{"id":"https://openalex.org/keywords/key","display_name":"Key (lock)","score":0.574448823928833},{"id":"https://openalex.org/keywords/covert","display_name":"Covert","score":0.5586446523666382},{"id":"https://openalex.org/keywords/mixed-signal-integrated-circuit","display_name":"Mixed-signal integrated circuit","score":0.5487062931060791},{"id":"https://openalex.org/keywords/hierarchy","display_name":"Hierarchy","score":0.5438173413276672},{"id":"https://openalex.org/keywords/integrated-circuit","display_name":"Integrated circuit","score":0.26169854402542114},{"id":"https://openalex.org/keywords/computer-security","display_name":"Computer security","score":0.1374710500240326}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7155633568763733},{"id":"https://openalex.org/C2779343474","wikidata":"https://www.wikidata.org/wiki/Q3109175","display_name":"Context (archaeology)","level":2,"score":0.6424057483673096},{"id":"https://openalex.org/C26517878","wikidata":"https://www.wikidata.org/wiki/Q228039","display_name":"Key (lock)","level":2,"score":0.574448823928833},{"id":"https://openalex.org/C2779338814","wikidata":"https://www.wikidata.org/wiki/Q5179285","display_name":"Covert","level":2,"score":0.5586446523666382},{"id":"https://openalex.org/C62907940","wikidata":"https://www.wikidata.org/wiki/Q1541329","display_name":"Mixed-signal integrated circuit","level":3,"score":0.5487062931060791},{"id":"https://openalex.org/C31170391","wikidata":"https://www.wikidata.org/wiki/Q188619","display_name":"Hierarchy","level":2,"score":0.5438173413276672},{"id":"https://openalex.org/C530198007","wikidata":"https://www.wikidata.org/wiki/Q80831","display_name":"Integrated circuit","level":2,"score":0.26169854402542114},{"id":"https://openalex.org/C38652104","wikidata":"https://www.wikidata.org/wiki/Q3510521","display_name":"Computer security","level":1,"score":0.1374710500240326},{"id":"https://openalex.org/C151730666","wikidata":"https://www.wikidata.org/wiki/Q7205","display_name":"Paleontology","level":1,"score":0.0},{"id":"https://openalex.org/C41895202","wikidata":"https://www.wikidata.org/wiki/Q8162","display_name":"Linguistics","level":1,"score":0.0},{"id":"https://openalex.org/C34447519","wikidata":"https://www.wikidata.org/wiki/Q179522","display_name":"Market economy","level":1,"score":0.0},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.0},{"id":"https://openalex.org/C86803240","wikidata":"https://www.wikidata.org/wiki/Q420","display_name":"Biology","level":0,"score":0.0},{"id":"https://openalex.org/C162324750","wikidata":"https://www.wikidata.org/wiki/Q8134","display_name":"Economics","level":0,"score":0.0},{"id":"https://openalex.org/C138885662","wikidata":"https://www.wikidata.org/wiki/Q5891","display_name":"Philosophy","level":0,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/tcad.2022.3157686","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tcad.2022.3157686","pdf_url":null,"source":{"id":"https://openalex.org/S100835903","display_name":"IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems","issn_l":"0278-0070","issn":["0278-0070","1937-4151"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[{"score":0.550000011920929,"id":"https://metadata.un.org/sdg/9","display_name":"Industry, innovation and infrastructure"}],"awards":[{"id":"https://openalex.org/G4504841256","display_name":null,"funder_award_id":"GRC Task ID 2810.019","funder_id":"https://openalex.org/F4320306087","funder_display_name":"Semiconductor Research Corporation"}],"funders":[{"id":"https://openalex.org/F4320306087","display_name":"Semiconductor Research Corporation","ror":"https://ror.org/047z4n946"}],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":22,"referenced_works":["https://openalex.org/W1508536183","https://openalex.org/W1578823551","https://openalex.org/W2047080991","https://openalex.org/W2051874670","https://openalex.org/W2053451635","https://openalex.org/W2056647128","https://openalex.org/W2153450600","https://openalex.org/W2172085120","https://openalex.org/W2330860045","https://openalex.org/W2343845377","https://openalex.org/W2345780204","https://openalex.org/W2600352774","https://openalex.org/W2735991644","https://openalex.org/W2736049698","https://openalex.org/W2795807184","https://openalex.org/W2886348639","https://openalex.org/W2895557151","https://openalex.org/W3013723120","https://openalex.org/W3033733218","https://openalex.org/W3108121382","https://openalex.org/W6663796909","https://openalex.org/W6741147654"],"related_works":["https://openalex.org/W2523525694","https://openalex.org/W2998642566","https://openalex.org/W2392682561","https://openalex.org/W57793151","https://openalex.org/W2727423897","https://openalex.org/W2497612952","https://openalex.org/W4247948804","https://openalex.org/W2804882289","https://openalex.org/W2392053643","https://openalex.org/W2595182909"],"abstract_inverted_index":{"Coverage":[0],"is":[1,37],"a":[2,64],"key":[3],"indicator":[4],"for":[5],"verification":[6,8,11,35,97],"progress,":[7],"closure,":[9],"and":[10,62],"sign-off":[12],"in":[13,40,48,93,102],"an":[14],"integrated":[15],"circuit":[16],"design.":[17],"The":[18],"notion":[19],"of":[20,26,59,84,95],"coverage":[21,27,61,66,86],"management,":[22],"namely,":[23],"the":[24,30,41,49,56,82,89],"use":[25],"information":[28],"across":[29,88],"design":[31,90,104],"hierarchy":[32],"to":[33],"identify":[34],"loopholes,":[36],"well":[38,100],"understood":[39],"digital":[42],"context,":[43],"but":[44],"requires":[45],"considerable":[46],"disambiguation":[47],"analog/mixed-signal":[50],"(AMS)":[51],"context.":[52],"This":[53],"article":[54],"develops":[55],"core":[57],"artifacts":[58],"AMS":[60,85],"presents":[63],"comprehensive":[65],"management":[67,87],"approach":[68],"based":[69],"on":[70],"our":[71],"tool,":[72],"CoveRT.":[73],"Our":[74],"results,":[75],"gleaned":[76],"from":[77],"live":[78],"industrial":[79],"designs,":[80],"demonstrate":[81],"benefits":[83],"hierarchy,":[91],"both":[92],"terms":[94],"identifying":[96],"gaps,":[98],"as":[99,101],"finding":[103],"bugs.":[105]},"counts_by_year":[{"year":2023,"cited_by_count":1}],"updated_date":"2026-06-11T09:08:48.828518","created_date":"2025-10-10T00:00:00"}