{"id":"https://openalex.org/W3188508394","doi":"https://doi.org/10.1109/tcad.2021.3101464","title":"OCC: An Automated End-to-End Machine Learning Optimizing Compiler for Computing-In-Memory","display_name":"OCC: An Automated End-to-End Machine Learning Optimizing Compiler for Computing-In-Memory","publication_year":2021,"publication_date":"2021-08-02","ids":{"openalex":"https://openalex.org/W3188508394","doi":"https://doi.org/10.1109/tcad.2021.3101464","mag":"3188508394"},"language":"en","primary_location":{"id":"doi:10.1109/tcad.2021.3101464","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tcad.2021.3101464","pdf_url":null,"source":{"id":"https://openalex.org/S100835903","display_name":"IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems","issn_l":"0278-0070","issn":["0278-0070","1937-4151"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":true,"oa_status":"green","oa_url":"https://pure.tue.nl/ws/files/328202256/OCC_An_Automated_End-to-End_Machine_Learning_Optimizing_Compiler_for_Computing-In-Memory.pdf","any_repository_has_fulltext":true},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5065192709","display_name":"Adam Siemieniuk","orcid":"https://orcid.org/0000-0001-9226-0181"},"institutions":[{"id":"https://openalex.org/I83019370","display_name":"Eindhoven University of Technology","ror":"https://ror.org/02c2kyt77","country_code":"NL","type":"education","lineage":["https://openalex.org/I83019370"]}],"countries":["NL"],"is_corresponding":false,"raw_author_name":"Adam Siemieniuk","raw_affiliation_strings":["Department of Electrical Engineering, Technische Universiteit Eindhoven, Eindhoven, AZ, The Netherlands"],"raw_orcid":"https://orcid.org/0000-0001-9226-0181","affiliations":[{"raw_affiliation_string":"Department of Electrical Engineering, Technische Universiteit Eindhoven, Eindhoven, AZ, The Netherlands","institution_ids":["https://openalex.org/I83019370"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5051728690","display_name":"Lorenzo Chelini","orcid":"https://orcid.org/0000-0001-8539-2397"},"institutions":[{"id":"https://openalex.org/I83019370","display_name":"Eindhoven University of Technology","ror":"https://ror.org/02c2kyt77","country_code":"NL","type":"education","lineage":["https://openalex.org/I83019370"]}],"countries":["NL"],"is_corresponding":false,"raw_author_name":"Lorenzo Chelini","raw_affiliation_strings":["Department of Electrical Engineering, Technische Universiteit Eindhoven, Eindhoven, AZ, The Netherlands"],"raw_orcid":"https://orcid.org/0000-0001-8539-2397","affiliations":[{"raw_affiliation_string":"Department of Electrical Engineering, Technische Universiteit Eindhoven, Eindhoven, AZ, The Netherlands","institution_ids":["https://openalex.org/I83019370"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5090070224","display_name":"Asif Ali Khan","orcid":"https://orcid.org/0000-0002-5130-9855"},"institutions":[{"id":"https://openalex.org/I78650965","display_name":"Technische Universit\u00e4t Dresden","ror":"https://ror.org/042aqky30","country_code":"DE","type":"education","lineage":["https://openalex.org/I78650965"]}],"countries":["DE"],"is_corresponding":false,"raw_author_name":"Asif Ali Khan","raw_affiliation_strings":["Department of Computer Science, Dresden University of Technology, Dresden, Germany"],"raw_orcid":"https://orcid.org/0000-0002-5130-9855","affiliations":[{"raw_affiliation_string":"Department of Computer Science, Dresden University of Technology, Dresden, Germany","institution_ids":["https://openalex.org/I78650965"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5030115692","display_name":"Jer\u00f3nimo Castrill\u00f3n","orcid":"https://orcid.org/0000-0002-5007-445X"},"institutions":[{"id":"https://openalex.org/I78650965","display_name":"Technische Universit\u00e4t Dresden","ror":"https://ror.org/042aqky30","country_code":"DE","type":"education","lineage":["https://openalex.org/I78650965"]}],"countries":["DE"],"is_corresponding":false,"raw_author_name":"Jeronimo Castrillon","raw_affiliation_strings":["Department of Computer Science, Dresden University of Technology, Dresden, Germany"],"raw_orcid":"https://orcid.org/0000-0002-5007-445X","affiliations":[{"raw_affiliation_string":"Department of Computer Science, Dresden University of Technology, Dresden, Germany","institution_ids":["https://openalex.org/I78650965"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5084849650","display_name":"Andi Drebes","orcid":null},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Andi Drebes","raw_affiliation_strings":["Inria, &#x00C9;cole Normale Sup&#x00E9;rieure, Paris, France"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Inria, &#x00C9;cole Normale Sup&#x00E9;rieure, Paris, France","institution_ids":[]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5081768631","display_name":"Henk Corporaal","orcid":"https://orcid.org/0000-0003-4506-5732"},"institutions":[{"id":"https://openalex.org/I83019370","display_name":"Eindhoven University of Technology","ror":"https://ror.org/02c2kyt77","country_code":"NL","type":"education","lineage":["https://openalex.org/I83019370"]}],"countries":["NL"],"is_corresponding":false,"raw_author_name":"Henk Corporaal","raw_affiliation_strings":["Department of Electrical Engineering, Technische Universiteit Eindhoven, Eindhoven, AZ, The Netherlands"],"raw_orcid":"https://orcid.org/0000-0003-4506-5732","affiliations":[{"raw_affiliation_string":"Department of Electrical Engineering, Technische Universiteit Eindhoven, Eindhoven, AZ, The Netherlands","institution_ids":["https://openalex.org/I83019370"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5055618037","display_name":"Tobias Grosser","orcid":"https://orcid.org/0000-0003-3874-6003"},"institutions":[{"id":"https://openalex.org/I98677209","display_name":"University of Edinburgh","ror":"https://ror.org/01nrxwf90","country_code":"GB","type":"education","lineage":["https://openalex.org/I98677209"]}],"countries":["GB"],"is_corresponding":false,"raw_author_name":"Tobias Grosser","raw_affiliation_strings":["School of Informatics, University of Edinburgh, Edinburgh, U.K"],"raw_orcid":"https://orcid.org/0000-0003-3874-6003","affiliations":[{"raw_affiliation_string":"School of Informatics, University of Edinburgh, Edinburgh, U.K","institution_ids":["https://openalex.org/I98677209"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5048530008","display_name":"Martin Kong","orcid":"https://orcid.org/0000-0001-8008-0220"},"institutions":[{"id":"https://openalex.org/I8692664","display_name":"University of Oklahoma","ror":"https://ror.org/02aqsxs83","country_code":"US","type":"education","lineage":["https://openalex.org/I8692664"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Martin Kong","raw_affiliation_strings":["School of Computer Science, University of Oklahoma, Norman, OK, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"School of Computer Science, University of Oklahoma, Norman, OK, USA","institution_ids":["https://openalex.org/I8692664"]}]}],"institutions":[],"countries_distinct_count":4,"institutions_distinct_count":8,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":1.9324,"has_fulltext":true,"cited_by_count":30,"citation_normalized_percentile":{"value":0.86140687,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":90,"max":100},"biblio":{"volume":"41","issue":"6","first_page":"1674","last_page":"1686"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10502","display_name":"Advanced Memory and Neural Computing","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10502","display_name":"Advanced Memory and Neural Computing","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T12808","display_name":"Ferroelectric and Negative Capacitance Devices","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.998199999332428,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.8476840257644653},{"id":"https://openalex.org/keywords/compiler","display_name":"Compiler","score":0.7853636741638184},{"id":"https://openalex.org/keywords/memristor","display_name":"Memristor","score":0.6535141468048096},{"id":"https://openalex.org/keywords/von-neumann-architecture","display_name":"Von Neumann architecture","score":0.5963078141212463},{"id":"https://openalex.org/keywords/crossbar-switch","display_name":"Crossbar switch","score":0.5211330056190491},{"id":"https://openalex.org/keywords/abstraction","display_name":"Abstraction","score":0.5144984722137451},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.46844106912612915},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.4402417540550232},{"id":"https://openalex.org/keywords/domain-specific-language","display_name":"Domain-specific language","score":0.42882055044174194},{"id":"https://openalex.org/keywords/programming-language","display_name":"Programming language","score":0.3895699083805084}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.8476840257644653},{"id":"https://openalex.org/C169590947","wikidata":"https://www.wikidata.org/wiki/Q47506","display_name":"Compiler","level":2,"score":0.7853636741638184},{"id":"https://openalex.org/C150072547","wikidata":"https://www.wikidata.org/wiki/Q212923","display_name":"Memristor","level":2,"score":0.6535141468048096},{"id":"https://openalex.org/C80469333","wikidata":"https://www.wikidata.org/wiki/Q189088","display_name":"Von Neumann architecture","level":2,"score":0.5963078141212463},{"id":"https://openalex.org/C29984679","wikidata":"https://www.wikidata.org/wiki/Q1929149","display_name":"Crossbar switch","level":2,"score":0.5211330056190491},{"id":"https://openalex.org/C124304363","wikidata":"https://www.wikidata.org/wiki/Q673661","display_name":"Abstraction","level":2,"score":0.5144984722137451},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.46844106912612915},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.4402417540550232},{"id":"https://openalex.org/C135257023","wikidata":"https://www.wikidata.org/wiki/Q691358","display_name":"Domain-specific language","level":2,"score":0.42882055044174194},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.3895699083805084},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.0},{"id":"https://openalex.org/C111472728","wikidata":"https://www.wikidata.org/wiki/Q9471","display_name":"Epistemology","level":1,"score":0.0},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.0},{"id":"https://openalex.org/C138885662","wikidata":"https://www.wikidata.org/wiki/Q5891","display_name":"Philosophy","level":0,"score":0.0},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.0}],"mesh":[],"locations_count":2,"locations":[{"id":"doi:10.1109/tcad.2021.3101464","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tcad.2021.3101464","pdf_url":null,"source":{"id":"https://openalex.org/S100835903","display_name":"IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems","issn_l":"0278-0070","issn":["0278-0070","1937-4151"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems","raw_type":"journal-article"},{"id":"pmh:oai:pure.tue.nl:openaire_cris_publications/9223854d-facf-4a2a-b6f0-e67008f07639","is_oa":true,"landing_page_url":"https://research.tue.nl/en/publications/9223854d-facf-4a2a-b6f0-e67008f07639","pdf_url":"https://pure.tue.nl/ws/files/328202256/OCC_An_Automated_End-to-End_Machine_Learning_Optimizing_Compiler_for_Computing-In-Memory.pdf","source":{"id":"https://openalex.org/S4406922641","display_name":"TU/e Research Portal","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":null,"host_organization_name":null,"host_organization_lineage":[],"host_organization_lineage_names":[],"type":"repository"},"license":"other-oa","license_id":"https://openalex.org/licenses/other-oa","version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"Siemieniuk, A, Chelini, L, Khan, A A, Castrillon, J, Drebes, A, Corporaal, H, Grosser, T & Kong, M 2022, 'OCC : An Automated End-to-End Machine Learning Optimizing Compiler for Computing-In-Memory', IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, vol. 41, no. 6, 9502921, pp. 1674-1686. https://doi.org/10.1109/TCAD.2021.3101464","raw_type":"info:eu-repo/semantics/publishedVersion"}],"best_oa_location":{"id":"pmh:oai:pure.tue.nl:openaire_cris_publications/9223854d-facf-4a2a-b6f0-e67008f07639","is_oa":true,"landing_page_url":"https://research.tue.nl/en/publications/9223854d-facf-4a2a-b6f0-e67008f07639","pdf_url":"https://pure.tue.nl/ws/files/328202256/OCC_An_Automated_End-to-End_Machine_Learning_Optimizing_Compiler_for_Computing-In-Memory.pdf","source":{"id":"https://openalex.org/S4406922641","display_name":"TU/e Research Portal","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":null,"host_organization_name":null,"host_organization_lineage":[],"host_organization_lineage_names":[],"type":"repository"},"license":"other-oa","license_id":"https://openalex.org/licenses/other-oa","version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"Siemieniuk, A, Chelini, L, Khan, A A, Castrillon, J, Drebes, A, Corporaal, H, Grosser, T & Kong, M 2022, 'OCC : An Automated End-to-End Machine Learning Optimizing Compiler for Computing-In-Memory', IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, vol. 41, no. 6, 9502921, pp. 1674-1686. https://doi.org/10.1109/TCAD.2021.3101464","raw_type":"info:eu-repo/semantics/publishedVersion"},"sustainable_development_goals":[],"awards":[{"id":"https://openalex.org/G6228799060","display_name":null,"funder_award_id":"676240","funder_id":"https://openalex.org/F4320320300","funder_display_name":"European Commission"},{"id":"https://openalex.org/G778160037","display_name":"Computation-in-memory architecture based on resistive devices","funder_award_id":"780215","funder_id":"https://openalex.org/F4320320300","funder_display_name":"European Commission"}],"funders":[{"id":"https://openalex.org/F4320320300","display_name":"European Commission","ror":"https://ror.org/00k4n6c32"}],"has_content":{"grobid_xml":true,"pdf":true},"content_urls":{"pdf":"https://content.openalex.org/works/W3188508394.pdf","grobid_xml":"https://content.openalex.org/works/W3188508394.grobid-xml"},"referenced_works_count":43,"referenced_works":["https://openalex.org/W2078260102","https://openalex.org/W2112753327","https://openalex.org/W2128344236","https://openalex.org/W2154612269","https://openalex.org/W2159846564","https://openalex.org/W2170382128","https://openalex.org/W2331737637","https://openalex.org/W2396622873","https://openalex.org/W2412412865","https://openalex.org/W2508602506","https://openalex.org/W2518281301","https://openalex.org/W2519091744","https://openalex.org/W2605739168","https://openalex.org/W2606722458","https://openalex.org/W2613989746","https://openalex.org/W2768057307","https://openalex.org/W2794243109","https://openalex.org/W2798956872","https://openalex.org/W2804032941","https://openalex.org/W2886885214","https://openalex.org/W2889448077","https://openalex.org/W2912296468","https://openalex.org/W2913104037","https://openalex.org/W2948661249","https://openalex.org/W2963137752","https://openalex.org/W2966740705","https://openalex.org/W2979365412","https://openalex.org/W2981474208","https://openalex.org/W3000311589","https://openalex.org/W3036184137","https://openalex.org/W3043516086","https://openalex.org/W3047109430","https://openalex.org/W3099470245","https://openalex.org/W3101272433","https://openalex.org/W3101306829","https://openalex.org/W3119933723","https://openalex.org/W3122286897","https://openalex.org/W3196320218","https://openalex.org/W4243519499","https://openalex.org/W4254672563","https://openalex.org/W4302296459","https://openalex.org/W6751349269","https://openalex.org/W6773852563"],"related_works":["https://openalex.org/W2015497999","https://openalex.org/W3164474614","https://openalex.org/W2171130799","https://openalex.org/W2005875039","https://openalex.org/W2015477599","https://openalex.org/W2144085790","https://openalex.org/W2548135880","https://openalex.org/W3177379469","https://openalex.org/W2516929886","https://openalex.org/W4253441086"],"abstract_inverted_index":{"Memristive":[0],"devices":[1,30],"promise":[2,34],"an":[3,61],"alternative":[4],"approach":[5],"toward":[6],"non-Von":[7],"Neumann":[8],"architectures,":[9,55],"where":[10,96],"specific":[11,74],"computational":[12],"tasks":[13],"are":[14],"performed":[15],"within":[16],"the":[17,21,77,82,88,109],"memory":[18],"devices.":[19],"In":[20,113],"machine":[22],"learning":[23],"(ML)":[24],"domain,":[25],"crossbar":[26,78],"arrays":[27],"of":[28,44,52,73,84,93,99],"resistive":[29],"have":[31,60],"shown":[32],"great":[33],"for":[35,41,126],"ML":[36,131],"inference,":[37],"as":[38,65],"they":[39],"allow":[40],"hardware":[42,136],"acceleration":[43],"matrix":[45],"multiplications.":[46],"But,":[47],"to":[48,59,67,133],"enable":[49],"widespread":[50],"adoption":[51],"these":[53],"novel":[54],"it":[56],"is":[57],"critical":[58],"automatic":[62],"compilation":[63],"flow":[64],"opposed":[66],"relying":[68],"on":[69,76],"a":[70,97,117,123],"manual":[71],"mapping":[72],"kernels":[75],"arrays.":[79],"We":[80],"demonstrate":[81],"programmability":[83],"memristor-based":[85,135],"accelerators":[86],"using":[87],"new":[89],"compiler":[90],"design":[91],"principle":[92],"multilevel":[94],"rewriting,":[95],"hierarchy":[98],"abstractions":[100],"lowers":[101,122],"programs":[102],"level-by-level":[103],"and":[104],"perform":[105],"code":[106],"transformations":[107],"at":[108],"most":[110],"suitable":[111],"abstraction.":[112],"particular,":[114],"we":[115],"develop":[116],"prototype":[118],"compiler,":[119],"which":[120],"progressively":[121],"mathematical":[124],"notation":[125],"tensor":[127],"operations":[128],"arising":[129],"in":[130],"workloads,":[132],"fixed-function":[134],"blocks.":[137]},"counts_by_year":[{"year":2026,"cited_by_count":5},{"year":2025,"cited_by_count":6},{"year":2024,"cited_by_count":10},{"year":2023,"cited_by_count":8},{"year":2022,"cited_by_count":1}],"updated_date":"2026-06-11T09:08:48.828518","created_date":"2025-10-10T00:00:00"}
