{"id":"https://openalex.org/W4232601843","doi":"https://doi.org/10.1109/tcad.2021.3076970","title":"DEVoT: Dynamic Delay Modeling of Functional Units Under Voltage and Temperature Variations","display_name":"DEVoT: Dynamic Delay Modeling of Functional Units Under Voltage and Temperature Variations","publication_year":2021,"publication_date":"2021-04-30","ids":{"openalex":"https://openalex.org/W4232601843","doi":"https://doi.org/10.1109/tcad.2021.3076970"},"language":"en","primary_location":{"id":"doi:10.1109/tcad.2021.3076970","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tcad.2021.3076970","pdf_url":null,"source":{"id":"https://openalex.org/S100835903","display_name":"IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems","issn_l":"0278-0070","issn":["0278-0070","1937-4151"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5033356396","display_name":"Dongning Ma","orcid":"https://orcid.org/0000-0002-1879-4406"},"institutions":[{"id":"https://openalex.org/I7863295","display_name":"Villanova University","ror":"https://ror.org/02g7kd627","country_code":"US","type":"education","lineage":["https://openalex.org/I7863295"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Dongning Ma","raw_affiliation_strings":["Department of Electrical and Computer Engineering, Villanova University, Villanova, PA, USA"],"raw_orcid":"https://orcid.org/0000-0002-1879-4406","affiliations":[{"raw_affiliation_string":"Department of Electrical and Computer Engineering, Villanova University, Villanova, PA, USA","institution_ids":["https://openalex.org/I7863295"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5010458097","display_name":"Xinqiao Zhang","orcid":"https://orcid.org/0000-0002-2785-2321"},"institutions":[{"id":"https://openalex.org/I26538001","display_name":"San Diego State University","ror":"https://ror.org/0264fdx42","country_code":"US","type":"education","lineage":["https://openalex.org/I26538001"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Xinqiao Zhang","raw_affiliation_strings":["Department of Electrical and Computer Engineering, San Diego State University, San Diego, CA, USA"],"raw_orcid":"https://orcid.org/0000-0002-2785-2321","affiliations":[{"raw_affiliation_string":"Department of Electrical and Computer Engineering, San Diego State University, San Diego, CA, USA","institution_ids":["https://openalex.org/I26538001"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5101967980","display_name":"Ke Huang","orcid":"https://orcid.org/0000-0002-1587-9877"},"institutions":[{"id":"https://openalex.org/I26538001","display_name":"San Diego State University","ror":"https://ror.org/0264fdx42","country_code":"US","type":"education","lineage":["https://openalex.org/I26538001"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Ke Huang","raw_affiliation_strings":["Department of Electrical and Computer Engineering, San Diego State University, San Diego, CA, USA"],"raw_orcid":"https://orcid.org/0000-0002-1587-9877","affiliations":[{"raw_affiliation_string":"Department of Electrical and Computer Engineering, San Diego State University, San Diego, CA, USA","institution_ids":["https://openalex.org/I26538001"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5060117799","display_name":"Yu Jiang","orcid":"https://orcid.org/0000-0003-0955-503X"},"institutions":[{"id":"https://openalex.org/I99065089","display_name":"Tsinghua University","ror":"https://ror.org/03cve4549","country_code":"CN","type":"education","lineage":["https://openalex.org/I99065089"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Yu Jiang","raw_affiliation_strings":["School of Software, Tsinghua University, Beijing, China"],"raw_orcid":"https://orcid.org/0000-0003-0955-503X","affiliations":[{"raw_affiliation_string":"School of Software, Tsinghua University, Beijing, China","institution_ids":["https://openalex.org/I99065089"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5072023674","display_name":"Wanli Chang","orcid":"https://orcid.org/0000-0002-4053-8898"},"institutions":[{"id":"https://openalex.org/I16609230","display_name":"Hunan University","ror":"https://ror.org/05htk5m33","country_code":"CN","type":"education","lineage":["https://openalex.org/I16609230"]},{"id":"https://openalex.org/I52099693","display_name":"University of York","ror":"https://ror.org/04m01e293","country_code":"GB","type":"education","lineage":["https://openalex.org/I52099693"]}],"countries":["CN","GB"],"is_corresponding":false,"raw_author_name":"Wanli Chang","raw_affiliation_strings":["College of Computer Science and Electronic Engineering, Hunan University, Changsha, China","Department of Computer Science, University of York, York, U.K"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"College of Computer Science and Electronic Engineering, Hunan University, Changsha, China","institution_ids":["https://openalex.org/I16609230"]},{"raw_affiliation_string":"Department of Computer Science, University of York, York, U.K","institution_ids":["https://openalex.org/I52099693"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5016146461","display_name":"Xun Jiao","orcid":"https://orcid.org/0000-0003-4476-2501"},"institutions":[{"id":"https://openalex.org/I7863295","display_name":"Villanova University","ror":"https://ror.org/02g7kd627","country_code":"US","type":"education","lineage":["https://openalex.org/I7863295"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Xun Jiao","raw_affiliation_strings":["Department of Electrical and Computer Engineering, Villanova University, Villanova, PA, USA"],"raw_orcid":"https://orcid.org/0000-0003-4476-2501","affiliations":[{"raw_affiliation_string":"Department of Electrical and Computer Engineering, Villanova University, Villanova, PA, USA","institution_ids":["https://openalex.org/I7863295"]}]}],"institutions":[],"countries_distinct_count":3,"institutions_distinct_count":5,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":0.5628,"has_fulltext":false,"cited_by_count":10,"citation_normalized_percentile":{"value":0.6327415,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":94,"max":97},"biblio":{"volume":"41","issue":"4","first_page":"827","last_page":"839"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10472","display_name":"Semiconductor materials and devices","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/microelectronics","display_name":"Microelectronics","score":0.6742401123046875},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.6433119773864746},{"id":"https://openalex.org/keywords/workload","display_name":"Workload","score":0.6065685749053955},{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.5422786474227905},{"id":"https://openalex.org/keywords/electronic-circuit","display_name":"Electronic circuit","score":0.5123344659805298},{"id":"https://openalex.org/keywords/integrated-circuit","display_name":"Integrated circuit","score":0.4283328652381897},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.2847292423248291},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.1700325310230255},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.13869711756706238}],"concepts":[{"id":"https://openalex.org/C187937830","wikidata":"https://www.wikidata.org/wiki/Q175403","display_name":"Microelectronics","level":2,"score":0.6742401123046875},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.6433119773864746},{"id":"https://openalex.org/C2778476105","wikidata":"https://www.wikidata.org/wiki/Q628539","display_name":"Workload","level":2,"score":0.6065685749053955},{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.5422786474227905},{"id":"https://openalex.org/C134146338","wikidata":"https://www.wikidata.org/wiki/Q1815901","display_name":"Electronic circuit","level":2,"score":0.5123344659805298},{"id":"https://openalex.org/C530198007","wikidata":"https://www.wikidata.org/wiki/Q80831","display_name":"Integrated circuit","level":2,"score":0.4283328652381897},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.2847292423248291},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.1700325310230255},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.13869711756706238},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/tcad.2021.3076970","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tcad.2021.3076970","pdf_url":null,"source":{"id":"https://openalex.org/S100835903","display_name":"IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems","issn_l":"0278-0070","issn":["0278-0070","1937-4151"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[{"score":0.4399999976158142,"id":"https://metadata.un.org/sdg/7","display_name":"Affordable and clean energy"}],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":52,"referenced_works":["https://openalex.org/W157156687","https://openalex.org/W1595368737","https://openalex.org/W1966733028","https://openalex.org/W1988869129","https://openalex.org/W1999684621","https://openalex.org/W2005319125","https://openalex.org/W2030898836","https://openalex.org/W2032509816","https://openalex.org/W2036894992","https://openalex.org/W2042194938","https://openalex.org/W2042456747","https://openalex.org/W2048719801","https://openalex.org/W2059774354","https://openalex.org/W2071868930","https://openalex.org/W2075787867","https://openalex.org/W2101234009","https://openalex.org/W2103742924","https://openalex.org/W2109791184","https://openalex.org/W2110134350","https://openalex.org/W2116043630","https://openalex.org/W2122111042","https://openalex.org/W2137013604","https://openalex.org/W2139949569","https://openalex.org/W2142096775","https://openalex.org/W2143283746","https://openalex.org/W2150283124","https://openalex.org/W2155118152","https://openalex.org/W2155791163","https://openalex.org/W2156667996","https://openalex.org/W2163446469","https://openalex.org/W2166049352","https://openalex.org/W2612732564","https://openalex.org/W2613791011","https://openalex.org/W2752340395","https://openalex.org/W2777430404","https://openalex.org/W2899727632","https://openalex.org/W2917897617","https://openalex.org/W3003708730","https://openalex.org/W3013155238","https://openalex.org/W3092621962","https://openalex.org/W3106010854","https://openalex.org/W3141479522","https://openalex.org/W3146960355","https://openalex.org/W4230185113","https://openalex.org/W4230832048","https://openalex.org/W4234941233","https://openalex.org/W4236432903","https://openalex.org/W4236934668","https://openalex.org/W4238485759","https://openalex.org/W4242565052","https://openalex.org/W6606430823","https://openalex.org/W6675354045"],"related_works":["https://openalex.org/W2389800961","https://openalex.org/W1995389502","https://openalex.org/W2041294738","https://openalex.org/W2018464517","https://openalex.org/W294051742","https://openalex.org/W2460662058","https://openalex.org/W2501578203","https://openalex.org/W2113108952","https://openalex.org/W3215142653","https://openalex.org/W1487051936"],"abstract_inverted_index":{"Timing":[0],"errors":[1,62,231],"of":[2,17,28,78,96,118,144,157,232],"microelectronic":[3,31,37,52],"circuits":[4,18,32],"occur":[5],"when":[6],"the":[7,14,20,25,67,93,116,129,134,149,155,172,210,217,287,293],"circuit":[8,21,68,312,320,348],"timing":[9,230],"specification":[10],"is":[11],"violated,":[12],"i.e.,":[13],"dynamic":[15,94,130,135,177],"delay":[16,49,95,136,156,278,295],"exceeds":[19],"clock":[22,104],"period.":[23],"With":[24],"continuous":[26],"scaling":[27],"CMOS":[29],"technology,":[30],"are":[33],"increasingly":[34],"susceptible":[35],"to":[36,113,188,270,298,301,322,338,343],"variations":[38,41,46],"such":[39],"as":[40],"in":[42,51,66,124,148,171,310,334],"operating":[43,102,161,193,250],"conditions.":[44],"Such":[45],"can":[47,91,275,291,318,329],"cause":[48,75,276],"uncertainty":[50],"circuits,":[53],"leading":[54],"totiming":[55],"errors.":[56],"Circuit":[57],"designers":[58,321],"typically":[59],"combat":[60],"these":[61,181],"using":[63,137],"conservative":[64],"guardbands":[65],"and":[69,106,121,163,199,213,328],"architectural":[70],"design,":[71],"which":[72,317],"can,":[73],"however,":[74],"significant":[76],"loss":[77],"operational":[79],"efficiency.":[80],"In":[81],"this":[82],"article,":[83],"we":[84,183,227,265],"proposeDEVoT,":[85],"a":[86,267,280],"supervised":[87,185],"learning":[88,186],"model":[89],"that":[90,175,274],"predict":[92,229],"functional":[97],"units":[98],"(FUs)":[99],"under":[100,159,248],"different":[101,160,192,249],"conditions,":[103,194,251],"speeds,":[105],"input":[107,122,164,173,289],"workload.":[108,165],"The":[109],"main":[110],"contribution":[111],"ofDEVoTis":[112],"jointly":[114],"consider":[115],"impact":[117],"voltage,":[119],"temperature,":[120],"workload":[123,174],"path":[125,178],"sensitization,":[126],"hence":[127],"predicting":[128],"delay.":[131,313],"We":[132,153,166,220,241,314],"measure":[133],"switching":[138],"activity":[139],"generated":[140,288],"through":[141],"gate-level":[142,218],"simulation":[143],"post":[145],"place-and-route":[146],"design":[147,325],"TSMC":[150],"45-nm":[151],"process.":[152],"characterize":[154],"FUs":[158],"conditions":[162],"then":[167],"extract":[168],"useful":[169],"features":[170],"influences":[176],"sensitization.":[179],"Using":[180],"features,":[182],"apply":[184],"methods":[187],"buildDEVoT.":[189],"Across":[190],"100":[191],"four":[195],"widely":[196],"used":[197],"FUs,":[198,233],"three":[200],"datasets,DEVoTachieves,":[201],"on":[202,284],"average,":[203],"less":[204],"than":[205,216],"2%":[206],"relative":[207],"deviation":[208],"from":[209],"ground":[211],"truth":[212],"is$100\\times":[214],"$faster":[215],"simulation.":[219,349],"present":[221,266],"two":[222,260],"case":[223],"studies":[224],"usingDEVoT.":[225],"First,":[226],"useDEVoTto":[228,243],"andDEVoTachieves":[234,252],"an":[235,253],"average":[236,254],"prediction":[237],"accuracy":[238,256],"at":[239,257],"98.04%.":[240],"further":[242],"estimate":[244],"application":[245],"output":[246],"quality":[247],"estimation":[255],"97%":[258],"for":[259,279],"image":[261],"processing":[262],"applications.":[263],"Second,":[264],"fuzzing-based":[268],"method":[269],"identify":[271],"\u201ccritical\u201d":[272],"patterns":[273,290],"longer":[277],"given":[281],"circuit.":[282],"Built":[283],"top":[285],"ofDEVoT,":[286],"improve":[292],"sensitized":[294],"by":[296],"up":[297],"8.3%":[299],"compared":[300],"random":[302],"patterns.DEVoTalso":[303],"outperforms":[304],"automatic":[305],"test":[306],"pattern":[307],"generation":[308],"(ATPG)":[309],"sensitizing":[311],"will":[315],"opensourceDEVoT,":[316],"assist":[319],"perform":[323],"early":[324],"space":[326],"exploration":[327],"also":[330],"help":[331],"software":[332],"developers":[333],"approximate":[335],"computing":[336],"community":[337],"assess":[339],"their":[340],"program":[341],"resilience":[342],"hardware":[344],"approximation":[345],"without":[346],"performing":[347]},"counts_by_year":[{"year":2026,"cited_by_count":1},{"year":2025,"cited_by_count":2},{"year":2024,"cited_by_count":2},{"year":2023,"cited_by_count":3},{"year":2022,"cited_by_count":2}],"updated_date":"2026-07-29T09:40:50.615796","created_date":"2025-10-10T00:00:00"}