{"id":"https://openalex.org/W3097533749","doi":"https://doi.org/10.1109/tcad.2020.3035629","title":"Realization of Logic Functions Using Switching Lattices Under a Delay Constraint","display_name":"Realization of Logic Functions Using Switching Lattices Under a Delay Constraint","publication_year":2020,"publication_date":"2020-11-03","ids":{"openalex":"https://openalex.org/W3097533749","doi":"https://doi.org/10.1109/tcad.2020.3035629","mag":"3097533749"},"language":"en","primary_location":{"id":"doi:10.1109/tcad.2020.3035629","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tcad.2020.3035629","pdf_url":null,"source":{"id":"https://openalex.org/S100835903","display_name":"IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems","issn_l":"0278-0070","issn":["0278-0070","1937-4151"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5089933848","display_name":"Levent Aksoy","orcid":"https://orcid.org/0000-0001-6129-9657"},"institutions":[{"id":"https://openalex.org/I48912391","display_name":"Istanbul Technical University","ror":"https://ror.org/059636586","country_code":"TR","type":"education","lineage":["https://openalex.org/I48912391"]}],"countries":["TR"],"is_corresponding":false,"raw_author_name":"Levent Aksoy","raw_affiliation_strings":["Emerging Circuits and Computation Group, Istanbul Technical University, Istanbul, Turkey"],"raw_orcid":"https://orcid.org/0000-0001-6129-9657","affiliations":[{"raw_affiliation_string":"Emerging Circuits and Computation Group, Istanbul Technical University, Istanbul, Turkey","institution_ids":["https://openalex.org/I48912391"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5071469619","display_name":"Nihat Akkan","orcid":"https://orcid.org/0000-0001-9067-0603"},"institutions":[{"id":"https://openalex.org/I4101805","display_name":"Y\u0131ld\u0131z Technical University","ror":"https://ror.org/0547yzj13","country_code":"TR","type":"education","lineage":["https://openalex.org/I4101805"]}],"countries":["TR"],"is_corresponding":false,"raw_author_name":"Nihat Akkan","raw_affiliation_strings":["Y\u0131ld\u0131z Technical University, Istanbul, Turkey"],"raw_orcid":"https://orcid.org/0000-0001-9067-0603","affiliations":[{"raw_affiliation_string":"Y\u0131ld\u0131z Technical University, Istanbul, Turkey","institution_ids":["https://openalex.org/I4101805"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5012103446","display_name":"Herman Sedef","orcid":"https://orcid.org/0000-0001-7852-5825"},"institutions":[{"id":"https://openalex.org/I4101805","display_name":"Y\u0131ld\u0131z Technical University","ror":"https://ror.org/0547yzj13","country_code":"TR","type":"education","lineage":["https://openalex.org/I4101805"]}],"countries":["TR"],"is_corresponding":false,"raw_author_name":"Herman Sedef","raw_affiliation_strings":["Y\u0131ld\u0131z Technical University, Istanbul, Turkey"],"raw_orcid":"https://orcid.org/0000-0001-7852-5825","affiliations":[{"raw_affiliation_string":"Y\u0131ld\u0131z Technical University, Istanbul, Turkey","institution_ids":["https://openalex.org/I4101805"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5010145600","display_name":"Mustafa Altun","orcid":"https://orcid.org/0000-0002-3103-1809"},"institutions":[{"id":"https://openalex.org/I48912391","display_name":"Istanbul Technical University","ror":"https://ror.org/059636586","country_code":"TR","type":"education","lineage":["https://openalex.org/I48912391"]}],"countries":["TR"],"is_corresponding":false,"raw_author_name":"Mustafa Altun","raw_affiliation_strings":["Emerging Circuits and Computation Group, Istanbul Technical University, Istanbul, Turkey"],"raw_orcid":"https://orcid.org/0000-0002-3103-1809","affiliations":[{"raw_affiliation_string":"Emerging Circuits and Computation Group, Istanbul Technical University, Istanbul, Turkey","institution_ids":["https://openalex.org/I48912391"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":4,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":0.1041,"has_fulltext":false,"cited_by_count":1,"citation_normalized_percentile":{"value":0.44848555,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":94},"biblio":{"volume":"40","issue":"10","first_page":"2036","last_page":"2048"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10472","display_name":"Semiconductor materials and devices","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10472","display_name":"Semiconductor materials and devices","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10558","display_name":"Advancements in Semiconductor Devices and Circuit Design","score":0.9994000196456909,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.9994000196456909,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/lattice","display_name":"Lattice (music)","score":0.6229726076126099},{"id":"https://openalex.org/keywords/realization","display_name":"Realization (probability)","score":0.6137855648994446},{"id":"https://openalex.org/keywords/logic-gate","display_name":"Logic gate","score":0.519834578037262},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.4731527268886566},{"id":"https://openalex.org/keywords/pass-transistor-logic","display_name":"Pass transistor logic","score":0.45677393674850464},{"id":"https://openalex.org/keywords/function","display_name":"Function (biology)","score":0.42017805576324463},{"id":"https://openalex.org/keywords/boolean-function","display_name":"Boolean function","score":0.4175166189670563},{"id":"https://openalex.org/keywords/path","display_name":"Path (computing)","score":0.4159190058708191},{"id":"https://openalex.org/keywords/mathematics","display_name":"Mathematics","score":0.40265244245529175},{"id":"https://openalex.org/keywords/topology","display_name":"Topology (electrical circuits)","score":0.3588216006755829},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.3143306374549866},{"id":"https://openalex.org/keywords/electronic-circuit","display_name":"Electronic circuit","score":0.1299736499786377},{"id":"https://openalex.org/keywords/digital-electronics","display_name":"Digital electronics","score":0.10671091079711914},{"id":"https://openalex.org/keywords/combinatorics","display_name":"Combinatorics","score":0.09106495976448059},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.08045747876167297},{"id":"https://openalex.org/keywords/physics","display_name":"Physics","score":0.07643580436706543},{"id":"https://openalex.org/keywords/computer-network","display_name":"Computer network","score":0.07009312510490417},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.0650821328163147}],"concepts":[{"id":"https://openalex.org/C2781204021","wikidata":"https://www.wikidata.org/wiki/Q6497091","display_name":"Lattice (music)","level":2,"score":0.6229726076126099},{"id":"https://openalex.org/C2781089630","wikidata":"https://www.wikidata.org/wiki/Q21856745","display_name":"Realization (probability)","level":2,"score":0.6137855648994446},{"id":"https://openalex.org/C131017901","wikidata":"https://www.wikidata.org/wiki/Q170451","display_name":"Logic gate","level":2,"score":0.519834578037262},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.4731527268886566},{"id":"https://openalex.org/C198521697","wikidata":"https://www.wikidata.org/wiki/Q7142438","display_name":"Pass transistor logic","level":4,"score":0.45677393674850464},{"id":"https://openalex.org/C14036430","wikidata":"https://www.wikidata.org/wiki/Q3736076","display_name":"Function (biology)","level":2,"score":0.42017805576324463},{"id":"https://openalex.org/C187455244","wikidata":"https://www.wikidata.org/wiki/Q942353","display_name":"Boolean function","level":2,"score":0.4175166189670563},{"id":"https://openalex.org/C2777735758","wikidata":"https://www.wikidata.org/wiki/Q817765","display_name":"Path (computing)","level":2,"score":0.4159190058708191},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.40265244245529175},{"id":"https://openalex.org/C184720557","wikidata":"https://www.wikidata.org/wiki/Q7825049","display_name":"Topology (electrical circuits)","level":2,"score":0.3588216006755829},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.3143306374549866},{"id":"https://openalex.org/C134146338","wikidata":"https://www.wikidata.org/wiki/Q1815901","display_name":"Electronic circuit","level":2,"score":0.1299736499786377},{"id":"https://openalex.org/C81843906","wikidata":"https://www.wikidata.org/wiki/Q173156","display_name":"Digital electronics","level":3,"score":0.10671091079711914},{"id":"https://openalex.org/C114614502","wikidata":"https://www.wikidata.org/wiki/Q76592","display_name":"Combinatorics","level":1,"score":0.09106495976448059},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.08045747876167297},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.07643580436706543},{"id":"https://openalex.org/C31258907","wikidata":"https://www.wikidata.org/wiki/Q1301371","display_name":"Computer network","level":1,"score":0.07009312510490417},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.0650821328163147},{"id":"https://openalex.org/C78458016","wikidata":"https://www.wikidata.org/wiki/Q840400","display_name":"Evolutionary biology","level":1,"score":0.0},{"id":"https://openalex.org/C105795698","wikidata":"https://www.wikidata.org/wiki/Q12483","display_name":"Statistics","level":1,"score":0.0},{"id":"https://openalex.org/C24890656","wikidata":"https://www.wikidata.org/wiki/Q82811","display_name":"Acoustics","level":1,"score":0.0},{"id":"https://openalex.org/C86803240","wikidata":"https://www.wikidata.org/wiki/Q420","display_name":"Biology","level":0,"score":0.0}],"mesh":[],"locations_count":2,"locations":[{"id":"doi:10.1109/tcad.2020.3035629","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tcad.2020.3035629","pdf_url":null,"source":{"id":"https://openalex.org/S100835903","display_name":"IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems","issn_l":"0278-0070","issn":["0278-0070","1937-4151"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems","raw_type":"journal-article"},{"id":"pmh:oai:polen.itu.edu.tr:11527/42467","is_oa":false,"landing_page_url":"https://hdl.handle.net/11527/42467","pdf_url":null,"source":{"id":"https://openalex.org/S4306400460","display_name":"Istanbul Technical University Academic Open Archive (Istanbul Technical University)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/I48912391","host_organization_name":"Istanbul Technical University","host_organization_lineage":["https://openalex.org/I48912391"],"host_organization_lineage_names":[],"type":"repository"},"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":null,"raw_type":"Article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[{"id":"https://openalex.org/G1519285947","display_name":"Anahtarlamal\u0131 Kafesler Ile Hesaplama: Teknoloji Geli\u015ftirme, Eleman Modelleme Ve Devre Tasar\u0131m\u0131","funder_award_id":"218E068","funder_id":"https://openalex.org/F4320322626","funder_display_name":"T\u00fcrkiye Bilimsel ve Teknolojik Ara\u015ft\u0131rma Kurumu"},{"id":"https://openalex.org/G4778390168","display_name":"Nano Anahtarlamal\u0131 Dizinlerin Sentezi ve G\u00fcvenilirlik Analizi","funder_award_id":"113E760","funder_id":"https://openalex.org/F4320322626","funder_display_name":"T\u00fcrkiye Bilimsel ve Teknolojik Ara\u015ft\u0131rma Kurumu"}],"funders":[{"id":"https://openalex.org/F4320322626","display_name":"T\u00fcrkiye Bilimsel ve Teknolojik Ara\u015ft\u0131rma Kurumu","ror":"https://ror.org/04w9kkr77"}],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":27,"referenced_works":["https://openalex.org/W78552530","https://openalex.org/W1518236483","https://openalex.org/W1598341975","https://openalex.org/W1985555064","https://openalex.org/W2025516544","https://openalex.org/W2036265926","https://openalex.org/W2063710133","https://openalex.org/W2067546549","https://openalex.org/W2105761964","https://openalex.org/W2107969613","https://openalex.org/W2133527541","https://openalex.org/W2153558271","https://openalex.org/W2160444875","https://openalex.org/W2164136814","https://openalex.org/W2545112558","https://openalex.org/W2760719831","https://openalex.org/W2891596554","https://openalex.org/W2945444276","https://openalex.org/W2986068239","https://openalex.org/W3035834618","https://openalex.org/W3090340141","https://openalex.org/W3190058962","https://openalex.org/W3203992401","https://openalex.org/W4245630182","https://openalex.org/W6656594533","https://openalex.org/W6679878532","https://openalex.org/W6784186900"],"related_works":["https://openalex.org/W2290310756","https://openalex.org/W2063994266","https://openalex.org/W2774773774","https://openalex.org/W2167525841","https://openalex.org/W2018740733","https://openalex.org/W2886135960","https://openalex.org/W2580743037","https://openalex.org/W2151687972","https://openalex.org/W2168217865","https://openalex.org/W1522300962"],"abstract_inverted_index":{"Switching":[0],"lattices,":[1],"consisting":[2],"of":[3,13,27,39,44,73,86,102,125,137,146,149,170,215,219,227,233,241],"four-terminal":[4,40,66,103],"switches,":[5,41],"present":[6],"an":[7,228,261],"alternative":[8,238],"structure":[9],"for":[10],"the":[11,36,42,71,84,100,106,123,134,147,152,208,213,231,247,255],"realization":[12,26,124,218],"Boolean":[14],"logic":[15,29,91,127,175,197,221,243],"functions.":[16],"Although":[17],"promising":[18],"algorithms":[19,210],"have":[20],"been":[21,50],"introduced":[22],"to":[23,201,253],"find":[24,122,184],"a":[25,28,32,45,58,62,74,77,87,90,94,126,130,140,158,167,179,185,216,220,225,242,251],"function":[30,92,128,222,244],"using":[31,61,187],"switching":[33,46,59,78,95,131],"lattice":[34,47,60,96,132,217,239],"with":[35,133,166,199],"fewest":[37,135],"number":[38,101,136,148,169,232],"delay":[43,72,85,141,214,248],"has":[48],"not":[49],"examined":[51],"yet.":[52],"In":[53],"this":[54,110],"article,":[55],"we":[56,112],"generate":[57],"recently":[63],"proposed":[64,209],"CMOS-compatible":[65],"device":[67],"model":[68],"and":[69,118,191],"formulate":[70],"path":[75],"in":[76,105,144,151,230,260],"lattice.":[79],"It":[80],"is":[81,157,178],"observed":[82],"that":[83,162,182,207,257],"design":[88],"realizing":[89],"on":[93,99,129,172],"heavily":[97],"depends":[98],"switches":[104,138,150,171],"critical":[107,153],"path.":[108,154],"With":[109],"motivation,":[111],"introduce":[113],"optimization":[114],"algorithms,":[115],"called":[116],"PHAEDRA":[117,156],"TROADES,":[119],"which":[120],"can":[121,163,183,192,211,236],"under":[139],"constraint":[142],"given":[143],"terms":[145],"While":[155],"dichotomic":[159],"search":[160],"algorithm":[161],"obtain":[164],"solutions":[165],"small":[168,173],"size":[174,196],"functions,":[176],"TROADES":[177],"divide-and-conquer":[180],"method":[181],"solution":[186],"less":[188],"computational":[189],"effort":[190],"easily":[193],"handle":[194],"larger":[195],"functions":[198],"respect":[200],"PHAEDRA.":[202],"The":[203],"experimental":[204],"results":[205],"show":[206],"reduce":[212],"significantly":[223],"at":[224],"cost":[226],"increase":[229],"switches.":[234],"They":[235],"explore":[237],"realizations":[240],"by":[245],"changing":[246],"constraint,":[249],"enabling":[250],"designer":[252],"choose":[254],"one":[256],"fits":[258],"best":[259],"application.":[262]},"counts_by_year":[{"year":2021,"cited_by_count":1}],"updated_date":"2026-06-22T08:00:12.763002","created_date":"2025-10-10T00:00:00"}
