{"id":"https://openalex.org/W3013713431","doi":"https://doi.org/10.1109/tcad.2020.2982621","title":"M2A2: Microscale Modular Assembled ASICs for High-Mix, Low-Volume, Heterogeneously Integrated Designs","display_name":"M2A2: Microscale Modular Assembled ASICs for High-Mix, Low-Volume, Heterogeneously Integrated Designs","publication_year":2020,"publication_date":"2020-03-24","ids":{"openalex":"https://openalex.org/W3013713431","doi":"https://doi.org/10.1109/tcad.2020.2982621","mag":"3013713431"},"language":"en","primary_location":{"id":"doi:10.1109/tcad.2020.2982621","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tcad.2020.2982621","pdf_url":null,"source":{"id":"https://openalex.org/S100835903","display_name":"IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems","issn_l":"0278-0070","issn":["0278-0070","1937-4151"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5015176330","display_name":"Aseem Sayal","orcid":"https://orcid.org/0000-0003-3078-9498"},"institutions":[{"id":"https://openalex.org/I86519309","display_name":"The University of Texas at Austin","ror":"https://ror.org/00hj54h04","country_code":"US","type":"education","lineage":["https://openalex.org/I86519309"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Aseem Sayal","raw_affiliation_strings":["Department of Electrical and Computer Engineering, University of Texas at Austin, Austin, TX, USA"],"raw_orcid":"https://orcid.org/0000-0003-3078-9498","affiliations":[{"raw_affiliation_string":"Department of Electrical and Computer Engineering, University of Texas at Austin, Austin, TX, USA","institution_ids":["https://openalex.org/I86519309"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5017786549","display_name":"Paras Ajay","orcid":null},"institutions":[{"id":"https://openalex.org/I86519309","display_name":"The University of Texas at Austin","ror":"https://ror.org/00hj54h04","country_code":"US","type":"education","lineage":["https://openalex.org/I86519309"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Paras Ajay","raw_affiliation_strings":["Department of Mechanical Engineering, University of Texas at Austin, Austin, TX, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Mechanical Engineering, University of Texas at Austin, Austin, TX, USA","institution_ids":["https://openalex.org/I86519309"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5028351919","display_name":"Mark McDermott","orcid":"https://orcid.org/0000-0003-0697-3586"},"institutions":[{"id":"https://openalex.org/I86519309","display_name":"The University of Texas at Austin","ror":"https://ror.org/00hj54h04","country_code":"US","type":"education","lineage":["https://openalex.org/I86519309"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Mark W. McDermott","raw_affiliation_strings":["Department of Electrical and Computer Engineering, University of Texas at Austin, Austin, TX, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Electrical and Computer Engineering, University of Texas at Austin, Austin, TX, USA","institution_ids":["https://openalex.org/I86519309"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5110169324","display_name":"S. V. Sreenivasan","orcid":null},"institutions":[{"id":"https://openalex.org/I86519309","display_name":"The University of Texas at Austin","ror":"https://ror.org/00hj54h04","country_code":"US","type":"education","lineage":["https://openalex.org/I86519309"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"S. V. Sreenivasan","raw_affiliation_strings":["Department of Electrical and Computer Engineering, University of Texas at Austin, Austin, TX, USA","Department of Mechanical Engineering, University of Texas at Austin, Austin, TX, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Electrical and Computer Engineering, University of Texas at Austin, Austin, TX, USA","institution_ids":["https://openalex.org/I86519309"]},{"raw_affiliation_string":"Department of Mechanical Engineering, University of Texas at Austin, Austin, TX, USA","institution_ids":["https://openalex.org/I86519309"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5003048953","display_name":"Jaydeep P. Kulkarni","orcid":"https://orcid.org/0000-0002-0258-6776"},"institutions":[{"id":"https://openalex.org/I86519309","display_name":"The University of Texas at Austin","ror":"https://ror.org/00hj54h04","country_code":"US","type":"education","lineage":["https://openalex.org/I86519309"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Jaydeep P. Kulkarni","raw_affiliation_strings":["Department of Electrical and Computer Engineering, University of Texas at Austin, Austin, TX, USA"],"raw_orcid":"https://orcid.org/0000-0002-0258-6776","affiliations":[{"raw_affiliation_string":"Department of Electrical and Computer Engineering, University of Texas at Austin, Austin, TX, USA","institution_ids":["https://openalex.org/I86519309"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":5,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":0.2081,"has_fulltext":false,"cited_by_count":8,"citation_normalized_percentile":{"value":0.497087,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":98},"biblio":{"volume":"39","issue":"12","first_page":"4760","last_page":"4776"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11338","display_name":"Advancements in Photolithography Techniques","score":0.9995999932289124,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11338","display_name":"Advancements in Photolithography Techniques","score":0.9995999932289124,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T12224","display_name":"Nanofabrication and Lithography Techniques","score":0.9991999864578247,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.9991000294685364,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/application-specific-integrated-circuit","display_name":"Application-specific integrated circuit","score":0.7246501445770264},{"id":"https://openalex.org/keywords/design-for-manufacturability","display_name":"Design for manufacturability","score":0.5652614831924438},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.5261727571487427},{"id":"https://openalex.org/keywords/modular-design","display_name":"Modular design","score":0.5149272680282593},{"id":"https://openalex.org/keywords/integrated-circuit","display_name":"Integrated circuit","score":0.45346179604530334},{"id":"https://openalex.org/keywords/lithography","display_name":"Lithography","score":0.42528820037841797},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.3459038734436035},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.33369678258895874},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.2288503646850586},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.22879379987716675},{"id":"https://openalex.org/keywords/materials-science","display_name":"Materials science","score":0.217522531747818},{"id":"https://openalex.org/keywords/optoelectronics","display_name":"Optoelectronics","score":0.08967471122741699}],"concepts":[{"id":"https://openalex.org/C77390884","wikidata":"https://www.wikidata.org/wiki/Q217302","display_name":"Application-specific integrated circuit","level":2,"score":0.7246501445770264},{"id":"https://openalex.org/C62064638","wikidata":"https://www.wikidata.org/wiki/Q553878","display_name":"Design for manufacturability","level":2,"score":0.5652614831924438},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.5261727571487427},{"id":"https://openalex.org/C101468663","wikidata":"https://www.wikidata.org/wiki/Q1620158","display_name":"Modular design","level":2,"score":0.5149272680282593},{"id":"https://openalex.org/C530198007","wikidata":"https://www.wikidata.org/wiki/Q80831","display_name":"Integrated circuit","level":2,"score":0.45346179604530334},{"id":"https://openalex.org/C204223013","wikidata":"https://www.wikidata.org/wiki/Q133036","display_name":"Lithography","level":2,"score":0.42528820037841797},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.3459038734436035},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.33369678258895874},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.2288503646850586},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.22879379987716675},{"id":"https://openalex.org/C192562407","wikidata":"https://www.wikidata.org/wiki/Q228736","display_name":"Materials science","level":0,"score":0.217522531747818},{"id":"https://openalex.org/C49040817","wikidata":"https://www.wikidata.org/wiki/Q193091","display_name":"Optoelectronics","level":1,"score":0.08967471122741699},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/tcad.2020.2982621","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tcad.2020.2982621","pdf_url":null,"source":{"id":"https://openalex.org/S100835903","display_name":"IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems","issn_l":"0278-0070","issn":["0278-0070","1937-4151"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[{"id":"https://metadata.un.org/sdg/9","display_name":"Industry, innovation and infrastructure","score":0.6299999952316284}],"awards":[],"funders":[{"id":"https://openalex.org/F4320332693","display_name":"Cockrell School of Engineering, University of Texas at Austin","ror":"https://ror.org/00hj54h04"}],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":37,"referenced_works":["https://openalex.org/W34103176","https://openalex.org/W146586945","https://openalex.org/W592018936","https://openalex.org/W608334694","https://openalex.org/W1537079799","https://openalex.org/W1584496665","https://openalex.org/W1611682757","https://openalex.org/W1661007454","https://openalex.org/W1967064512","https://openalex.org/W1974151163","https://openalex.org/W1977850862","https://openalex.org/W1990015089","https://openalex.org/W2004885810","https://openalex.org/W2005819989","https://openalex.org/W2031937298","https://openalex.org/W2044006468","https://openalex.org/W2054095206","https://openalex.org/W2059381751","https://openalex.org/W2095117703","https://openalex.org/W2098280469","https://openalex.org/W2099461980","https://openalex.org/W2102290976","https://openalex.org/W2112587384","https://openalex.org/W2131004306","https://openalex.org/W2134351587","https://openalex.org/W2166449718","https://openalex.org/W2553506227","https://openalex.org/W2740324036","https://openalex.org/W2757913998","https://openalex.org/W2790294803","https://openalex.org/W2925293283","https://openalex.org/W4236269389","https://openalex.org/W6618847966","https://openalex.org/W6632026985","https://openalex.org/W6636657728","https://openalex.org/W6651674351","https://openalex.org/W6684095494"],"related_works":["https://openalex.org/W2094969048","https://openalex.org/W994558755","https://openalex.org/W2169357373","https://openalex.org/W2157255030","https://openalex.org/W2183559057","https://openalex.org/W8358306","https://openalex.org/W2216584887","https://openalex.org/W309165247","https://openalex.org/W2479684317","https://openalex.org/W2006106470"],"abstract_inverted_index":{"With":[0],"CMOS":[1,255],"process":[2,52,166,256,343],"technology":[3,146,318,352],"scaling,":[4],"the":[5,44,51,106,139,188,217,229,269,290,306,310,315,327,336,350],"mask":[6],"cost":[7],"for":[8,20,78,135,335,345],"fabricating":[9,81],"nano-scale":[10],"transistors,":[11],"contacts,":[12],"and":[13,34,48,80,116,124,168,213,245,252,282,300,342],"interconnects":[14],"has":[15,28,38],"become":[16],"prohibitively":[17],"expensive,":[18],"especially,":[19],"low":[21],"volume":[22],"designs.":[23,200],"Moreover,":[24,309],"higher":[25,31,302],"transistor":[26],"density":[27],"resulted":[29],"in":[30,43,50,111,164,206,314],"design":[32,45,119,208,238],"complexity":[33],"large-sized":[35],"die,":[36],"which":[37,104],"led":[39],"to":[40,88,153,192,216,280,289,305],"an":[41],"increase":[42],"cycle":[46],"time":[47],"degradation":[49],"yield.":[53],"These":[54],"challenges":[55,344],"are":[56,234,319,353],"forcing":[57],"low-volume":[58,83,198],"application-specific":[59],"integrated":[60,85],"circuits":[61],"(ASICs)":[62],"toward":[63],"highly":[64],"suboptimal":[65],"field-programmable":[66],"gate":[67],"arrays":[68],"(FPGAs).":[69],"In":[70,226],"this":[71,227],"article,":[72,228],"we":[73],"propose":[74],"a":[75,173,194],"new":[76],"approach":[77],"designing":[79],"high-mix,":[82,197],"heterogeneously":[84],"ASICs,":[86,243],"referred":[87],"as":[89,222,241],"Microscale":[90],"Modular":[91],"Assembled":[92],"ASIC":[93,199],"(M2A2),":[94],"consisting":[95],"of:":[96],"1)":[97],"pick-and-place":[98,150],"assembly":[99,151,156],"of":[100,149,157,187,196,231,349],"prefabricated":[101],"blocks":[102],"(PFBs)":[103],"utilizes":[105],"nano-precision":[107],"placement":[108],"capabilities":[109],"developed":[110],"jet-and-flash":[112],"imprint":[113],"lithography":[114],"(J-FIL)":[115],"2)":[117],"EDA":[118,128,141,329],"methodology":[120,129],"utilizing":[121],"unsupervised":[122],"learning":[123],"graph-matching":[125],"techniques.":[126],"The":[127,143,159,258,293,321],"leverages":[130],"existing":[131],"CAD":[132],"tool":[133],"infrastructure":[134],"easy":[136],"adoption":[137],"into":[138],"current":[140],"ecosystem.":[142],"proposed":[144,219,270,316,328,337],"fabrication":[145,312],"makes":[147],"use":[148],"technique":[152],"allow":[154,203],"nano-precise":[155],"PFBs.":[158],"PFBs":[160],"can":[161,181],"be":[162,183],"fabricated":[163],"advanced":[165],"nodes":[167],"then":[169,182],"knitted":[170,190],"together":[171],"on":[172,185],"wafer":[174],"substrate.":[175],"Custom-designed":[176],"low-cost":[177],"back-end":[178],"metal":[179],"layers":[180],"created/placed":[184],"top":[186],"PFB":[189,211],"layer":[191],"realize":[193],"variety":[195],"M2A2":[201,271,294,317,338,351],"would":[202],"more":[204],"flexibility":[205],"front-end":[207],"by":[209],"optimal":[210],"selection":[212],"knitting":[214],"compared":[215,235,279,288,304],"earlier":[218],"approaches":[220],"such":[221,240],"structured":[223],"ASICs":[224],"(sASICs).":[225],"performance":[230,303],"M2A2-based":[232],"designs":[233,272,295],"with":[236,326,356],"different":[237],"technologies,":[239],"baseline":[242,291],"FPGAs,":[244,281],"sASICs":[246],"at":[247],"16":[248],"nm,":[249,251],"40":[250],"130":[253],"nm":[254],"nodes.":[257],"post-PNR":[259],"simulation":[260],"results":[261,324,334],"achieved":[262],"over":[263],"15":[264],"IWLS":[265],"benchmarks":[266],"show":[267,332],"that":[268],"achieve":[273,296],"27.11x":[274],"-34.89x":[275],"reduced":[276],"power-delay-product":[277],"(PDP)":[278],"incur":[283],"1.69x":[284],"-2.36x":[285],"larger":[286],"area":[287,299],"ASICs.":[292],"15%-68.5%":[297],"smaller":[298],"8.5%-52%":[301],"sASIC":[307],"methodologies.":[308],"key":[311],"steps":[313],"presented.":[320],"experimental":[322],"fab":[323],"along":[325,355],"flow":[330],"simulations":[331],"promising":[333],"technology.":[339],"Design":[340],"tradeoffs":[341],"large":[346],"scale":[347],"deployment":[348],"discussed":[354],"their":[357],"mitigation":[358],"strategies.":[359]},"counts_by_year":[{"year":2026,"cited_by_count":1},{"year":2025,"cited_by_count":3},{"year":2024,"cited_by_count":2},{"year":2023,"cited_by_count":1},{"year":2020,"cited_by_count":1}],"updated_date":"2026-06-11T09:08:48.828518","created_date":"2025-10-10T00:00:00"}
